gpioiic.c revision 1.12
1 /* $NetBSD: gpioiic.c,v 1.12 2023/05/10 00:08:30 riastradh Exp $ */ 2 /* $OpenBSD: gpioiic.c,v 1.8 2008/11/24 12:12:12 mbalmer Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Alexander Yurchenko <grange (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: gpioiic.c,v 1.12 2023/05/10 00:08:30 riastradh Exp $"); 22 23 /* 24 * I2C bus bit-banging through GPIO pins. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/device.h> 30 #include <sys/gpio.h> 31 #include <sys/rwlock.h> 32 #include <sys/module.h> 33 34 #include <dev/gpio/gpiovar.h> 35 36 #include <dev/i2c/i2cvar.h> 37 #include <dev/i2c/i2c_bitbang.h> 38 39 #include "ioconf.h" 40 41 #define GPIOIIC_PIN_SDA 0 42 #define GPIOIIC_PIN_SCL 1 43 #define GPIOIIC_NPINS 2 44 45 #define GPIOIIC_SDA 0x01 46 #define GPIOIIC_SCL 0x02 47 48 #define GPIOIIC_PIN_REVERSE 0x01 49 50 struct gpioiic_softc { 51 void * sc_gpio; 52 struct gpio_pinmap sc_map; 53 int _map[GPIOIIC_NPINS]; 54 55 struct i2c_controller sc_i2c_tag; 56 device_t sc_i2c_dev; 57 58 int sc_pin_sda; 59 int sc_pin_scl; 60 61 int sc_sda; 62 int sc_scl; 63 }; 64 65 int gpioiic_match(device_t, cfdata_t, void *); 66 void gpioiic_attach(device_t, device_t, void *); 67 int gpioiic_detach(device_t, int); 68 69 int gpioiic_i2c_send_start(void *, int); 70 int gpioiic_i2c_send_stop(void *, int); 71 int gpioiic_i2c_initiate_xfer(void *, i2c_addr_t, int); 72 int gpioiic_i2c_read_byte(void *, uint8_t *, int); 73 int gpioiic_i2c_write_byte(void *, uint8_t, int); 74 75 void gpioiic_bb_set_bits(void *, uint32_t); 76 void gpioiic_bb_set_dir(void *, uint32_t); 77 uint32_t gpioiic_bb_read_bits(void *); 78 79 CFATTACH_DECL_NEW(gpioiic, sizeof(struct gpioiic_softc), 80 gpioiic_match, gpioiic_attach, gpioiic_detach, NULL); 81 82 static const struct i2c_bitbang_ops gpioiic_bbops = { 83 gpioiic_bb_set_bits, 84 gpioiic_bb_set_dir, 85 gpioiic_bb_read_bits, 86 { GPIOIIC_SDA, GPIOIIC_SCL, GPIOIIC_SDA, 0 } 87 }; 88 89 int 90 gpioiic_match(device_t parent, cfdata_t cf, void *aux) 91 { 92 struct gpio_attach_args *ga = aux; 93 94 if (strcmp(ga->ga_dvname, cf->cf_name)) 95 return 0; 96 97 if (ga->ga_offset == -1) 98 return 0; 99 100 /* Check that we have enough pins */ 101 if (gpio_npins(ga->ga_mask) != GPIOIIC_NPINS) { 102 aprint_debug("%s: invalid pin mask 0x%02x\n", cf->cf_name, 103 ga->ga_mask); 104 return 0; 105 } 106 return 1; 107 } 108 109 void 110 gpioiic_attach(device_t parent, device_t self, void *aux) 111 { 112 struct gpioiic_softc *sc = device_private(self); 113 struct gpio_attach_args *ga = aux; 114 struct i2cbus_attach_args iba; 115 int caps; 116 117 /* Map pins */ 118 sc->sc_gpio = ga->ga_gpio; 119 sc->sc_map.pm_map = sc->_map; 120 121 122 if (gpio_pin_map(sc->sc_gpio, ga->ga_offset, ga->ga_mask, 123 &sc->sc_map)) { 124 aprint_error(": can't map pins\n"); 125 return; 126 } 127 128 if (ga->ga_flags & GPIOIIC_PIN_REVERSE) { 129 sc->sc_pin_sda = GPIOIIC_PIN_SCL; 130 sc->sc_pin_scl = GPIOIIC_PIN_SDA; 131 } else { 132 sc->sc_pin_sda = GPIOIIC_PIN_SDA; 133 sc->sc_pin_scl = GPIOIIC_PIN_SCL; 134 } 135 136 /* Configure SDA pin */ 137 caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, sc->sc_pin_sda); 138 if (!(caps & GPIO_PIN_OUTPUT)) { 139 aprint_error(": SDA pin is unable to drive output\n"); 140 goto fail; 141 } 142 if (!(caps & GPIO_PIN_INPUT)) { 143 aprint_error(": SDA pin is unable to read input\n"); 144 goto fail; 145 } 146 aprint_normal(": SDA[%d]", sc->sc_map.pm_map[sc->sc_pin_sda]); 147 sc->sc_sda = GPIO_PIN_OUTPUT; 148 if (caps & GPIO_PIN_OPENDRAIN) { 149 aprint_normal(" open-drain"); 150 sc->sc_sda |= GPIO_PIN_OPENDRAIN; 151 } else if ((caps & GPIO_PIN_PUSHPULL) && (caps & GPIO_PIN_TRISTATE)) { 152 aprint_normal(" push-pull tri-state"); 153 sc->sc_sda |= GPIO_PIN_PUSHPULL; 154 } 155 if (caps & GPIO_PIN_PULLUP) { 156 aprint_normal(" pull-up"); 157 sc->sc_sda |= GPIO_PIN_PULLUP; 158 } 159 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, sc->sc_pin_sda, sc->sc_sda); 160 161 /* Configure SCL pin */ 162 caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, sc->sc_pin_scl); 163 if (!(caps & GPIO_PIN_OUTPUT)) { 164 aprint_error(": SCL pin is unable to drive output\n"); 165 goto fail; 166 } 167 aprint_normal(", SCL[%d]", sc->sc_map.pm_map[sc->sc_pin_scl]); 168 sc->sc_scl = GPIO_PIN_OUTPUT; 169 if (caps & GPIO_PIN_OPENDRAIN) { 170 aprint_normal(" open-drain"); 171 sc->sc_scl |= GPIO_PIN_OPENDRAIN; 172 if (caps & GPIO_PIN_PULLUP) { 173 aprint_normal(" pull-up"); 174 sc->sc_scl |= GPIO_PIN_PULLUP; 175 } 176 } else if (caps & GPIO_PIN_PUSHPULL) { 177 aprint_normal(" push-pull"); 178 sc->sc_scl |= GPIO_PIN_PUSHPULL; 179 } 180 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, sc->sc_pin_scl, sc->sc_scl); 181 182 aprint_normal("\n"); 183 184 /* Attach I2C bus */ 185 iic_tag_init(&sc->sc_i2c_tag); 186 sc->sc_i2c_tag.ic_cookie = sc; 187 sc->sc_i2c_tag.ic_send_start = gpioiic_i2c_send_start; 188 sc->sc_i2c_tag.ic_send_stop = gpioiic_i2c_send_stop; 189 sc->sc_i2c_tag.ic_initiate_xfer = gpioiic_i2c_initiate_xfer; 190 sc->sc_i2c_tag.ic_read_byte = gpioiic_i2c_read_byte; 191 sc->sc_i2c_tag.ic_write_byte = gpioiic_i2c_write_byte; 192 193 memset(&iba, 0, sizeof(iba)); 194 iba.iba_tag = &sc->sc_i2c_tag; 195 sc->sc_i2c_dev = config_found(self, &iba, iicbus_print, CFARGS_NONE); 196 197 if (!pmf_device_register(self, NULL, NULL)) 198 aprint_error("%s: could not establish power handler\n", 199 device_xname(self)); 200 return; 201 202 fail: 203 gpio_pin_unmap(sc->sc_gpio, &sc->sc_map); 204 } 205 206 int 207 gpioiic_detach(device_t self, int flags) 208 { 209 struct gpioiic_softc *sc = device_private(self); 210 int error; 211 212 error = config_detach_children(self, flags); 213 if (error) 214 return error; 215 216 iic_tag_fini(&sc->sc_i2c_tag); 217 gpio_pin_unmap(sc->sc_gpio, &sc->sc_map); 218 pmf_device_deregister(self); 219 return 0; 220 } 221 222 int 223 gpioiic_i2c_send_start(void *cookie, int flags) 224 { 225 return i2c_bitbang_send_start(cookie, flags, &gpioiic_bbops); 226 } 227 228 int 229 gpioiic_i2c_send_stop(void *cookie, int flags) 230 { 231 return i2c_bitbang_send_stop(cookie, flags, &gpioiic_bbops); 232 } 233 234 int 235 gpioiic_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 236 { 237 return i2c_bitbang_initiate_xfer(cookie, addr, flags, &gpioiic_bbops); 238 } 239 240 int 241 gpioiic_i2c_read_byte(void *cookie, uint8_t *bytep, int flags) 242 { 243 return i2c_bitbang_read_byte(cookie, bytep, flags, &gpioiic_bbops); 244 } 245 246 int 247 gpioiic_i2c_write_byte(void *cookie, uint8_t byte, int flags) 248 { 249 return i2c_bitbang_write_byte(cookie, byte, flags, &gpioiic_bbops); 250 } 251 252 void 253 gpioiic_bb_set_bits(void *cookie, uint32_t bits) 254 { 255 struct gpioiic_softc *sc = cookie; 256 257 gpio_pin_write(sc->sc_gpio, &sc->sc_map, sc->sc_pin_sda, 258 bits & GPIOIIC_SDA ? GPIO_PIN_HIGH : GPIO_PIN_LOW); 259 gpio_pin_write(sc->sc_gpio, &sc->sc_map, sc->sc_pin_scl, 260 bits & GPIOIIC_SCL ? GPIO_PIN_HIGH : GPIO_PIN_LOW); 261 } 262 263 void 264 gpioiic_bb_set_dir(void *cookie, uint32_t bits) 265 { 266 struct gpioiic_softc *sc = cookie; 267 int sda = sc->sc_sda; 268 269 sda &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE); 270 sda |= (bits & GPIOIIC_SDA ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT); 271 if ((sda & GPIO_PIN_PUSHPULL) && !(bits & GPIOIIC_SDA)) 272 sda |= GPIO_PIN_TRISTATE; 273 if (sc->sc_sda != sda) { 274 sc->sc_sda = sda; 275 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, sc->sc_pin_sda, 276 sc->sc_sda); 277 } 278 } 279 280 uint32_t 281 gpioiic_bb_read_bits(void *cookie) 282 { 283 struct gpioiic_softc *sc = cookie; 284 uint32_t bits = 0; 285 286 if (gpio_pin_read(sc->sc_gpio, &sc->sc_map, 287 sc->sc_pin_sda) == GPIO_PIN_HIGH) 288 bits |= GPIOIIC_SDA; 289 if (gpio_pin_read(sc->sc_gpio, &sc->sc_map, 290 sc->sc_pin_scl) == GPIO_PIN_HIGH) 291 bits |= GPIOIIC_SCL; 292 293 return bits; 294 } 295 296 MODULE(MODULE_CLASS_DRIVER, gpioiic, "gpio,iic"); 297 298 #ifdef _MODULE 299 #include "ioconf.c" 300 #endif 301 302 static int 303 gpioiic_modcmd(modcmd_t cmd, void *opaque) 304 { 305 int error; 306 307 error = 0; 308 switch (cmd) { 309 case MODULE_CMD_INIT: 310 #ifdef _MODULE 311 error = config_init_component(cfdriver_ioconf_gpioiic, 312 cfattach_ioconf_gpioiic, cfdata_ioconf_gpioiic); 313 if (error) 314 aprint_error("%s: unable to init component\n", 315 gpioiic_cd.cd_name); 316 #endif 317 break; 318 case MODULE_CMD_FINI: 319 #ifdef _MODULE 320 config_fini_component(cfdriver_ioconf_gpioiic, 321 cfattach_ioconf_gpioiic, cfdata_ioconf_gpioiic); 322 #endif 323 break; 324 default: 325 error = ENOTTY; 326 } 327 return error; 328 } 329
Indexes created Wed Sep 24 15:09:51 GMT 2025