gpioiic.c revision 1.8
1 /* $NetBSD: gpioiic.c,v 1.8 2017/10/28 04:53:56 riastradh Exp $ */ 2 /* $OpenBSD: gpioiic.c,v 1.8 2008/11/24 12:12:12 mbalmer Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Alexander Yurchenko <grange (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: gpioiic.c,v 1.8 2017/10/28 04:53:56 riastradh Exp $"); 22 23 /* 24 * I2C bus bit-banging through GPIO pins. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/device.h> 30 #include <sys/gpio.h> 31 #include <sys/rwlock.h> 32 #include <sys/module.h> 33 34 #include <dev/gpio/gpiovar.h> 35 36 #include <dev/i2c/i2cvar.h> 37 #include <dev/i2c/i2c_bitbang.h> 38 39 #include "ioconf.h" 40 41 #define GPIOIIC_PIN_SDA 0 42 #define GPIOIIC_PIN_SCL 1 43 #define GPIOIIC_NPINS 2 44 45 #define GPIOIIC_SDA 0x01 46 #define GPIOIIC_SCL 0x02 47 48 #define GPIOIIC_PIN_REVERSE 0x01 49 50 struct gpioiic_softc { 51 void * sc_gpio; 52 struct gpio_pinmap sc_map; 53 int _map[GPIOIIC_NPINS]; 54 55 struct i2c_controller sc_i2c_tag; 56 device_t sc_i2c_dev; 57 krwlock_t sc_i2c_lock; 58 59 int sc_pin_sda; 60 int sc_pin_scl; 61 62 int sc_sda; 63 int sc_scl; 64 }; 65 66 int gpioiic_match(device_t, cfdata_t, void *); 67 void gpioiic_attach(device_t, device_t, void *); 68 int gpioiic_detach(device_t, int); 69 70 int gpioiic_i2c_acquire_bus(void *, int); 71 void gpioiic_i2c_release_bus(void *, int); 72 int gpioiic_i2c_send_start(void *, int); 73 int gpioiic_i2c_send_stop(void *, int); 74 int gpioiic_i2c_initiate_xfer(void *, i2c_addr_t, int); 75 int gpioiic_i2c_read_byte(void *, uint8_t *, int); 76 int gpioiic_i2c_write_byte(void *, uint8_t, int); 77 78 void gpioiic_bb_set_bits(void *, uint32_t); 79 void gpioiic_bb_set_dir(void *, uint32_t); 80 uint32_t gpioiic_bb_read_bits(void *); 81 82 CFATTACH_DECL_NEW(gpioiic, sizeof(struct gpioiic_softc), 83 gpioiic_match, gpioiic_attach, gpioiic_detach, NULL); 84 85 static const struct i2c_bitbang_ops gpioiic_bbops = { 86 gpioiic_bb_set_bits, 87 gpioiic_bb_set_dir, 88 gpioiic_bb_read_bits, 89 { GPIOIIC_SDA, GPIOIIC_SCL, GPIOIIC_SDA, 0 } 90 }; 91 92 int 93 gpioiic_match(device_t parent, cfdata_t cf, void *aux) 94 { 95 struct gpio_attach_args *ga = aux; 96 97 if (strcmp(ga->ga_dvname, cf->cf_name)) 98 return 0; 99 100 if (ga->ga_offset == -1) 101 return 0; 102 103 /* Check that we have enough pins */ 104 if (gpio_npins(ga->ga_mask) != GPIOIIC_NPINS) { 105 aprint_debug("%s: invalid pin mask 0x%02x\n", cf->cf_name, 106 ga->ga_mask); 107 return 0; 108 } 109 return 1; 110 } 111 112 void 113 gpioiic_attach(device_t parent, device_t self, void *aux) 114 { 115 struct gpioiic_softc *sc = device_private(self); 116 struct gpio_attach_args *ga = aux; 117 struct i2cbus_attach_args iba; 118 int caps; 119 120 /* Map pins */ 121 sc->sc_gpio = ga->ga_gpio; 122 sc->sc_map.pm_map = sc->_map; 123 124 125 if (gpio_pin_map(sc->sc_gpio, ga->ga_offset, ga->ga_mask, 126 &sc->sc_map)) { 127 aprint_error(": can't map pins\n"); 128 return; 129 } 130 131 if (ga->ga_flags & GPIOIIC_PIN_REVERSE) { 132 sc->sc_pin_sda = GPIOIIC_PIN_SCL; 133 sc->sc_pin_scl = GPIOIIC_PIN_SDA; 134 } else { 135 sc->sc_pin_sda = GPIOIIC_PIN_SDA; 136 sc->sc_pin_scl = GPIOIIC_PIN_SCL; 137 } 138 139 /* Configure SDA pin */ 140 caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, sc->sc_pin_sda); 141 if (!(caps & GPIO_PIN_OUTPUT)) { 142 aprint_error(": SDA pin is unable to drive output\n"); 143 goto fail; 144 } 145 if (!(caps & GPIO_PIN_INPUT)) { 146 aprint_error(": SDA pin is unable to read input\n"); 147 goto fail; 148 } 149 aprint_normal(": SDA[%d]", sc->sc_map.pm_map[sc->sc_pin_sda]); 150 sc->sc_sda = GPIO_PIN_OUTPUT; 151 if (caps & GPIO_PIN_OPENDRAIN) { 152 aprint_normal(" open-drain"); 153 sc->sc_sda |= GPIO_PIN_OPENDRAIN; 154 } else if ((caps & GPIO_PIN_PUSHPULL) && (caps & GPIO_PIN_TRISTATE)) { 155 aprint_normal(" push-pull tri-state"); 156 sc->sc_sda |= GPIO_PIN_PUSHPULL; 157 } 158 if (caps & GPIO_PIN_PULLUP) { 159 aprint_normal(" pull-up"); 160 sc->sc_sda |= GPIO_PIN_PULLUP; 161 } 162 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, sc->sc_pin_sda, sc->sc_sda); 163 164 /* Configure SCL pin */ 165 caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, sc->sc_pin_scl); 166 if (!(caps & GPIO_PIN_OUTPUT)) { 167 aprint_error(": SCL pin is unable to drive output\n"); 168 goto fail; 169 } 170 aprint_normal(", SCL[%d]", sc->sc_map.pm_map[sc->sc_pin_scl]); 171 sc->sc_scl = GPIO_PIN_OUTPUT; 172 if (caps & GPIO_PIN_OPENDRAIN) { 173 aprint_normal(" open-drain"); 174 sc->sc_scl |= GPIO_PIN_OPENDRAIN; 175 if (caps & GPIO_PIN_PULLUP) { 176 aprint_normal(" pull-up"); 177 sc->sc_scl |= GPIO_PIN_PULLUP; 178 } 179 } else if (caps & GPIO_PIN_PUSHPULL) { 180 aprint_normal(" push-pull"); 181 sc->sc_scl |= GPIO_PIN_PUSHPULL; 182 } 183 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, sc->sc_pin_scl, sc->sc_scl); 184 185 aprint_normal("\n"); 186 187 /* Attach I2C bus */ 188 rw_init(&sc->sc_i2c_lock); 189 sc->sc_i2c_tag.ic_cookie = sc; 190 sc->sc_i2c_tag.ic_acquire_bus = gpioiic_i2c_acquire_bus; 191 sc->sc_i2c_tag.ic_release_bus = gpioiic_i2c_release_bus; 192 sc->sc_i2c_tag.ic_send_start = gpioiic_i2c_send_start; 193 sc->sc_i2c_tag.ic_send_stop = gpioiic_i2c_send_stop; 194 sc->sc_i2c_tag.ic_initiate_xfer = gpioiic_i2c_initiate_xfer; 195 sc->sc_i2c_tag.ic_read_byte = gpioiic_i2c_read_byte; 196 sc->sc_i2c_tag.ic_write_byte = gpioiic_i2c_write_byte; 197 sc->sc_i2c_tag.ic_exec = NULL; 198 199 memset(&iba, 0, sizeof(iba)); 200 iba.iba_type = I2C_TYPE_SMBUS; 201 iba.iba_tag = &sc->sc_i2c_tag; 202 sc->sc_i2c_dev = config_found(self, &iba, iicbus_print); 203 204 if (!pmf_device_register(self, NULL, NULL)) 205 aprint_error("%s: could not establish power handler\n", 206 device_xname(self)); 207 return; 208 209 fail: 210 gpio_pin_unmap(sc->sc_gpio, &sc->sc_map); 211 } 212 213 int 214 gpioiic_detach(device_t self, int flags) 215 { 216 struct gpioiic_softc *sc = device_private(self); 217 int rv = 0; 218 219 if (sc->sc_i2c_dev != NULL) 220 rv = config_detach(sc->sc_i2c_dev, flags); 221 222 if (!rv) { 223 gpio_pin_unmap(sc->sc_gpio, &sc->sc_map); 224 pmf_device_deregister(self); 225 } 226 return rv; 227 } 228 229 int 230 gpioiic_i2c_acquire_bus(void *cookie, int flags) 231 { 232 struct gpioiic_softc *sc = cookie; 233 234 if (flags & I2C_F_POLL) 235 return 1; 236 237 rw_enter(&sc->sc_i2c_lock, RW_WRITER); 238 return 0; 239 } 240 241 void 242 gpioiic_i2c_release_bus(void *cookie, int flags) 243 { 244 struct gpioiic_softc *sc = cookie; 245 246 if (flags & I2C_F_POLL) 247 return; 248 249 rw_exit(&sc->sc_i2c_lock); 250 } 251 252 int 253 gpioiic_i2c_send_start(void *cookie, int flags) 254 { 255 return i2c_bitbang_send_start(cookie, flags, &gpioiic_bbops); 256 } 257 258 int 259 gpioiic_i2c_send_stop(void *cookie, int flags) 260 { 261 return i2c_bitbang_send_stop(cookie, flags, &gpioiic_bbops); 262 } 263 264 int 265 gpioiic_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 266 { 267 return i2c_bitbang_initiate_xfer(cookie, addr, flags, &gpioiic_bbops); 268 } 269 270 int 271 gpioiic_i2c_read_byte(void *cookie, uint8_t *bytep, int flags) 272 { 273 return i2c_bitbang_read_byte(cookie, bytep, flags, &gpioiic_bbops); 274 } 275 276 int 277 gpioiic_i2c_write_byte(void *cookie, uint8_t byte, int flags) 278 { 279 return i2c_bitbang_write_byte(cookie, byte, flags, &gpioiic_bbops); 280 } 281 282 void 283 gpioiic_bb_set_bits(void *cookie, uint32_t bits) 284 { 285 struct gpioiic_softc *sc = cookie; 286 287 gpio_pin_write(sc->sc_gpio, &sc->sc_map, sc->sc_pin_sda, 288 bits & GPIOIIC_SDA ? GPIO_PIN_HIGH : GPIO_PIN_LOW); 289 gpio_pin_write(sc->sc_gpio, &sc->sc_map, sc->sc_pin_scl, 290 bits & GPIOIIC_SCL ? GPIO_PIN_HIGH : GPIO_PIN_LOW); 291 } 292 293 void 294 gpioiic_bb_set_dir(void *cookie, uint32_t bits) 295 { 296 struct gpioiic_softc *sc = cookie; 297 int sda = sc->sc_sda; 298 299 sda &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE); 300 sda |= (bits & GPIOIIC_SDA ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT); 301 if ((sda & GPIO_PIN_PUSHPULL) && !(bits & GPIOIIC_SDA)) 302 sda |= GPIO_PIN_TRISTATE; 303 if (sc->sc_sda != sda) { 304 sc->sc_sda = sda; 305 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, sc->sc_pin_sda, 306 sc->sc_sda); 307 } 308 } 309 310 uint32_t 311 gpioiic_bb_read_bits(void *cookie) 312 { 313 struct gpioiic_softc *sc = cookie; 314 uint32_t bits = 0; 315 316 if (gpio_pin_read(sc->sc_gpio, &sc->sc_map, 317 sc->sc_pin_sda) == GPIO_PIN_HIGH) 318 bits |= GPIOIIC_SDA; 319 if (gpio_pin_read(sc->sc_gpio, &sc->sc_map, 320 sc->sc_pin_scl) == GPIO_PIN_HIGH) 321 bits |= GPIOIIC_SCL; 322 323 return bits; 324 } 325 326 MODULE(MODULE_CLASS_DRIVER, gpioiic, "gpio,iic"); 327 328 #ifdef _MODULE 329 #include "ioconf.c" 330 #endif 331 332 static int 333 gpioiic_modcmd(modcmd_t cmd, void *opaque) 334 { 335 int error; 336 337 error = 0; 338 switch (cmd) { 339 case MODULE_CMD_INIT: 340 #ifdef _MODULE 341 error = config_init_component(cfdriver_ioconf_gpioiic, 342 cfattach_ioconf_gpioiic, cfdata_ioconf_gpioiic); 343 if (error) 344 aprint_error("%s: unable to init component\n", 345 gpioiic_cd.cd_name); 346 #endif 347 break; 348 case MODULE_CMD_FINI: 349 #ifdef _MODULE 350 config_fini_component(cfdriver_ioconf_gpioiic, 351 cfattach_ioconf_gpioiic, cfdata_ioconf_gpioiic); 352 #endif 353 break; 354 default: 355 error = ENOTTY; 356 } 357 return error; 358 } 359
Indexes created Wed Sep 24 05:09:52 GMT 2025