gpioow.c revision 1.15 1 1.15 riastrad /* $NetBSD: gpioow.c,v 1.15 2017/10/28 04:53:56 riastradh Exp $ */
2 1.1 riz /* $OpenBSD: gpioow.c,v 1.1 2006/03/04 16:27:03 grange Exp $ */
3 1.1 riz
4 1.1 riz /*
5 1.1 riz * Copyright (c) 2006 Alexander Yurchenko <grange (at) openbsd.org>
6 1.1 riz *
7 1.1 riz * Permission to use, copy, modify, and distribute this software for any
8 1.1 riz * purpose with or without fee is hereby granted, provided that the above
9 1.1 riz * copyright notice and this permission notice appear in all copies.
10 1.1 riz *
11 1.1 riz * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 riz * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 riz * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 riz * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 riz * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 riz * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 riz * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 riz */
19 1.1 riz
20 1.1 riz #include <sys/cdefs.h>
21 1.15 riastrad __KERNEL_RCSID(0, "$NetBSD: gpioow.c,v 1.15 2017/10/28 04:53:56 riastradh Exp $");
22 1.1 riz
23 1.1 riz /*
24 1.1 riz * 1-Wire bus bit-banging through GPIO pin.
25 1.1 riz */
26 1.1 riz
27 1.1 riz #include <sys/param.h>
28 1.1 riz #include <sys/systm.h>
29 1.1 riz #include <sys/device.h>
30 1.1 riz #include <sys/gpio.h>
31 1.13 mbalmer #include <sys/module.h>
32 1.1 riz
33 1.1 riz #include <dev/gpio/gpiovar.h>
34 1.1 riz
35 1.1 riz #include <dev/onewire/onewirevar.h>
36 1.1 riz
37 1.15 riastrad #include "ioconf.h"
38 1.15 riastrad
39 1.1 riz #define GPIOOW_NPINS 1
40 1.1 riz #define GPIOOW_PIN_DATA 0
41 1.1 riz
42 1.1 riz struct gpioow_softc {
43 1.1 riz void * sc_gpio;
44 1.1 riz struct gpio_pinmap sc_map;
45 1.10 mbalmer int _map[GPIOOW_NPINS];
46 1.1 riz
47 1.1 riz struct onewire_bus sc_ow_bus;
48 1.5 xtraeme device_t sc_ow_dev;
49 1.1 riz
50 1.1 riz int sc_data;
51 1.1 riz int sc_dying;
52 1.1 riz };
53 1.1 riz
54 1.4 cegger int gpioow_match(device_t, cfdata_t, void *);
55 1.4 cegger void gpioow_attach(device_t, device_t, void *);
56 1.4 cegger int gpioow_detach(device_t, int);
57 1.4 cegger int gpioow_activate(device_t, enum devact);
58 1.1 riz
59 1.1 riz int gpioow_ow_reset(void *);
60 1.1 riz int gpioow_ow_bit(void *, int);
61 1.1 riz
62 1.1 riz void gpioow_bb_rx(void *);
63 1.1 riz void gpioow_bb_tx(void *);
64 1.1 riz int gpioow_bb_get(void *);
65 1.1 riz void gpioow_bb_set(void *, int);
66 1.1 riz
67 1.5 xtraeme CFATTACH_DECL_NEW(gpioow, sizeof(struct gpioow_softc),
68 1.1 riz gpioow_match, gpioow_attach, gpioow_detach, gpioow_activate);
69 1.1 riz
70 1.1 riz static const struct onewire_bbops gpioow_bbops = {
71 1.1 riz gpioow_bb_rx,
72 1.1 riz gpioow_bb_tx,
73 1.1 riz gpioow_bb_get,
74 1.1 riz gpioow_bb_set
75 1.1 riz };
76 1.1 riz
77 1.1 riz int
78 1.9 mbalmer gpioow_match(device_t parent, cfdata_t cf, void *aux)
79 1.1 riz {
80 1.7 mbalmer struct gpio_attach_args *ga = aux;
81 1.7 mbalmer
82 1.8 mbalmer if (strcmp(ga->ga_dvname, cf->cf_name))
83 1.8 mbalmer return 0;
84 1.8 mbalmer
85 1.7 mbalmer if (ga->ga_offset == -1)
86 1.7 mbalmer return 0;
87 1.7 mbalmer
88 1.8 mbalmer /* Check that we have enough pins */
89 1.8 mbalmer if (gpio_npins(ga->ga_mask) != GPIOOW_NPINS) {
90 1.14 mbalmer aprint_debug("%s: invalid pin mask 0x%02x\n", cf->cf_name,
91 1.8 mbalmer ga->ga_mask);
92 1.8 mbalmer return 0;
93 1.8 mbalmer }
94 1.8 mbalmer return 1;
95 1.1 riz }
96 1.1 riz
97 1.1 riz void
98 1.4 cegger gpioow_attach(device_t parent, device_t self, void *aux)
99 1.1 riz {
100 1.1 riz struct gpioow_softc *sc = device_private(self);
101 1.1 riz struct gpio_attach_args *ga = aux;
102 1.1 riz struct onewirebus_attach_args oba;
103 1.1 riz int caps;
104 1.1 riz
105 1.1 riz /* Map pins */
106 1.1 riz sc->sc_gpio = ga->ga_gpio;
107 1.10 mbalmer sc->sc_map.pm_map = sc->_map;
108 1.1 riz if (gpio_pin_map(sc->sc_gpio, ga->ga_offset, ga->ga_mask,
109 1.1 riz &sc->sc_map)) {
110 1.8 mbalmer aprint_error(": can't map pins\n");
111 1.13 mbalmer goto finish;
112 1.1 riz }
113 1.1 riz
114 1.1 riz /* Configure data pin */
115 1.1 riz caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA);
116 1.1 riz if (!(caps & GPIO_PIN_OUTPUT)) {
117 1.8 mbalmer aprint_error(": data pin is unable to drive output\n");
118 1.13 mbalmer gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
119 1.13 mbalmer goto finish;
120 1.1 riz }
121 1.1 riz if (!(caps & GPIO_PIN_INPUT)) {
122 1.8 mbalmer aprint_error(": data pin is unable to read input\n");
123 1.13 mbalmer gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
124 1.13 mbalmer goto finish;
125 1.1 riz }
126 1.8 mbalmer aprint_normal(": DATA[%d]", sc->sc_map.pm_map[GPIOOW_PIN_DATA]);
127 1.1 riz sc->sc_data = GPIO_PIN_OUTPUT;
128 1.1 riz if (caps & GPIO_PIN_OPENDRAIN) {
129 1.8 mbalmer aprint_normal(" open-drain");
130 1.1 riz sc->sc_data |= GPIO_PIN_OPENDRAIN;
131 1.1 riz } else if ((caps & GPIO_PIN_PUSHPULL) && (caps & GPIO_PIN_TRISTATE)) {
132 1.8 mbalmer aprint_normal(" push-pull tri-state");
133 1.1 riz sc->sc_data |= GPIO_PIN_PUSHPULL;
134 1.1 riz }
135 1.1 riz if (caps & GPIO_PIN_PULLUP) {
136 1.8 mbalmer aprint_normal(" pull-up");
137 1.1 riz sc->sc_data |= GPIO_PIN_PULLUP;
138 1.1 riz }
139 1.1 riz gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA, sc->sc_data);
140 1.1 riz
141 1.8 mbalmer aprint_normal("\n");
142 1.1 riz
143 1.1 riz /* Attach 1-Wire bus */
144 1.1 riz sc->sc_ow_bus.bus_cookie = sc;
145 1.1 riz sc->sc_ow_bus.bus_reset = gpioow_ow_reset;
146 1.1 riz sc->sc_ow_bus.bus_bit = gpioow_ow_bit;
147 1.1 riz
148 1.6 cegger memset(&oba, 0, sizeof(oba));
149 1.1 riz oba.oba_bus = &sc->sc_ow_bus;
150 1.1 riz sc->sc_ow_dev = config_found(self, &oba, onewirebus_print);
151 1.1 riz
152 1.11 mbalmer if (!pmf_device_register(self, NULL, NULL))
153 1.11 mbalmer aprint_error("%s: could not establish power handler\n",
154 1.11 mbalmer device_xname(self));
155 1.13 mbalmer finish:
156 1.1 riz return;
157 1.1 riz }
158 1.1 riz
159 1.1 riz int
160 1.4 cegger gpioow_detach(device_t self, int flags)
161 1.1 riz {
162 1.1 riz struct gpioow_softc *sc = device_private(self);
163 1.1 riz int rv = 0;
164 1.1 riz
165 1.1 riz if (sc->sc_ow_dev != NULL)
166 1.1 riz rv = config_detach(sc->sc_ow_dev, flags);
167 1.1 riz
168 1.11 mbalmer if (!rv) {
169 1.11 mbalmer gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
170 1.11 mbalmer pmf_device_deregister(self);
171 1.11 mbalmer }
172 1.7 mbalmer return rv;
173 1.1 riz }
174 1.1 riz
175 1.1 riz int
176 1.4 cegger gpioow_activate(device_t self, enum devact act)
177 1.1 riz {
178 1.1 riz struct gpioow_softc *sc = device_private(self);
179 1.1 riz
180 1.1 riz switch (act) {
181 1.1 riz case DVACT_DEACTIVATE:
182 1.1 riz sc->sc_dying = 1;
183 1.12 dyoung return 0;
184 1.12 dyoung default:
185 1.12 dyoung return EOPNOTSUPP;
186 1.1 riz }
187 1.1 riz }
188 1.1 riz
189 1.1 riz int
190 1.1 riz gpioow_ow_reset(void *arg)
191 1.1 riz {
192 1.1 riz return (onewire_bb_reset(&gpioow_bbops, arg));
193 1.1 riz }
194 1.1 riz
195 1.1 riz int
196 1.1 riz gpioow_ow_bit(void *arg, int value)
197 1.1 riz {
198 1.1 riz return (onewire_bb_bit(&gpioow_bbops, arg, value));
199 1.1 riz }
200 1.1 riz
201 1.1 riz void
202 1.1 riz gpioow_bb_rx(void *arg)
203 1.1 riz {
204 1.1 riz struct gpioow_softc *sc = arg;
205 1.1 riz int data = sc->sc_data;
206 1.1 riz
207 1.1 riz data &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE);
208 1.1 riz data |= GPIO_PIN_INPUT;
209 1.1 riz if (data & GPIO_PIN_PUSHPULL)
210 1.1 riz data |= GPIO_PIN_TRISTATE;
211 1.1 riz if (sc->sc_data != data) {
212 1.1 riz sc->sc_data = data;
213 1.1 riz gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
214 1.1 riz sc->sc_data);
215 1.1 riz }
216 1.1 riz }
217 1.1 riz
218 1.1 riz void
219 1.1 riz gpioow_bb_tx(void *arg)
220 1.1 riz {
221 1.1 riz struct gpioow_softc *sc = arg;
222 1.1 riz int data = sc->sc_data;
223 1.1 riz
224 1.1 riz data &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE);
225 1.1 riz data |= GPIO_PIN_OUTPUT;
226 1.1 riz if (sc->sc_data != data) {
227 1.1 riz sc->sc_data = data;
228 1.1 riz gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
229 1.1 riz sc->sc_data);
230 1.1 riz }
231 1.1 riz }
232 1.1 riz
233 1.1 riz int
234 1.1 riz gpioow_bb_get(void *arg)
235 1.1 riz {
236 1.1 riz struct gpioow_softc *sc = arg;
237 1.1 riz
238 1.1 riz return (gpio_pin_read(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA) ==
239 1.1 riz GPIO_PIN_HIGH ? 1 : 0);
240 1.1 riz }
241 1.1 riz
242 1.1 riz void
243 1.1 riz gpioow_bb_set(void *arg, int value)
244 1.1 riz {
245 1.1 riz struct gpioow_softc *sc = arg;
246 1.1 riz
247 1.1 riz gpio_pin_write(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
248 1.1 riz value ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
249 1.1 riz }
250 1.13 mbalmer
251 1.13 mbalmer MODULE(MODULE_CLASS_DRIVER, gpioow, "gpio,onewire");
252 1.13 mbalmer
253 1.13 mbalmer #ifdef _MODULE
254 1.13 mbalmer #include "ioconf.c"
255 1.13 mbalmer #endif
256 1.13 mbalmer
257 1.13 mbalmer static int
258 1.13 mbalmer gpioow_modcmd(modcmd_t cmd, void *opaque)
259 1.13 mbalmer {
260 1.13 mbalmer int error;
261 1.13 mbalmer
262 1.13 mbalmer error = 0;
263 1.13 mbalmer switch (cmd) {
264 1.13 mbalmer case MODULE_CMD_INIT:
265 1.13 mbalmer #ifdef _MODULE
266 1.13 mbalmer error = config_init_component(cfdriver_ioconf_gpioow,
267 1.13 mbalmer cfattach_ioconf_gpioow, cfdata_ioconf_gpioow);
268 1.13 mbalmer if (error)
269 1.13 mbalmer aprint_error("%s: unable to init component\n",
270 1.13 mbalmer gpioow_cd.cd_name);
271 1.13 mbalmer #endif
272 1.13 mbalmer break;
273 1.13 mbalmer case MODULE_CMD_FINI:
274 1.13 mbalmer #ifdef _MODULE
275 1.13 mbalmer config_fini_component(cfdriver_ioconf_gpioow,
276 1.13 mbalmer cfattach_ioconf_gpioow, cfdata_ioconf_gpioow);
277 1.13 mbalmer #endif
278 1.13 mbalmer break;
279 1.13 mbalmer default:
280 1.13 mbalmer error = ENOTTY;
281 1.13 mbalmer }
282 1.13 mbalmer return error;
283 1.13 mbalmer }
284