gpioow.c revision 1.3.50.1 1 1.3.50.1 yamt /* $NetBSD: gpioow.c,v 1.3.50.1 2008/05/18 12:33:38 yamt Exp $ */
2 1.1 riz /* $OpenBSD: gpioow.c,v 1.1 2006/03/04 16:27:03 grange Exp $ */
3 1.1 riz
4 1.1 riz /*
5 1.1 riz * Copyright (c) 2006 Alexander Yurchenko <grange (at) openbsd.org>
6 1.1 riz *
7 1.1 riz * Permission to use, copy, modify, and distribute this software for any
8 1.1 riz * purpose with or without fee is hereby granted, provided that the above
9 1.1 riz * copyright notice and this permission notice appear in all copies.
10 1.1 riz *
11 1.1 riz * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 riz * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 riz * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 riz * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 riz * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 riz * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 riz * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 riz */
19 1.1 riz
20 1.1 riz #include <sys/cdefs.h>
21 1.3.50.1 yamt __KERNEL_RCSID(0, "$NetBSD: gpioow.c,v 1.3.50.1 2008/05/18 12:33:38 yamt Exp $");
22 1.1 riz
23 1.1 riz /*
24 1.1 riz * 1-Wire bus bit-banging through GPIO pin.
25 1.1 riz */
26 1.1 riz
27 1.1 riz #include <sys/param.h>
28 1.1 riz #include <sys/systm.h>
29 1.1 riz #include <sys/device.h>
30 1.1 riz #include <sys/gpio.h>
31 1.1 riz
32 1.1 riz #include <dev/gpio/gpiovar.h>
33 1.1 riz
34 1.1 riz #include <dev/onewire/onewirevar.h>
35 1.1 riz
36 1.1 riz #define GPIOOW_NPINS 1
37 1.1 riz #define GPIOOW_PIN_DATA 0
38 1.1 riz
39 1.1 riz struct gpioow_softc {
40 1.1 riz void * sc_gpio;
41 1.1 riz struct gpio_pinmap sc_map;
42 1.1 riz int __map[GPIOOW_NPINS];
43 1.1 riz
44 1.1 riz struct onewire_bus sc_ow_bus;
45 1.3.50.1 yamt device_t sc_ow_dev;
46 1.1 riz
47 1.1 riz int sc_data;
48 1.1 riz int sc_dying;
49 1.1 riz };
50 1.1 riz
51 1.3.50.1 yamt int gpioow_match(device_t, cfdata_t, void *);
52 1.3.50.1 yamt void gpioow_attach(device_t, device_t, void *);
53 1.3.50.1 yamt int gpioow_detach(device_t, int);
54 1.3.50.1 yamt int gpioow_activate(device_t, enum devact);
55 1.1 riz
56 1.1 riz int gpioow_ow_reset(void *);
57 1.1 riz int gpioow_ow_bit(void *, int);
58 1.1 riz
59 1.1 riz void gpioow_bb_rx(void *);
60 1.1 riz void gpioow_bb_tx(void *);
61 1.1 riz int gpioow_bb_get(void *);
62 1.1 riz void gpioow_bb_set(void *, int);
63 1.1 riz
64 1.3.50.1 yamt CFATTACH_DECL_NEW(gpioow, sizeof(struct gpioow_softc),
65 1.1 riz gpioow_match, gpioow_attach, gpioow_detach, gpioow_activate);
66 1.1 riz
67 1.1 riz extern struct cfdriver gpioow_cd;
68 1.1 riz
69 1.1 riz static const struct onewire_bbops gpioow_bbops = {
70 1.1 riz gpioow_bb_rx,
71 1.1 riz gpioow_bb_tx,
72 1.1 riz gpioow_bb_get,
73 1.1 riz gpioow_bb_set
74 1.1 riz };
75 1.1 riz
76 1.1 riz int
77 1.3.50.1 yamt gpioow_match(device_t parent, cfdata_t cf,
78 1.3 christos void *aux)
79 1.1 riz {
80 1.1 riz return 1;
81 1.1 riz }
82 1.1 riz
83 1.1 riz void
84 1.3.50.1 yamt gpioow_attach(device_t parent, device_t self, void *aux)
85 1.1 riz {
86 1.1 riz struct gpioow_softc *sc = device_private(self);
87 1.1 riz struct gpio_attach_args *ga = aux;
88 1.1 riz struct onewirebus_attach_args oba;
89 1.1 riz int caps;
90 1.1 riz
91 1.1 riz /* Check that we have enough pins */
92 1.1 riz if (gpio_npins(ga->ga_mask) != GPIOOW_NPINS) {
93 1.1 riz printf(": invalid pin mask\n");
94 1.1 riz return;
95 1.1 riz }
96 1.1 riz
97 1.1 riz /* Map pins */
98 1.1 riz sc->sc_gpio = ga->ga_gpio;
99 1.1 riz sc->sc_map.pm_map = sc->__map;
100 1.1 riz if (gpio_pin_map(sc->sc_gpio, ga->ga_offset, ga->ga_mask,
101 1.1 riz &sc->sc_map)) {
102 1.1 riz printf(": can't map pins\n");
103 1.1 riz return;
104 1.1 riz }
105 1.1 riz
106 1.1 riz /* Configure data pin */
107 1.1 riz caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA);
108 1.1 riz if (!(caps & GPIO_PIN_OUTPUT)) {
109 1.1 riz printf(": data pin is unable to drive output\n");
110 1.1 riz goto fail;
111 1.1 riz }
112 1.1 riz if (!(caps & GPIO_PIN_INPUT)) {
113 1.1 riz printf(": data pin is unable to read input\n");
114 1.1 riz goto fail;
115 1.1 riz }
116 1.1 riz printf(": DATA[%d]", sc->sc_map.pm_map[GPIOOW_PIN_DATA]);
117 1.1 riz sc->sc_data = GPIO_PIN_OUTPUT;
118 1.1 riz if (caps & GPIO_PIN_OPENDRAIN) {
119 1.1 riz printf(" open-drain");
120 1.1 riz sc->sc_data |= GPIO_PIN_OPENDRAIN;
121 1.1 riz } else if ((caps & GPIO_PIN_PUSHPULL) && (caps & GPIO_PIN_TRISTATE)) {
122 1.1 riz printf(" push-pull tri-state");
123 1.1 riz sc->sc_data |= GPIO_PIN_PUSHPULL;
124 1.1 riz }
125 1.1 riz if (caps & GPIO_PIN_PULLUP) {
126 1.1 riz printf(" pull-up");
127 1.1 riz sc->sc_data |= GPIO_PIN_PULLUP;
128 1.1 riz }
129 1.1 riz gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA, sc->sc_data);
130 1.1 riz
131 1.1 riz printf("\n");
132 1.1 riz
133 1.1 riz /* Attach 1-Wire bus */
134 1.1 riz sc->sc_ow_bus.bus_cookie = sc;
135 1.1 riz sc->sc_ow_bus.bus_reset = gpioow_ow_reset;
136 1.1 riz sc->sc_ow_bus.bus_bit = gpioow_ow_bit;
137 1.1 riz
138 1.1 riz bzero(&oba, sizeof(oba));
139 1.1 riz oba.oba_bus = &sc->sc_ow_bus;
140 1.1 riz sc->sc_ow_dev = config_found(self, &oba, onewirebus_print);
141 1.1 riz
142 1.1 riz return;
143 1.1 riz
144 1.1 riz fail:
145 1.1 riz gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
146 1.1 riz }
147 1.1 riz
148 1.1 riz int
149 1.3.50.1 yamt gpioow_detach(device_t self, int flags)
150 1.1 riz {
151 1.1 riz struct gpioow_softc *sc = device_private(self);
152 1.1 riz int rv = 0;
153 1.1 riz
154 1.1 riz if (sc->sc_ow_dev != NULL)
155 1.1 riz rv = config_detach(sc->sc_ow_dev, flags);
156 1.1 riz
157 1.1 riz return (rv);
158 1.1 riz }
159 1.1 riz
160 1.1 riz int
161 1.3.50.1 yamt gpioow_activate(device_t self, enum devact act)
162 1.1 riz {
163 1.1 riz struct gpioow_softc *sc = device_private(self);
164 1.1 riz int rv = 0;
165 1.1 riz
166 1.1 riz switch (act) {
167 1.1 riz case DVACT_ACTIVATE:
168 1.1 riz return (EOPNOTSUPP);
169 1.1 riz case DVACT_DEACTIVATE:
170 1.1 riz sc->sc_dying = 1;
171 1.1 riz if (sc->sc_ow_dev != NULL)
172 1.1 riz rv = config_deactivate(sc->sc_ow_dev);
173 1.1 riz break;
174 1.1 riz }
175 1.1 riz
176 1.1 riz return (rv);
177 1.1 riz }
178 1.1 riz
179 1.1 riz int
180 1.1 riz gpioow_ow_reset(void *arg)
181 1.1 riz {
182 1.1 riz return (onewire_bb_reset(&gpioow_bbops, arg));
183 1.1 riz }
184 1.1 riz
185 1.1 riz int
186 1.1 riz gpioow_ow_bit(void *arg, int value)
187 1.1 riz {
188 1.1 riz return (onewire_bb_bit(&gpioow_bbops, arg, value));
189 1.1 riz }
190 1.1 riz
191 1.1 riz void
192 1.1 riz gpioow_bb_rx(void *arg)
193 1.1 riz {
194 1.1 riz struct gpioow_softc *sc = arg;
195 1.1 riz int data = sc->sc_data;
196 1.1 riz
197 1.1 riz data &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE);
198 1.1 riz data |= GPIO_PIN_INPUT;
199 1.1 riz if (data & GPIO_PIN_PUSHPULL)
200 1.1 riz data |= GPIO_PIN_TRISTATE;
201 1.1 riz if (sc->sc_data != data) {
202 1.1 riz sc->sc_data = data;
203 1.1 riz gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
204 1.1 riz sc->sc_data);
205 1.1 riz }
206 1.1 riz }
207 1.1 riz
208 1.1 riz void
209 1.1 riz gpioow_bb_tx(void *arg)
210 1.1 riz {
211 1.1 riz struct gpioow_softc *sc = arg;
212 1.1 riz int data = sc->sc_data;
213 1.1 riz
214 1.1 riz data &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE);
215 1.1 riz data |= GPIO_PIN_OUTPUT;
216 1.1 riz if (sc->sc_data != data) {
217 1.1 riz sc->sc_data = data;
218 1.1 riz gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
219 1.1 riz sc->sc_data);
220 1.1 riz }
221 1.1 riz }
222 1.1 riz
223 1.1 riz int
224 1.1 riz gpioow_bb_get(void *arg)
225 1.1 riz {
226 1.1 riz struct gpioow_softc *sc = arg;
227 1.1 riz
228 1.1 riz return (gpio_pin_read(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA) ==
229 1.1 riz GPIO_PIN_HIGH ? 1 : 0);
230 1.1 riz }
231 1.1 riz
232 1.1 riz void
233 1.1 riz gpioow_bb_set(void *arg, int value)
234 1.1 riz {
235 1.1 riz struct gpioow_softc *sc = arg;
236 1.1 riz
237 1.1 riz gpio_pin_write(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
238 1.1 riz value ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
239 1.1 riz }
240