ac100.c revision 1.1.20.1
1 /* $NetBSD: ac100.c,v 1.1.20.1 2018/06/25 07:25:50 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: ac100.c,v 1.1.20.1 2018/06/25 07:25:50 pgoyette Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 40 #include <dev/clock_subr.h> 41 42 #include <dev/i2c/i2cvar.h> 43 44 #define AC100_CHIP_AUDIO_RST_REG 0x00 45 #define AC100_PLL_CTRL1_REG 0x02 46 #define AC100_PLL_CTRL2_REG 0x03 47 #define AC100_SYSCLK_CTRL_REG 0x04 48 #define AC100_MOD_RST_CTRL_REG 0x05 49 #define AC100_ADDA_SR_CTRL_REG 0x06 50 #define AC100_I2S1_LCK_CTRL_REG 0x10 51 #define AC100_I2S1_SDIN_CTRL_REG 0x11 52 #define AC100_I2S1_SDOUT_CTRL_REG 0x12 53 #define AC100_I2S1_DIG_MIXER_REG 0x13 54 #define AC100_I2S1_VOL_CTRL1_REG 0x14 55 #define AC100_I2S1_VOL_CTRL2_REG 0x15 56 #define AC100_I2S1_VOL_CTRL3_REG 0x16 57 #define AC100_I2S1_VOL_CTRL4_REG 0x17 58 #define AC100_I2S1_MXR_GAIN_REG 0x18 59 #define AC100_I2S2_CLK_CTRL_REG 0x20 60 #define AC100_I2S2_SDIN_CTRL_REG 0x21 61 #define AC100_I2S2_SDOUT_CTRL_REG 0x22 62 #define AC100_I2S2_DIG_MIXER_REG 0x23 63 #define AC100_I2S2_VOL_CTRL1_REG 0x24 64 #define AC100_I2S2_VOL_CTRL2_REG 0x26 65 #define AC100_I2S2_MXR_GAIN_REG 0x28 66 #define AC100_I2S3_CLK_CTRL_REG 0x30 67 #define AC100_I2S3_SDIN_CTRL_REG 0x31 68 #define AC100_I2S3_SDOUT_CTRL_REG 0x32 69 #define AC100_I2S3_SGP_CTRL_REG 0x33 70 #define AC100_ADC_DIG_CTRL_REG 0x40 71 72 #define AC100_RTC_RESET_REG 0xc6 73 #define AC100_RTC_CTRL_REG 0xc7 74 #define AC100_RTC_SEC_REG 0xc8 75 #define AC100_RTC_MIN_REG 0xc9 76 #define AC100_RTC_HOU_REG 0xca 77 #define AC100_RTC_WEE_REG 0xcb 78 #define AC100_RTC_DAY_REG 0xcc 79 #define AC100_RTC_MON_REG 0xcd 80 #define AC100_RTC_YEA_REG 0xce 81 #define AC100_RTC_UPD_TRIG_REG 0xcf 82 83 #define AC100_RTC_GP_REG(n) (0xe0 + (n)) 84 85 #define AC100_RTC_CTRL_12H_24H_MODE __BIT(0) 86 87 #define AC100_RTC_UPD_TRIG_WRITE __BIT(15) 88 89 struct ac100_softc { 90 device_t sc_dev; 91 i2c_tag_t sc_i2c; 92 i2c_addr_t sc_addr; 93 94 struct todr_chip_handle sc_todr; 95 }; 96 97 static int ac100_match(device_t, cfdata_t, void *); 98 static void ac100_attach(device_t, device_t, void *); 99 100 static int ac100_rtc_gettime(todr_chip_handle_t, struct clock_ymdhms *); 101 static int ac100_rtc_settime(todr_chip_handle_t, struct clock_ymdhms *); 102 103 static int ac100_read(struct ac100_softc *, uint8_t, uint16_t *); 104 static int ac100_write(struct ac100_softc *, uint8_t, uint16_t); 105 106 CFATTACH_DECL_NEW(ac100ic, sizeof(struct ac100_softc), 107 ac100_match, ac100_attach, NULL, NULL); 108 109 static int 110 ac100_match(device_t parent, cfdata_t match, void *aux) 111 { 112 return I2C_MATCH_ADDRESS_ONLY; /* XXX */ 113 } 114 115 static void 116 ac100_attach(device_t parent, device_t self, void *aux) 117 { 118 struct ac100_softc *sc = device_private(self); 119 struct i2c_attach_args *ia = aux; 120 121 sc->sc_dev = self; 122 sc->sc_i2c = ia->ia_tag; 123 sc->sc_addr = ia->ia_addr; 124 125 aprint_naive("\n"); 126 aprint_normal(": CODEC/RTC\n"); 127 128 iic_acquire_bus(sc->sc_i2c, 0); 129 ac100_write(sc, AC100_RTC_CTRL_REG, AC100_RTC_CTRL_12H_24H_MODE); 130 iic_release_bus(sc->sc_i2c, 0); 131 132 sc->sc_todr.todr_gettime_ymdhms = ac100_rtc_gettime; 133 sc->sc_todr.todr_settime_ymdhms = ac100_rtc_settime; 134 sc->sc_todr.cookie = sc; 135 todr_attach(&sc->sc_todr); 136 } 137 138 static int 139 ac100_read(struct ac100_softc *sc, uint8_t reg, uint16_t *val) 140 { 141 return iic_smbus_read_word(sc->sc_i2c, sc->sc_addr, reg, val, 142 cold ? I2C_F_POLL : 0); 143 } 144 145 static int 146 ac100_write(struct ac100_softc *sc, uint8_t reg, uint16_t val) 147 { 148 return iic_smbus_write_word(sc->sc_i2c, sc->sc_addr, reg, val, 149 cold ? I2C_F_POLL : 0); 150 } 151 152 static int 153 ac100_rtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt) 154 { 155 struct ac100_softc *sc = tch->cookie; 156 uint16_t sec, min, hou, wee, day, mon, yea; 157 158 iic_acquire_bus(sc->sc_i2c, 0); 159 ac100_read(sc, AC100_RTC_SEC_REG, &sec); 160 ac100_read(sc, AC100_RTC_MIN_REG, &min); 161 ac100_read(sc, AC100_RTC_HOU_REG, &hou); 162 ac100_read(sc, AC100_RTC_WEE_REG, &wee); 163 ac100_read(sc, AC100_RTC_DAY_REG, &day); 164 ac100_read(sc, AC100_RTC_MON_REG, &mon); 165 ac100_read(sc, AC100_RTC_YEA_REG, &yea); 166 iic_release_bus(sc->sc_i2c, 0); 167 168 dt->dt_year = POSIX_BASE_YEAR + bcdtobin(yea & 0xff); 169 dt->dt_mon = bcdtobin(mon & 0x1f); 170 dt->dt_day = bcdtobin(day & 0x3f); 171 dt->dt_wday = bcdtobin(wee & 0x7); 172 dt->dt_hour = bcdtobin(hou & 0x3f); 173 dt->dt_min = bcdtobin(min & 0x7f); 174 dt->dt_sec = bcdtobin(sec & 0x7f); 175 176 return 0; 177 } 178 179 static int 180 ac100_rtc_settime(todr_chip_handle_t tch, struct clock_ymdhms *dt) 181 { 182 struct ac100_softc *sc = tch->cookie; 183 184 iic_acquire_bus(sc->sc_i2c, 0); 185 ac100_write(sc, AC100_RTC_SEC_REG, bintobcd(dt->dt_sec) & 0x7f); 186 ac100_write(sc, AC100_RTC_MIN_REG, bintobcd(dt->dt_min) & 0x7f); 187 ac100_write(sc, AC100_RTC_HOU_REG, bintobcd(dt->dt_hour) & 0x3f); 188 ac100_write(sc, AC100_RTC_WEE_REG, bintobcd(dt->dt_wday) & 0x7); 189 ac100_write(sc, AC100_RTC_DAY_REG, bintobcd(dt->dt_day) & 0x3f); 190 ac100_write(sc, AC100_RTC_MON_REG, bintobcd(dt->dt_mon) & 0x1f); 191 ac100_write(sc, AC100_RTC_YEA_REG, 192 bintobcd(dt->dt_year - POSIX_BASE_YEAR) & 0xff); 193 ac100_write(sc, AC100_RTC_UPD_TRIG_REG, AC100_RTC_UPD_TRIG_WRITE); 194 iic_release_bus(sc->sc_i2c, 0); 195 196 return 0; 197 } 198
Indexes created Fri Oct 03 02:09:57 GMT 2025