as3722.c revision 1.4.4.2 1 1.4.4.2 pgoyette /* $NetBSD: as3722.c,v 1.4.4.2 2017/04/26 02:53:11 pgoyette Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.4.4.2 pgoyette #include "opt_fdt.h"
30 1.4.4.2 pgoyette
31 1.1 jmcneill #include <sys/cdefs.h>
32 1.4.4.2 pgoyette __KERNEL_RCSID(0, "$NetBSD: as3722.c,v 1.4.4.2 2017/04/26 02:53:11 pgoyette Exp $");
33 1.1 jmcneill
34 1.1 jmcneill #include <sys/param.h>
35 1.1 jmcneill #include <sys/systm.h>
36 1.1 jmcneill #include <sys/kernel.h>
37 1.1 jmcneill #include <sys/device.h>
38 1.1 jmcneill #include <sys/conf.h>
39 1.1 jmcneill #include <sys/bus.h>
40 1.1 jmcneill #include <sys/kmem.h>
41 1.2 jmcneill #include <sys/wdog.h>
42 1.2 jmcneill
43 1.4.4.2 pgoyette #include <dev/clock_subr.h>
44 1.4.4.2 pgoyette
45 1.2 jmcneill #include <dev/sysmon/sysmonvar.h>
46 1.1 jmcneill
47 1.1 jmcneill #include <dev/i2c/i2cvar.h>
48 1.1 jmcneill #include <dev/i2c/as3722.h>
49 1.1 jmcneill
50 1.4.4.2 pgoyette #ifdef FDT
51 1.4.4.2 pgoyette #include <dev/fdt/fdtvar.h>
52 1.4.4.2 pgoyette #endif
53 1.4.4.2 pgoyette
54 1.4.4.2 pgoyette #define AS3722_START_YEAR 2000
55 1.4.4.2 pgoyette
56 1.4.4.2 pgoyette #define AS3722_SD0_VOLTAGE_REG 0x00
57 1.4.4.2 pgoyette
58 1.2 jmcneill #define AS3722_GPIO0_CTRL_REG 0x08
59 1.2 jmcneill #define AS3722_GPIO0_CTRL_INVERT __BIT(7)
60 1.2 jmcneill #define AS3722_GPIO0_CTRL_IOSF __BITS(6,3)
61 1.2 jmcneill #define AS3722_GPIO0_CTRL_IOSF_GPIO 0
62 1.2 jmcneill #define AS3722_GPIO0_CTRL_IOSF_WATCHDOG 9
63 1.2 jmcneill #define AS3722_GPIO0_CTRL_MODE __BITS(2,0)
64 1.2 jmcneill #define AS3722_GPIO0_CTRL_MODE_PULLDOWN 5
65 1.2 jmcneill
66 1.4.4.2 pgoyette #define AS3722_LDO6_VOLTAGE_REG 0x16
67 1.4.4.2 pgoyette
68 1.1 jmcneill #define AS3722_RESET_CTRL_REG 0x36
69 1.1 jmcneill #define AS3722_RESET_CTRL_POWER_OFF __BIT(1)
70 1.3 jmcneill #define AS3722_RESET_CTRL_FORCE_RESET __BIT(0)
71 1.1 jmcneill
72 1.2 jmcneill #define AS3722_WATCHDOG_CTRL_REG 0x38
73 1.2 jmcneill #define AS3722_WATCHDOG_CTRL_MODE __BITS(2,1)
74 1.2 jmcneill #define AS3722_WATCHDOG_CTRL_ON __BIT(0)
75 1.2 jmcneill
76 1.2 jmcneill #define AS3722_WATCHDOG_TIMER_REG 0x46
77 1.2 jmcneill #define AS3722_WATCHDOG_TIMER_TIMER __BITS(6,0)
78 1.2 jmcneill
79 1.2 jmcneill #define AS3722_WATCHDOG_SIGNAL_REG 0x48
80 1.2 jmcneill #define AS3722_WATCHDOG_SIGNAL_PWM_DIV __BITS(7,6)
81 1.2 jmcneill #define AS3722_WATCHDOG_SIGNAL_SW_SIG __BIT(0)
82 1.2 jmcneill
83 1.4.4.2 pgoyette #define AS3722_LDOCONTROL0_REG 0x4e
84 1.4.4.2 pgoyette
85 1.4.4.2 pgoyette #define AS3722_RTC_CONTROL_REG 0x60
86 1.4.4.2 pgoyette #define AS3722_RTC_CONTROL_RTC_ON __BIT(2)
87 1.4.4.2 pgoyette
88 1.4.4.2 pgoyette #define AS3722_RTC_SECOND_REG 0x61
89 1.4.4.2 pgoyette #define AS3722_RTC_MINUTE_REG 0x62
90 1.4.4.2 pgoyette #define AS3722_RTC_HOUR_REG 0x63
91 1.4.4.2 pgoyette #define AS3722_RTC_DAY_REG 0x64
92 1.4.4.2 pgoyette #define AS3722_RTC_MONTH_REG 0x65
93 1.4.4.2 pgoyette #define AS3722_RTC_YEAR_REG 0x66
94 1.4.4.2 pgoyette #define AS3722_RTC_ACCESS_REG 0x6f
95 1.4.4.2 pgoyette
96 1.1 jmcneill #define AS3722_ASIC_ID1_REG 0x90
97 1.1 jmcneill #define AS3722_ASIC_ID2_REG 0x91
98 1.1 jmcneill
99 1.1 jmcneill struct as3722_softc {
100 1.1 jmcneill device_t sc_dev;
101 1.1 jmcneill i2c_tag_t sc_i2c;
102 1.1 jmcneill i2c_addr_t sc_addr;
103 1.4.4.2 pgoyette int sc_phandle;
104 1.2 jmcneill
105 1.2 jmcneill struct sysmon_wdog sc_smw;
106 1.4.4.2 pgoyette struct todr_chip_handle sc_todr;
107 1.4.4.2 pgoyette };
108 1.4.4.2 pgoyette
109 1.4.4.2 pgoyette #ifdef FDT
110 1.4.4.2 pgoyette static int as3722reg_set_voltage_sd0(device_t, u_int, u_int);
111 1.4.4.2 pgoyette static int as3722reg_get_voltage_sd0(device_t, u_int *);
112 1.4.4.2 pgoyette static int as3722reg_set_voltage_ldo(device_t, u_int, u_int);
113 1.4.4.2 pgoyette static int as3722reg_get_voltage_ldo(device_t, u_int *);
114 1.4.4.2 pgoyette
115 1.4.4.2 pgoyette static const struct as3722regdef {
116 1.4.4.2 pgoyette const char *name;
117 1.4.4.2 pgoyette u_int vsel_reg;
118 1.4.4.2 pgoyette u_int vsel_mask;
119 1.4.4.2 pgoyette u_int enable_reg;
120 1.4.4.2 pgoyette u_int enable_mask;
121 1.4.4.2 pgoyette int (*set)(device_t, u_int, u_int);
122 1.4.4.2 pgoyette int (*get)(device_t, u_int *);
123 1.4.4.2 pgoyette } as3722regdefs[] = {
124 1.4.4.2 pgoyette { .name = "sd0",
125 1.4.4.2 pgoyette .vsel_reg = AS3722_SD0_VOLTAGE_REG,
126 1.4.4.2 pgoyette .vsel_mask = 0x7f,
127 1.4.4.2 pgoyette .set = as3722reg_set_voltage_sd0,
128 1.4.4.2 pgoyette .get = as3722reg_get_voltage_sd0 },
129 1.4.4.2 pgoyette { .name = "ldo6",
130 1.4.4.2 pgoyette .vsel_reg = AS3722_LDO6_VOLTAGE_REG,
131 1.4.4.2 pgoyette .vsel_mask = 0x7f,
132 1.4.4.2 pgoyette .enable_reg = AS3722_LDOCONTROL0_REG,
133 1.4.4.2 pgoyette .enable_mask = 0x40,
134 1.4.4.2 pgoyette .set = as3722reg_set_voltage_ldo,
135 1.4.4.2 pgoyette .get = as3722reg_get_voltage_ldo },
136 1.1 jmcneill };
137 1.1 jmcneill
138 1.4.4.2 pgoyette struct as3722reg_softc {
139 1.4.4.2 pgoyette device_t sc_dev;
140 1.4.4.2 pgoyette int sc_phandle;
141 1.4.4.2 pgoyette const struct as3722regdef *sc_regdef;
142 1.4.4.2 pgoyette };
143 1.4.4.2 pgoyette
144 1.4.4.2 pgoyette struct as3722reg_attach_args {
145 1.4.4.2 pgoyette const struct as3722regdef *reg_def;
146 1.4.4.2 pgoyette int reg_phandle;
147 1.4.4.2 pgoyette };
148 1.4.4.2 pgoyette #endif
149 1.4.4.2 pgoyette
150 1.2 jmcneill #define AS3722_WATCHDOG_DEFAULT_PERIOD 10
151 1.2 jmcneill
152 1.1 jmcneill static int as3722_match(device_t, cfdata_t, void *);
153 1.1 jmcneill static void as3722_attach(device_t, device_t, void *);
154 1.1 jmcneill
155 1.4.4.2 pgoyette static void as3722_wdt_attach(struct as3722_softc *);
156 1.2 jmcneill static int as3722_wdt_setmode(struct sysmon_wdog *);
157 1.2 jmcneill static int as3722_wdt_tickle(struct sysmon_wdog *);
158 1.2 jmcneill
159 1.4.4.2 pgoyette static void as3722_rtc_attach(struct as3722_softc *);
160 1.4.4.2 pgoyette static int as3722_rtc_gettime(todr_chip_handle_t, struct clock_ymdhms *);
161 1.4.4.2 pgoyette static int as3722_rtc_settime(todr_chip_handle_t, struct clock_ymdhms *);
162 1.4.4.2 pgoyette
163 1.4.4.2 pgoyette #ifdef FDT
164 1.4.4.2 pgoyette static void as3722_regulator_attach(struct as3722_softc *);
165 1.4.4.2 pgoyette static int as3722reg_match(device_t, cfdata_t, void *);
166 1.4.4.2 pgoyette static void as3722reg_attach(device_t, device_t, void *);
167 1.4.4.2 pgoyette
168 1.4.4.2 pgoyette static int as3722reg_acquire(device_t);
169 1.4.4.2 pgoyette static void as3722reg_release(device_t);
170 1.4.4.2 pgoyette static int as3722reg_enable(device_t, bool);
171 1.4.4.2 pgoyette static int as3722reg_set_voltage(device_t, u_int, u_int);
172 1.4.4.2 pgoyette static int as3722reg_get_voltage(device_t, u_int *);
173 1.4.4.2 pgoyette
174 1.4.4.2 pgoyette static struct fdtbus_regulator_controller_func as3722reg_funcs = {
175 1.4.4.2 pgoyette .acquire = as3722reg_acquire,
176 1.4.4.2 pgoyette .release = as3722reg_release,
177 1.4.4.2 pgoyette .enable = as3722reg_enable,
178 1.4.4.2 pgoyette .set_voltage = as3722reg_set_voltage,
179 1.4.4.2 pgoyette .get_voltage = as3722reg_get_voltage,
180 1.4.4.2 pgoyette };
181 1.4.4.2 pgoyette #endif
182 1.4.4.2 pgoyette
183 1.1 jmcneill static int as3722_read(struct as3722_softc *, uint8_t, uint8_t *, int);
184 1.1 jmcneill static int as3722_write(struct as3722_softc *, uint8_t, uint8_t, int);
185 1.2 jmcneill static int as3722_set_clear(struct as3722_softc *, uint8_t, uint8_t,
186 1.2 jmcneill uint8_t, int);
187 1.1 jmcneill
188 1.1 jmcneill CFATTACH_DECL_NEW(as3722pmic, sizeof(struct as3722_softc),
189 1.1 jmcneill as3722_match, as3722_attach, NULL, NULL);
190 1.1 jmcneill
191 1.4.4.2 pgoyette #ifdef FDT
192 1.4.4.2 pgoyette CFATTACH_DECL_NEW(as3722reg, sizeof(struct as3722reg_softc),
193 1.4.4.2 pgoyette as3722reg_match, as3722reg_attach, NULL, NULL);
194 1.4.4.2 pgoyette #endif
195 1.4.4.2 pgoyette
196 1.4 jmcneill static const char * as3722_compats[] = {
197 1.4 jmcneill "ams,as3722",
198 1.4 jmcneill NULL
199 1.4 jmcneill };
200 1.4 jmcneill
201 1.1 jmcneill static int
202 1.1 jmcneill as3722_match(device_t parent, cfdata_t match, void *aux)
203 1.1 jmcneill {
204 1.1 jmcneill struct i2c_attach_args *ia = aux;
205 1.1 jmcneill uint8_t reg, id1;
206 1.1 jmcneill int error;
207 1.1 jmcneill
208 1.4 jmcneill if (ia->ia_name == NULL) {
209 1.4 jmcneill iic_acquire_bus(ia->ia_tag, I2C_F_POLL);
210 1.4 jmcneill reg = AS3722_ASIC_ID1_REG;
211 1.4 jmcneill error = iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr,
212 1.4 jmcneill ®, 1, &id1, 1, I2C_F_POLL);
213 1.4 jmcneill iic_release_bus(ia->ia_tag, I2C_F_POLL);
214 1.4 jmcneill
215 1.4 jmcneill if (error == 0 && id1 == 0x0c)
216 1.4 jmcneill return 1;
217 1.4 jmcneill
218 1.4 jmcneill return 0;
219 1.4 jmcneill } else {
220 1.4 jmcneill return iic_compat_match(ia, as3722_compats);
221 1.4 jmcneill }
222 1.1 jmcneill }
223 1.1 jmcneill
224 1.1 jmcneill static void
225 1.1 jmcneill as3722_attach(device_t parent, device_t self, void *aux)
226 1.1 jmcneill {
227 1.1 jmcneill struct as3722_softc * const sc = device_private(self);
228 1.1 jmcneill struct i2c_attach_args *ia = aux;
229 1.1 jmcneill
230 1.1 jmcneill sc->sc_dev = self;
231 1.1 jmcneill sc->sc_i2c = ia->ia_tag;
232 1.1 jmcneill sc->sc_addr = ia->ia_addr;
233 1.4.4.2 pgoyette sc->sc_phandle = ia->ia_cookie;
234 1.1 jmcneill
235 1.1 jmcneill aprint_naive("\n");
236 1.4.4.1 pgoyette aprint_normal(": AMS AS3722\n");
237 1.2 jmcneill
238 1.4.4.2 pgoyette as3722_wdt_attach(sc);
239 1.4.4.2 pgoyette as3722_rtc_attach(sc);
240 1.4.4.2 pgoyette #ifdef FDT
241 1.4.4.2 pgoyette as3722_regulator_attach(sc);
242 1.4.4.2 pgoyette #endif
243 1.4.4.2 pgoyette }
244 1.4.4.2 pgoyette
245 1.4.4.2 pgoyette static void
246 1.4.4.2 pgoyette as3722_wdt_attach(struct as3722_softc *sc)
247 1.4.4.2 pgoyette {
248 1.4.4.2 pgoyette int error;
249 1.4.4.2 pgoyette
250 1.2 jmcneill iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
251 1.2 jmcneill error = as3722_write(sc, AS3722_GPIO0_CTRL_REG,
252 1.2 jmcneill __SHIFTIN(AS3722_GPIO0_CTRL_IOSF_GPIO,
253 1.2 jmcneill AS3722_GPIO0_CTRL_IOSF) |
254 1.2 jmcneill __SHIFTIN(AS3722_GPIO0_CTRL_MODE_PULLDOWN,
255 1.2 jmcneill AS3722_GPIO0_CTRL_MODE),
256 1.2 jmcneill I2C_F_POLL);
257 1.2 jmcneill error += as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
258 1.2 jmcneill __SHIFTIN(1, AS3722_WATCHDOG_CTRL_MODE), 0, I2C_F_POLL);
259 1.2 jmcneill iic_release_bus(sc->sc_i2c, I2C_F_POLL);
260 1.2 jmcneill
261 1.4.4.2 pgoyette if (error) {
262 1.4.4.2 pgoyette aprint_error_dev(sc->sc_dev, "couldn't setup watchdog\n");
263 1.4.4.2 pgoyette return;
264 1.4.4.2 pgoyette }
265 1.2 jmcneill
266 1.4.4.2 pgoyette sc->sc_smw.smw_name = device_xname(sc->sc_dev);
267 1.2 jmcneill sc->sc_smw.smw_cookie = sc;
268 1.2 jmcneill sc->sc_smw.smw_setmode = as3722_wdt_setmode;
269 1.2 jmcneill sc->sc_smw.smw_tickle = as3722_wdt_tickle;
270 1.2 jmcneill sc->sc_smw.smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD;
271 1.2 jmcneill
272 1.4.4.2 pgoyette aprint_normal_dev(sc->sc_dev, "default watchdog period is %u seconds\n",
273 1.2 jmcneill sc->sc_smw.smw_period);
274 1.2 jmcneill
275 1.2 jmcneill if (sysmon_wdog_register(&sc->sc_smw) != 0)
276 1.4.4.2 pgoyette aprint_error_dev(sc->sc_dev, "couldn't register with sysmon\n");
277 1.4.4.2 pgoyette }
278 1.4.4.2 pgoyette
279 1.4.4.2 pgoyette static void
280 1.4.4.2 pgoyette as3722_rtc_attach(struct as3722_softc *sc)
281 1.4.4.2 pgoyette {
282 1.4.4.2 pgoyette int error;
283 1.4.4.2 pgoyette
284 1.4.4.2 pgoyette iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
285 1.4.4.2 pgoyette error = as3722_set_clear(sc, AS3722_RTC_CONTROL_REG,
286 1.4.4.2 pgoyette AS3722_RTC_CONTROL_RTC_ON, 0, I2C_F_POLL);
287 1.4.4.2 pgoyette iic_release_bus(sc->sc_i2c, I2C_F_POLL);
288 1.4.4.2 pgoyette
289 1.4.4.2 pgoyette if (error) {
290 1.4.4.2 pgoyette aprint_error_dev(sc->sc_dev, "couldn't setup RTC\n");
291 1.4.4.2 pgoyette return;
292 1.4.4.2 pgoyette }
293 1.4.4.2 pgoyette
294 1.4.4.2 pgoyette sc->sc_todr.todr_gettime_ymdhms = as3722_rtc_gettime;
295 1.4.4.2 pgoyette sc->sc_todr.todr_settime_ymdhms = as3722_rtc_settime;
296 1.4.4.2 pgoyette sc->sc_todr.cookie = sc;
297 1.4.4.2 pgoyette #ifdef FDT
298 1.4.4.2 pgoyette fdtbus_todr_attach(sc->sc_dev, sc->sc_phandle, &sc->sc_todr);
299 1.4.4.2 pgoyette #else
300 1.4.4.2 pgoyette todr_attach(&sc->sc_todr);
301 1.4.4.2 pgoyette #endif
302 1.1 jmcneill }
303 1.1 jmcneill
304 1.1 jmcneill static int
305 1.1 jmcneill as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val, int flags)
306 1.1 jmcneill {
307 1.1 jmcneill return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr,
308 1.1 jmcneill ®, 1, val, 1, flags);
309 1.1 jmcneill }
310 1.1 jmcneill
311 1.1 jmcneill static int
312 1.1 jmcneill as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val, int flags)
313 1.1 jmcneill {
314 1.1 jmcneill uint8_t buf[2] = { reg, val };
315 1.1 jmcneill return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr,
316 1.1 jmcneill NULL, 0, buf, 2, flags);
317 1.1 jmcneill }
318 1.1 jmcneill
319 1.2 jmcneill static int
320 1.2 jmcneill as3722_set_clear(struct as3722_softc *sc, uint8_t reg, uint8_t set,
321 1.2 jmcneill uint8_t clr, int flags)
322 1.2 jmcneill {
323 1.2 jmcneill uint8_t old, new;
324 1.2 jmcneill int error;
325 1.2 jmcneill
326 1.2 jmcneill error = as3722_read(sc, reg, &old, flags);
327 1.2 jmcneill if (error) {
328 1.2 jmcneill return error;
329 1.2 jmcneill }
330 1.2 jmcneill new = set | (old & ~clr);
331 1.2 jmcneill
332 1.2 jmcneill return as3722_write(sc, reg, new, flags);
333 1.2 jmcneill }
334 1.2 jmcneill
335 1.2 jmcneill static int
336 1.2 jmcneill as3722_wdt_setmode(struct sysmon_wdog *smw)
337 1.2 jmcneill {
338 1.2 jmcneill struct as3722_softc * const sc = smw->smw_cookie;
339 1.2 jmcneill int error;
340 1.2 jmcneill
341 1.2 jmcneill const int flags = (cold ? I2C_F_POLL : 0);
342 1.2 jmcneill
343 1.2 jmcneill if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
344 1.2 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
345 1.2 jmcneill error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
346 1.2 jmcneill 0, AS3722_WATCHDOG_CTRL_ON, flags);
347 1.2 jmcneill iic_release_bus(sc->sc_i2c, flags);
348 1.2 jmcneill return error;
349 1.2 jmcneill }
350 1.2 jmcneill
351 1.2 jmcneill if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
352 1.2 jmcneill smw->smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD;
353 1.2 jmcneill }
354 1.2 jmcneill if (smw->smw_period < 1 || smw->smw_period > 128) {
355 1.2 jmcneill return EINVAL;
356 1.2 jmcneill }
357 1.2 jmcneill sc->sc_smw.smw_period = smw->smw_period;
358 1.2 jmcneill
359 1.2 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
360 1.2 jmcneill error = as3722_set_clear(sc, AS3722_WATCHDOG_TIMER_REG,
361 1.2 jmcneill __SHIFTIN(sc->sc_smw.smw_period - 1, AS3722_WATCHDOG_TIMER_TIMER),
362 1.2 jmcneill AS3722_WATCHDOG_TIMER_TIMER, flags);
363 1.2 jmcneill if (error == 0) {
364 1.2 jmcneill error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
365 1.2 jmcneill AS3722_WATCHDOG_CTRL_ON, 0, flags);
366 1.2 jmcneill }
367 1.2 jmcneill iic_release_bus(sc->sc_i2c, flags);
368 1.2 jmcneill
369 1.2 jmcneill return error;
370 1.2 jmcneill }
371 1.2 jmcneill
372 1.2 jmcneill static int
373 1.2 jmcneill as3722_wdt_tickle(struct sysmon_wdog *smw)
374 1.2 jmcneill {
375 1.2 jmcneill struct as3722_softc * const sc = smw->smw_cookie;
376 1.2 jmcneill int error;
377 1.2 jmcneill
378 1.2 jmcneill const int flags = (cold ? I2C_F_POLL : 0);
379 1.2 jmcneill
380 1.2 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
381 1.2 jmcneill error = as3722_set_clear(sc, AS3722_WATCHDOG_SIGNAL_REG,
382 1.2 jmcneill AS3722_WATCHDOG_SIGNAL_SW_SIG, 0, flags);
383 1.2 jmcneill iic_release_bus(sc->sc_i2c, flags);
384 1.2 jmcneill
385 1.2 jmcneill return error;
386 1.2 jmcneill }
387 1.2 jmcneill
388 1.4.4.2 pgoyette static int
389 1.4.4.2 pgoyette as3722_rtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
390 1.4.4.2 pgoyette {
391 1.4.4.2 pgoyette struct as3722_softc * const sc = tch->cookie;
392 1.4.4.2 pgoyette uint8_t buf[6];
393 1.4.4.2 pgoyette int error = 0;
394 1.4.4.2 pgoyette
395 1.4.4.2 pgoyette const int flags = (cold ? I2C_F_POLL : 0);
396 1.4.4.2 pgoyette
397 1.4.4.2 pgoyette iic_acquire_bus(sc->sc_i2c, flags);
398 1.4.4.2 pgoyette error += as3722_read(sc, AS3722_RTC_SECOND_REG, &buf[0], flags);
399 1.4.4.2 pgoyette error += as3722_read(sc, AS3722_RTC_MINUTE_REG, &buf[1], flags);
400 1.4.4.2 pgoyette error += as3722_read(sc, AS3722_RTC_HOUR_REG, &buf[2], flags);
401 1.4.4.2 pgoyette error += as3722_read(sc, AS3722_RTC_DAY_REG, &buf[3], flags);
402 1.4.4.2 pgoyette error += as3722_read(sc, AS3722_RTC_MONTH_REG, &buf[4], flags);
403 1.4.4.2 pgoyette error += as3722_read(sc, AS3722_RTC_YEAR_REG, &buf[5], flags);
404 1.4.4.2 pgoyette iic_release_bus(sc->sc_i2c, flags);
405 1.4.4.2 pgoyette
406 1.4.4.2 pgoyette if (error)
407 1.4.4.2 pgoyette return error;
408 1.4.4.2 pgoyette
409 1.4.4.2 pgoyette dt->dt_sec = bcdtobin(buf[0] & 0x7f);
410 1.4.4.2 pgoyette dt->dt_min = bcdtobin(buf[1] & 0x7f);
411 1.4.4.2 pgoyette dt->dt_hour = bcdtobin(buf[2] & 0x3f);
412 1.4.4.2 pgoyette dt->dt_day = bcdtobin(buf[3] & 0x3f);
413 1.4.4.2 pgoyette dt->dt_mon = bcdtobin(buf[4] & 0x1f) - 1;
414 1.4.4.2 pgoyette dt->dt_year = AS3722_START_YEAR + bcdtobin(buf[5] & 0x7f);
415 1.4.4.2 pgoyette dt->dt_wday = 0;
416 1.4.4.2 pgoyette
417 1.4.4.2 pgoyette return 0;
418 1.4.4.2 pgoyette }
419 1.4.4.2 pgoyette
420 1.4.4.2 pgoyette static int
421 1.4.4.2 pgoyette as3722_rtc_settime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
422 1.4.4.2 pgoyette {
423 1.4.4.2 pgoyette struct as3722_softc * const sc = tch->cookie;
424 1.4.4.2 pgoyette uint8_t buf[6];
425 1.4.4.2 pgoyette int error = 0;
426 1.4.4.2 pgoyette
427 1.4.4.2 pgoyette if (dt->dt_year < AS3722_START_YEAR)
428 1.4.4.2 pgoyette return EINVAL;
429 1.4.4.2 pgoyette
430 1.4.4.2 pgoyette buf[0] = bintobcd(dt->dt_sec) & 0x7f;
431 1.4.4.2 pgoyette buf[1] = bintobcd(dt->dt_min) & 0x7f;
432 1.4.4.2 pgoyette buf[2] = bintobcd(dt->dt_hour) & 0x3f;
433 1.4.4.2 pgoyette buf[3] = bintobcd(dt->dt_day) & 0x3f;
434 1.4.4.2 pgoyette buf[4] = bintobcd(dt->dt_mon + 1) & 0x1f;
435 1.4.4.2 pgoyette buf[5] = bintobcd(dt->dt_year - AS3722_START_YEAR) & 0x7f;
436 1.4.4.2 pgoyette
437 1.4.4.2 pgoyette const int flags = (cold ? I2C_F_POLL : 0);
438 1.4.4.2 pgoyette
439 1.4.4.2 pgoyette iic_acquire_bus(sc->sc_i2c, flags);
440 1.4.4.2 pgoyette error += as3722_write(sc, AS3722_RTC_SECOND_REG, buf[0], flags);
441 1.4.4.2 pgoyette error += as3722_write(sc, AS3722_RTC_MINUTE_REG, buf[1], flags);
442 1.4.4.2 pgoyette error += as3722_write(sc, AS3722_RTC_HOUR_REG, buf[2], flags);
443 1.4.4.2 pgoyette error += as3722_write(sc, AS3722_RTC_DAY_REG, buf[3], flags);
444 1.4.4.2 pgoyette error += as3722_write(sc, AS3722_RTC_MONTH_REG, buf[4], flags);
445 1.4.4.2 pgoyette error += as3722_write(sc, AS3722_RTC_YEAR_REG, buf[5], flags);
446 1.4.4.2 pgoyette iic_release_bus(sc->sc_i2c, flags);
447 1.4.4.2 pgoyette
448 1.4.4.2 pgoyette return error;
449 1.4.4.2 pgoyette }
450 1.4.4.2 pgoyette
451 1.4.4.2 pgoyette #ifdef FDT
452 1.4.4.2 pgoyette static void
453 1.4.4.2 pgoyette as3722_regulator_attach(struct as3722_softc *sc)
454 1.4.4.2 pgoyette {
455 1.4.4.2 pgoyette struct as3722reg_attach_args raa;
456 1.4.4.2 pgoyette int phandle, child;
457 1.4.4.2 pgoyette
458 1.4.4.2 pgoyette phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators");
459 1.4.4.2 pgoyette if (phandle <= 0)
460 1.4.4.2 pgoyette return;
461 1.4.4.2 pgoyette
462 1.4.4.2 pgoyette for (int i = 0; i < __arraycount(as3722regdefs); i++) {
463 1.4.4.2 pgoyette const struct as3722regdef *regdef = &as3722regdefs[i];
464 1.4.4.2 pgoyette child = of_find_firstchild_byname(phandle, regdef->name);
465 1.4.4.2 pgoyette if (child <= 0)
466 1.4.4.2 pgoyette continue;
467 1.4.4.2 pgoyette raa.reg_def = regdef;
468 1.4.4.2 pgoyette raa.reg_phandle = child;
469 1.4.4.2 pgoyette config_found(sc->sc_dev, &raa, NULL);
470 1.4.4.2 pgoyette }
471 1.4.4.2 pgoyette }
472 1.4.4.2 pgoyette
473 1.4.4.2 pgoyette static int
474 1.4.4.2 pgoyette as3722reg_match(device_t parent, cfdata_t match, void *aux)
475 1.4.4.2 pgoyette {
476 1.4.4.2 pgoyette return 1;
477 1.4.4.2 pgoyette }
478 1.4.4.2 pgoyette
479 1.4.4.2 pgoyette static void
480 1.4.4.2 pgoyette as3722reg_attach(device_t parent, device_t self, void *aux)
481 1.4.4.2 pgoyette {
482 1.4.4.2 pgoyette struct as3722reg_softc *sc = device_private(self);
483 1.4.4.2 pgoyette struct as3722reg_attach_args *raa = aux;
484 1.4.4.2 pgoyette char *name = NULL;
485 1.4.4.2 pgoyette int len;
486 1.4.4.2 pgoyette
487 1.4.4.2 pgoyette sc->sc_dev = self;
488 1.4.4.2 pgoyette sc->sc_phandle = raa->reg_phandle;
489 1.4.4.2 pgoyette sc->sc_regdef = raa->reg_def;
490 1.4.4.2 pgoyette
491 1.4.4.2 pgoyette fdtbus_register_regulator_controller(self, sc->sc_phandle,
492 1.4.4.2 pgoyette &as3722reg_funcs);
493 1.4.4.2 pgoyette
494 1.4.4.2 pgoyette len = OF_getproplen(sc->sc_phandle, "regulator-name");
495 1.4.4.2 pgoyette if (len > 0) {
496 1.4.4.2 pgoyette name = kmem_zalloc(len, KM_SLEEP);
497 1.4.4.2 pgoyette OF_getprop(sc->sc_phandle, "regulator-name", name, len);
498 1.4.4.2 pgoyette }
499 1.4.4.2 pgoyette
500 1.4.4.2 pgoyette aprint_naive("\n");
501 1.4.4.2 pgoyette if (name)
502 1.4.4.2 pgoyette aprint_normal(": %s\n", name);
503 1.4.4.2 pgoyette else
504 1.4.4.2 pgoyette aprint_normal("\n");
505 1.4.4.2 pgoyette
506 1.4.4.2 pgoyette if (name)
507 1.4.4.2 pgoyette kmem_free(name, len);
508 1.4.4.2 pgoyette }
509 1.4.4.2 pgoyette
510 1.4.4.2 pgoyette static int
511 1.4.4.2 pgoyette as3722reg_acquire(device_t dev)
512 1.4.4.2 pgoyette {
513 1.4.4.2 pgoyette return 0;
514 1.4.4.2 pgoyette }
515 1.4.4.2 pgoyette
516 1.4.4.2 pgoyette static void
517 1.4.4.2 pgoyette as3722reg_release(device_t dev)
518 1.4.4.2 pgoyette {
519 1.4.4.2 pgoyette }
520 1.4.4.2 pgoyette
521 1.4.4.2 pgoyette static int
522 1.4.4.2 pgoyette as3722reg_enable(device_t dev, bool enable)
523 1.4.4.2 pgoyette {
524 1.4.4.2 pgoyette struct as3722reg_softc *sc = device_private(dev);
525 1.4.4.2 pgoyette struct as3722_softc *asc = device_private(device_parent(dev));
526 1.4.4.2 pgoyette const struct as3722regdef *regdef = sc->sc_regdef;
527 1.4.4.2 pgoyette const int flags = (cold ? I2C_F_POLL : 0);
528 1.4.4.2 pgoyette int error;
529 1.4.4.2 pgoyette
530 1.4.4.2 pgoyette if (!regdef->enable_mask)
531 1.4.4.2 pgoyette return enable ? 0 : EINVAL;
532 1.4.4.2 pgoyette
533 1.4.4.2 pgoyette iic_acquire_bus(asc->sc_i2c, flags);
534 1.4.4.2 pgoyette if (enable)
535 1.4.4.2 pgoyette error = as3722_set_clear(asc, regdef->enable_reg,
536 1.4.4.2 pgoyette regdef->enable_mask, 0, flags);
537 1.4.4.2 pgoyette else
538 1.4.4.2 pgoyette error = as3722_set_clear(asc, regdef->enable_reg,
539 1.4.4.2 pgoyette 0, regdef->enable_mask, flags);
540 1.4.4.2 pgoyette iic_release_bus(asc->sc_i2c, flags);
541 1.4.4.2 pgoyette
542 1.4.4.2 pgoyette return error;
543 1.4.4.2 pgoyette }
544 1.4.4.2 pgoyette
545 1.4.4.2 pgoyette static int
546 1.4.4.2 pgoyette as3722reg_set_voltage_ldo(device_t dev, u_int min_uvol, u_int max_uvol)
547 1.4.4.2 pgoyette {
548 1.4.4.2 pgoyette struct as3722reg_softc *sc = device_private(dev);
549 1.4.4.2 pgoyette struct as3722_softc *asc = device_private(device_parent(dev));
550 1.4.4.2 pgoyette const struct as3722regdef *regdef = sc->sc_regdef;
551 1.4.4.2 pgoyette const int flags = (cold ? I2C_F_POLL : 0);
552 1.4.4.2 pgoyette uint8_t set_v = 0x00;
553 1.4.4.2 pgoyette u_int uvol;
554 1.4.4.2 pgoyette int error;
555 1.4.4.2 pgoyette
556 1.4.4.2 pgoyette for (uint8_t v = 0x01; v <= 0x24; v++) {
557 1.4.4.2 pgoyette uvol = 800000 + (v * 25000);
558 1.4.4.2 pgoyette if (uvol >= min_uvol && uvol <= max_uvol) {
559 1.4.4.2 pgoyette set_v = v;
560 1.4.4.2 pgoyette goto done;
561 1.4.4.2 pgoyette }
562 1.4.4.2 pgoyette }
563 1.4.4.2 pgoyette for (uint8_t v = 0x40; v <= 0x7f; v++) {
564 1.4.4.2 pgoyette uvol = 1725000 + ((v - 0x40) * 25000);
565 1.4.4.2 pgoyette if (uvol >= min_uvol && uvol <= max_uvol) {
566 1.4.4.2 pgoyette set_v = v;
567 1.4.4.2 pgoyette goto done;
568 1.4.4.2 pgoyette }
569 1.4.4.2 pgoyette }
570 1.4.4.2 pgoyette if (set_v == 0)
571 1.4.4.2 pgoyette return ERANGE;
572 1.4.4.2 pgoyette
573 1.4.4.2 pgoyette done:
574 1.4.4.2 pgoyette iic_acquire_bus(asc->sc_i2c, flags);
575 1.4.4.2 pgoyette error = as3722_set_clear(asc, regdef->vsel_reg, set_v,
576 1.4.4.2 pgoyette regdef->vsel_mask, flags);
577 1.4.4.2 pgoyette iic_release_bus(asc->sc_i2c, flags);
578 1.4.4.2 pgoyette
579 1.4.4.2 pgoyette return error;
580 1.4.4.2 pgoyette }
581 1.4.4.2 pgoyette
582 1.4.4.2 pgoyette static int
583 1.4.4.2 pgoyette as3722reg_get_voltage_ldo(device_t dev, u_int *puvol)
584 1.4.4.2 pgoyette {
585 1.4.4.2 pgoyette struct as3722reg_softc *sc = device_private(dev);
586 1.4.4.2 pgoyette struct as3722_softc *asc = device_private(device_parent(dev));
587 1.4.4.2 pgoyette const struct as3722regdef *regdef = sc->sc_regdef;
588 1.4.4.2 pgoyette const int flags = (cold ? I2C_F_POLL : 0);
589 1.4.4.2 pgoyette uint8_t v;
590 1.4.4.2 pgoyette int error;
591 1.4.4.2 pgoyette
592 1.4.4.2 pgoyette iic_acquire_bus(asc->sc_i2c, flags);
593 1.4.4.2 pgoyette error = as3722_read(asc, regdef->vsel_reg, &v, flags);
594 1.4.4.2 pgoyette iic_release_bus(asc->sc_i2c, flags);
595 1.4.4.2 pgoyette if (error != 0)
596 1.4.4.2 pgoyette return error;
597 1.4.4.2 pgoyette
598 1.4.4.2 pgoyette v &= regdef->vsel_mask;
599 1.4.4.2 pgoyette
600 1.4.4.2 pgoyette if (v == 0)
601 1.4.4.2 pgoyette *puvol = 0; /* LDO off */
602 1.4.4.2 pgoyette else if (v >= 0x01 && v <= 0x24)
603 1.4.4.2 pgoyette *puvol = 800000 + (v * 25000);
604 1.4.4.2 pgoyette else if (v >= 0x40 && v <= 0x7f)
605 1.4.4.2 pgoyette *puvol = 1725000 + ((v - 0x40) * 25000);
606 1.4.4.2 pgoyette else
607 1.4.4.2 pgoyette return EINVAL;
608 1.4.4.2 pgoyette
609 1.4.4.2 pgoyette return 0;
610 1.4.4.2 pgoyette }
611 1.4.4.2 pgoyette
612 1.4.4.2 pgoyette static int
613 1.4.4.2 pgoyette as3722reg_set_voltage_sd0(device_t dev, u_int min_uvol, u_int max_uvol)
614 1.4.4.2 pgoyette {
615 1.4.4.2 pgoyette struct as3722reg_softc *sc = device_private(dev);
616 1.4.4.2 pgoyette struct as3722_softc *asc = device_private(device_parent(dev));
617 1.4.4.2 pgoyette const struct as3722regdef *regdef = sc->sc_regdef;
618 1.4.4.2 pgoyette const int flags = (cold ? I2C_F_POLL : 0);
619 1.4.4.2 pgoyette uint8_t set_v = 0x00;
620 1.4.4.2 pgoyette u_int uvol;
621 1.4.4.2 pgoyette int error;
622 1.4.4.2 pgoyette
623 1.4.4.2 pgoyette for (uint8_t v = 0x01; v <= 0x5a; v++) {
624 1.4.4.2 pgoyette uvol = 600000 + (v * 10000);
625 1.4.4.2 pgoyette if (uvol >= min_uvol && uvol <= max_uvol) {
626 1.4.4.2 pgoyette set_v = v;
627 1.4.4.2 pgoyette goto done;
628 1.4.4.2 pgoyette }
629 1.4.4.2 pgoyette }
630 1.4.4.2 pgoyette if (set_v == 0)
631 1.4.4.2 pgoyette return ERANGE;
632 1.4.4.2 pgoyette
633 1.4.4.2 pgoyette done:
634 1.4.4.2 pgoyette iic_acquire_bus(asc->sc_i2c, flags);
635 1.4.4.2 pgoyette error = as3722_set_clear(asc, regdef->vsel_reg, set_v,
636 1.4.4.2 pgoyette regdef->vsel_mask, flags);
637 1.4.4.2 pgoyette iic_release_bus(asc->sc_i2c, flags);
638 1.4.4.2 pgoyette
639 1.4.4.2 pgoyette return error;
640 1.4.4.2 pgoyette }
641 1.4.4.2 pgoyette
642 1.4.4.2 pgoyette static int
643 1.4.4.2 pgoyette as3722reg_get_voltage_sd0(device_t dev, u_int *puvol)
644 1.4.4.2 pgoyette {
645 1.4.4.2 pgoyette struct as3722reg_softc *sc = device_private(dev);
646 1.4.4.2 pgoyette struct as3722_softc *asc = device_private(device_parent(dev));
647 1.4.4.2 pgoyette const struct as3722regdef *regdef = sc->sc_regdef;
648 1.4.4.2 pgoyette const int flags = (cold ? I2C_F_POLL : 0);
649 1.4.4.2 pgoyette uint8_t v;
650 1.4.4.2 pgoyette int error;
651 1.4.4.2 pgoyette
652 1.4.4.2 pgoyette iic_acquire_bus(asc->sc_i2c, flags);
653 1.4.4.2 pgoyette error = as3722_read(asc, regdef->vsel_reg, &v, flags);
654 1.4.4.2 pgoyette iic_release_bus(asc->sc_i2c, flags);
655 1.4.4.2 pgoyette if (error != 0)
656 1.4.4.2 pgoyette return error;
657 1.4.4.2 pgoyette
658 1.4.4.2 pgoyette v &= regdef->vsel_mask;
659 1.4.4.2 pgoyette
660 1.4.4.2 pgoyette if (v == 0)
661 1.4.4.2 pgoyette *puvol = 0; /* DC/DC powered down */
662 1.4.4.2 pgoyette else if (v >= 0x01 && v <= 0x5a)
663 1.4.4.2 pgoyette *puvol = 600000 + (v * 10000);
664 1.4.4.2 pgoyette else
665 1.4.4.2 pgoyette return EINVAL;
666 1.4.4.2 pgoyette
667 1.4.4.2 pgoyette return 0;
668 1.4.4.2 pgoyette }
669 1.4.4.2 pgoyette
670 1.4.4.2 pgoyette static int
671 1.4.4.2 pgoyette as3722reg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol)
672 1.4.4.2 pgoyette {
673 1.4.4.2 pgoyette struct as3722reg_softc *sc = device_private(dev);
674 1.4.4.2 pgoyette const struct as3722regdef *regdef = sc->sc_regdef;
675 1.4.4.2 pgoyette
676 1.4.4.2 pgoyette return regdef->set(dev, min_uvol, max_uvol);
677 1.4.4.2 pgoyette }
678 1.4.4.2 pgoyette
679 1.4.4.2 pgoyette static int
680 1.4.4.2 pgoyette as3722reg_get_voltage(device_t dev, u_int *puvol)
681 1.4.4.2 pgoyette {
682 1.4.4.2 pgoyette struct as3722reg_softc *sc = device_private(dev);
683 1.4.4.2 pgoyette const struct as3722regdef *regdef = sc->sc_regdef;
684 1.4.4.2 pgoyette
685 1.4.4.2 pgoyette return regdef->get(dev, puvol);
686 1.4.4.2 pgoyette }
687 1.4.4.2 pgoyette #endif
688 1.4.4.2 pgoyette
689 1.1 jmcneill int
690 1.1 jmcneill as3722_poweroff(device_t dev)
691 1.1 jmcneill {
692 1.1 jmcneill struct as3722_softc * const sc = device_private(dev);
693 1.1 jmcneill int error;
694 1.1 jmcneill
695 1.1 jmcneill const int flags = I2C_F_POLL;
696 1.1 jmcneill
697 1.1 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
698 1.1 jmcneill error = as3722_write(sc, AS3722_RESET_CTRL_REG,
699 1.1 jmcneill AS3722_RESET_CTRL_POWER_OFF, flags);
700 1.1 jmcneill iic_release_bus(sc->sc_i2c, flags);
701 1.1 jmcneill
702 1.1 jmcneill return error;
703 1.1 jmcneill }
704 1.3 jmcneill
705 1.3 jmcneill int
706 1.3 jmcneill as3722_reboot(device_t dev)
707 1.3 jmcneill {
708 1.3 jmcneill struct as3722_softc * const sc = device_private(dev);
709 1.3 jmcneill int error;
710 1.3 jmcneill
711 1.3 jmcneill const int flags = I2C_F_POLL;
712 1.3 jmcneill
713 1.3 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
714 1.3 jmcneill error = as3722_write(sc, AS3722_RESET_CTRL_REG,
715 1.3 jmcneill AS3722_RESET_CTRL_FORCE_RESET, flags);
716 1.3 jmcneill iic_release_bus(sc->sc_i2c, flags);
717 1.3 jmcneill
718 1.3 jmcneill return error;
719 1.3 jmcneill }
720