as3722.c revision 1.5 1 1.5 jakllsch /* $NetBSD: as3722.c,v 1.5 2016/07/23 19:14:36 jakllsch Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include <sys/cdefs.h>
30 1.5 jakllsch __KERNEL_RCSID(0, "$NetBSD: as3722.c,v 1.5 2016/07/23 19:14:36 jakllsch Exp $");
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/param.h>
33 1.1 jmcneill #include <sys/systm.h>
34 1.1 jmcneill #include <sys/kernel.h>
35 1.1 jmcneill #include <sys/device.h>
36 1.1 jmcneill #include <sys/conf.h>
37 1.1 jmcneill #include <sys/bus.h>
38 1.1 jmcneill #include <sys/kmem.h>
39 1.2 jmcneill #include <sys/wdog.h>
40 1.2 jmcneill
41 1.2 jmcneill #include <dev/sysmon/sysmonvar.h>
42 1.1 jmcneill
43 1.1 jmcneill #include <dev/i2c/i2cvar.h>
44 1.1 jmcneill #include <dev/i2c/as3722.h>
45 1.1 jmcneill
46 1.2 jmcneill #define AS3722_GPIO0_CTRL_REG 0x08
47 1.2 jmcneill #define AS3722_GPIO0_CTRL_INVERT __BIT(7)
48 1.2 jmcneill #define AS3722_GPIO0_CTRL_IOSF __BITS(6,3)
49 1.2 jmcneill #define AS3722_GPIO0_CTRL_IOSF_GPIO 0
50 1.2 jmcneill #define AS3722_GPIO0_CTRL_IOSF_WATCHDOG 9
51 1.2 jmcneill #define AS3722_GPIO0_CTRL_MODE __BITS(2,0)
52 1.2 jmcneill #define AS3722_GPIO0_CTRL_MODE_PULLDOWN 5
53 1.2 jmcneill
54 1.1 jmcneill #define AS3722_RESET_CTRL_REG 0x36
55 1.1 jmcneill #define AS3722_RESET_CTRL_POWER_OFF __BIT(1)
56 1.3 jmcneill #define AS3722_RESET_CTRL_FORCE_RESET __BIT(0)
57 1.1 jmcneill
58 1.2 jmcneill #define AS3722_WATCHDOG_CTRL_REG 0x38
59 1.2 jmcneill #define AS3722_WATCHDOG_CTRL_MODE __BITS(2,1)
60 1.2 jmcneill #define AS3722_WATCHDOG_CTRL_ON __BIT(0)
61 1.2 jmcneill
62 1.2 jmcneill #define AS3722_WATCHDOG_TIMER_REG 0x46
63 1.2 jmcneill #define AS3722_WATCHDOG_TIMER_TIMER __BITS(6,0)
64 1.2 jmcneill
65 1.2 jmcneill #define AS3722_WATCHDOG_SIGNAL_REG 0x48
66 1.2 jmcneill #define AS3722_WATCHDOG_SIGNAL_PWM_DIV __BITS(7,6)
67 1.2 jmcneill #define AS3722_WATCHDOG_SIGNAL_SW_SIG __BIT(0)
68 1.2 jmcneill
69 1.1 jmcneill #define AS3722_ASIC_ID1_REG 0x90
70 1.1 jmcneill #define AS3722_ASIC_ID2_REG 0x91
71 1.1 jmcneill
72 1.1 jmcneill struct as3722_softc {
73 1.1 jmcneill device_t sc_dev;
74 1.1 jmcneill i2c_tag_t sc_i2c;
75 1.1 jmcneill i2c_addr_t sc_addr;
76 1.2 jmcneill
77 1.2 jmcneill struct sysmon_wdog sc_smw;
78 1.1 jmcneill };
79 1.1 jmcneill
80 1.2 jmcneill #define AS3722_WATCHDOG_DEFAULT_PERIOD 10
81 1.2 jmcneill
82 1.1 jmcneill static int as3722_match(device_t, cfdata_t, void *);
83 1.1 jmcneill static void as3722_attach(device_t, device_t, void *);
84 1.1 jmcneill
85 1.2 jmcneill static int as3722_wdt_setmode(struct sysmon_wdog *);
86 1.2 jmcneill static int as3722_wdt_tickle(struct sysmon_wdog *);
87 1.2 jmcneill
88 1.1 jmcneill static int as3722_read(struct as3722_softc *, uint8_t, uint8_t *, int);
89 1.1 jmcneill static int as3722_write(struct as3722_softc *, uint8_t, uint8_t, int);
90 1.2 jmcneill static int as3722_set_clear(struct as3722_softc *, uint8_t, uint8_t,
91 1.2 jmcneill uint8_t, int);
92 1.1 jmcneill
93 1.1 jmcneill CFATTACH_DECL_NEW(as3722pmic, sizeof(struct as3722_softc),
94 1.1 jmcneill as3722_match, as3722_attach, NULL, NULL);
95 1.1 jmcneill
96 1.4 jmcneill static const char * as3722_compats[] = {
97 1.4 jmcneill "ams,as3722",
98 1.4 jmcneill NULL
99 1.4 jmcneill };
100 1.4 jmcneill
101 1.1 jmcneill static int
102 1.1 jmcneill as3722_match(device_t parent, cfdata_t match, void *aux)
103 1.1 jmcneill {
104 1.1 jmcneill struct i2c_attach_args *ia = aux;
105 1.1 jmcneill uint8_t reg, id1;
106 1.1 jmcneill int error;
107 1.1 jmcneill
108 1.4 jmcneill if (ia->ia_name == NULL) {
109 1.4 jmcneill iic_acquire_bus(ia->ia_tag, I2C_F_POLL);
110 1.4 jmcneill reg = AS3722_ASIC_ID1_REG;
111 1.4 jmcneill error = iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr,
112 1.4 jmcneill ®, 1, &id1, 1, I2C_F_POLL);
113 1.4 jmcneill iic_release_bus(ia->ia_tag, I2C_F_POLL);
114 1.4 jmcneill
115 1.4 jmcneill if (error == 0 && id1 == 0x0c)
116 1.4 jmcneill return 1;
117 1.4 jmcneill
118 1.4 jmcneill return 0;
119 1.4 jmcneill } else {
120 1.4 jmcneill return iic_compat_match(ia, as3722_compats);
121 1.4 jmcneill }
122 1.1 jmcneill }
123 1.1 jmcneill
124 1.1 jmcneill static void
125 1.1 jmcneill as3722_attach(device_t parent, device_t self, void *aux)
126 1.1 jmcneill {
127 1.1 jmcneill struct as3722_softc * const sc = device_private(self);
128 1.1 jmcneill struct i2c_attach_args *ia = aux;
129 1.2 jmcneill int error;
130 1.1 jmcneill
131 1.1 jmcneill sc->sc_dev = self;
132 1.1 jmcneill sc->sc_i2c = ia->ia_tag;
133 1.1 jmcneill sc->sc_addr = ia->ia_addr;
134 1.1 jmcneill
135 1.1 jmcneill aprint_naive("\n");
136 1.5 jakllsch aprint_normal(": AMS AS3722\n");
137 1.2 jmcneill
138 1.2 jmcneill iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
139 1.2 jmcneill error = as3722_write(sc, AS3722_GPIO0_CTRL_REG,
140 1.2 jmcneill __SHIFTIN(AS3722_GPIO0_CTRL_IOSF_GPIO,
141 1.2 jmcneill AS3722_GPIO0_CTRL_IOSF) |
142 1.2 jmcneill __SHIFTIN(AS3722_GPIO0_CTRL_MODE_PULLDOWN,
143 1.2 jmcneill AS3722_GPIO0_CTRL_MODE),
144 1.2 jmcneill I2C_F_POLL);
145 1.2 jmcneill error += as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
146 1.2 jmcneill __SHIFTIN(1, AS3722_WATCHDOG_CTRL_MODE), 0, I2C_F_POLL);
147 1.2 jmcneill iic_release_bus(sc->sc_i2c, I2C_F_POLL);
148 1.2 jmcneill
149 1.2 jmcneill if (error)
150 1.2 jmcneill aprint_error_dev(self, "couldn't setup watchdog\n");
151 1.2 jmcneill
152 1.2 jmcneill sc->sc_smw.smw_name = device_xname(self);
153 1.2 jmcneill sc->sc_smw.smw_cookie = sc;
154 1.2 jmcneill sc->sc_smw.smw_setmode = as3722_wdt_setmode;
155 1.2 jmcneill sc->sc_smw.smw_tickle = as3722_wdt_tickle;
156 1.2 jmcneill sc->sc_smw.smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD;
157 1.2 jmcneill
158 1.2 jmcneill aprint_normal_dev(self, "default watchdog period is %u seconds\n",
159 1.2 jmcneill sc->sc_smw.smw_period);
160 1.2 jmcneill
161 1.2 jmcneill if (sysmon_wdog_register(&sc->sc_smw) != 0)
162 1.2 jmcneill aprint_error_dev(self, "couldn't register with sysmon\n");
163 1.1 jmcneill }
164 1.1 jmcneill
165 1.1 jmcneill static int
166 1.1 jmcneill as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val, int flags)
167 1.1 jmcneill {
168 1.1 jmcneill return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr,
169 1.1 jmcneill ®, 1, val, 1, flags);
170 1.1 jmcneill }
171 1.1 jmcneill
172 1.1 jmcneill static int
173 1.1 jmcneill as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val, int flags)
174 1.1 jmcneill {
175 1.1 jmcneill uint8_t buf[2] = { reg, val };
176 1.1 jmcneill return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr,
177 1.1 jmcneill NULL, 0, buf, 2, flags);
178 1.1 jmcneill }
179 1.1 jmcneill
180 1.2 jmcneill static int
181 1.2 jmcneill as3722_set_clear(struct as3722_softc *sc, uint8_t reg, uint8_t set,
182 1.2 jmcneill uint8_t clr, int flags)
183 1.2 jmcneill {
184 1.2 jmcneill uint8_t old, new;
185 1.2 jmcneill int error;
186 1.2 jmcneill
187 1.2 jmcneill error = as3722_read(sc, reg, &old, flags);
188 1.2 jmcneill if (error) {
189 1.2 jmcneill return error;
190 1.2 jmcneill }
191 1.2 jmcneill new = set | (old & ~clr);
192 1.2 jmcneill
193 1.2 jmcneill return as3722_write(sc, reg, new, flags);
194 1.2 jmcneill }
195 1.2 jmcneill
196 1.2 jmcneill static int
197 1.2 jmcneill as3722_wdt_setmode(struct sysmon_wdog *smw)
198 1.2 jmcneill {
199 1.2 jmcneill struct as3722_softc * const sc = smw->smw_cookie;
200 1.2 jmcneill int error;
201 1.2 jmcneill
202 1.2 jmcneill const int flags = (cold ? I2C_F_POLL : 0);
203 1.2 jmcneill
204 1.2 jmcneill if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
205 1.2 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
206 1.2 jmcneill error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
207 1.2 jmcneill 0, AS3722_WATCHDOG_CTRL_ON, flags);
208 1.2 jmcneill iic_release_bus(sc->sc_i2c, flags);
209 1.2 jmcneill return error;
210 1.2 jmcneill }
211 1.2 jmcneill
212 1.2 jmcneill if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
213 1.2 jmcneill smw->smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD;
214 1.2 jmcneill }
215 1.2 jmcneill if (smw->smw_period < 1 || smw->smw_period > 128) {
216 1.2 jmcneill return EINVAL;
217 1.2 jmcneill }
218 1.2 jmcneill sc->sc_smw.smw_period = smw->smw_period;
219 1.2 jmcneill
220 1.2 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
221 1.2 jmcneill error = as3722_set_clear(sc, AS3722_WATCHDOG_TIMER_REG,
222 1.2 jmcneill __SHIFTIN(sc->sc_smw.smw_period - 1, AS3722_WATCHDOG_TIMER_TIMER),
223 1.2 jmcneill AS3722_WATCHDOG_TIMER_TIMER, flags);
224 1.2 jmcneill if (error == 0) {
225 1.2 jmcneill error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
226 1.2 jmcneill AS3722_WATCHDOG_CTRL_ON, 0, flags);
227 1.2 jmcneill }
228 1.2 jmcneill iic_release_bus(sc->sc_i2c, flags);
229 1.2 jmcneill
230 1.2 jmcneill return error;
231 1.2 jmcneill }
232 1.2 jmcneill
233 1.2 jmcneill static int
234 1.2 jmcneill as3722_wdt_tickle(struct sysmon_wdog *smw)
235 1.2 jmcneill {
236 1.2 jmcneill struct as3722_softc * const sc = smw->smw_cookie;
237 1.2 jmcneill int error;
238 1.2 jmcneill
239 1.2 jmcneill const int flags = (cold ? I2C_F_POLL : 0);
240 1.2 jmcneill
241 1.2 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
242 1.2 jmcneill error = as3722_set_clear(sc, AS3722_WATCHDOG_SIGNAL_REG,
243 1.2 jmcneill AS3722_WATCHDOG_SIGNAL_SW_SIG, 0, flags);
244 1.2 jmcneill iic_release_bus(sc->sc_i2c, flags);
245 1.2 jmcneill
246 1.2 jmcneill return error;
247 1.2 jmcneill }
248 1.2 jmcneill
249 1.1 jmcneill int
250 1.1 jmcneill as3722_poweroff(device_t dev)
251 1.1 jmcneill {
252 1.1 jmcneill struct as3722_softc * const sc = device_private(dev);
253 1.1 jmcneill int error;
254 1.1 jmcneill
255 1.1 jmcneill const int flags = I2C_F_POLL;
256 1.1 jmcneill
257 1.1 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
258 1.1 jmcneill error = as3722_write(sc, AS3722_RESET_CTRL_REG,
259 1.1 jmcneill AS3722_RESET_CTRL_POWER_OFF, flags);
260 1.1 jmcneill iic_release_bus(sc->sc_i2c, flags);
261 1.1 jmcneill
262 1.1 jmcneill return error;
263 1.1 jmcneill }
264 1.3 jmcneill
265 1.3 jmcneill int
266 1.3 jmcneill as3722_reboot(device_t dev)
267 1.3 jmcneill {
268 1.3 jmcneill struct as3722_softc * const sc = device_private(dev);
269 1.3 jmcneill int error;
270 1.3 jmcneill
271 1.3 jmcneill const int flags = I2C_F_POLL;
272 1.3 jmcneill
273 1.3 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
274 1.3 jmcneill error = as3722_write(sc, AS3722_RESET_CTRL_REG,
275 1.3 jmcneill AS3722_RESET_CTRL_FORCE_RESET, flags);
276 1.3 jmcneill iic_release_bus(sc->sc_i2c, flags);
277 1.3 jmcneill
278 1.3 jmcneill return error;
279 1.3 jmcneill }
280