as3722.c revision 1.2
1 /* $NetBSD: as3722.c,v 1.2 2015/11/21 10:56:40 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: as3722.c,v 1.2 2015/11/21 10:56:40 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 #include <sys/wdog.h> 40 41 #include <dev/sysmon/sysmonvar.h> 42 43 #include <dev/i2c/i2cvar.h> 44 #include <dev/i2c/as3722.h> 45 46 #define AS3722_GPIO0_CTRL_REG 0x08 47 #define AS3722_GPIO0_CTRL_INVERT __BIT(7) 48 #define AS3722_GPIO0_CTRL_IOSF __BITS(6,3) 49 #define AS3722_GPIO0_CTRL_IOSF_GPIO 0 50 #define AS3722_GPIO0_CTRL_IOSF_WATCHDOG 9 51 #define AS3722_GPIO0_CTRL_MODE __BITS(2,0) 52 #define AS3722_GPIO0_CTRL_MODE_PULLDOWN 5 53 54 #define AS3722_RESET_CTRL_REG 0x36 55 #define AS3722_RESET_CTRL_POWER_OFF __BIT(1) 56 57 #define AS3722_WATCHDOG_CTRL_REG 0x38 58 #define AS3722_WATCHDOG_CTRL_MODE __BITS(2,1) 59 #define AS3722_WATCHDOG_CTRL_ON __BIT(0) 60 61 #define AS3722_WATCHDOG_TIMER_REG 0x46 62 #define AS3722_WATCHDOG_TIMER_TIMER __BITS(6,0) 63 64 #define AS3722_WATCHDOG_SIGNAL_REG 0x48 65 #define AS3722_WATCHDOG_SIGNAL_PWM_DIV __BITS(7,6) 66 #define AS3722_WATCHDOG_SIGNAL_SW_SIG __BIT(0) 67 68 #define AS3722_ASIC_ID1_REG 0x90 69 #define AS3722_ASIC_ID2_REG 0x91 70 71 struct as3722_softc { 72 device_t sc_dev; 73 i2c_tag_t sc_i2c; 74 i2c_addr_t sc_addr; 75 76 struct sysmon_wdog sc_smw; 77 }; 78 79 #define AS3722_WATCHDOG_DEFAULT_PERIOD 10 80 81 static int as3722_match(device_t, cfdata_t, void *); 82 static void as3722_attach(device_t, device_t, void *); 83 84 static int as3722_wdt_setmode(struct sysmon_wdog *); 85 static int as3722_wdt_tickle(struct sysmon_wdog *); 86 87 static int as3722_read(struct as3722_softc *, uint8_t, uint8_t *, int); 88 static int as3722_write(struct as3722_softc *, uint8_t, uint8_t, int); 89 static int as3722_set_clear(struct as3722_softc *, uint8_t, uint8_t, 90 uint8_t, int); 91 92 CFATTACH_DECL_NEW(as3722pmic, sizeof(struct as3722_softc), 93 as3722_match, as3722_attach, NULL, NULL); 94 95 static int 96 as3722_match(device_t parent, cfdata_t match, void *aux) 97 { 98 struct i2c_attach_args *ia = aux; 99 uint8_t reg, id1; 100 int error; 101 102 iic_acquire_bus(ia->ia_tag, I2C_F_POLL); 103 reg = AS3722_ASIC_ID1_REG; 104 error = iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr, 105 ®, 1, &id1, 1, I2C_F_POLL); 106 iic_release_bus(ia->ia_tag, I2C_F_POLL); 107 108 if (error == 0 && id1 == 0x0c) 109 return 1; 110 111 return 0; 112 } 113 114 static void 115 as3722_attach(device_t parent, device_t self, void *aux) 116 { 117 struct as3722_softc * const sc = device_private(self); 118 struct i2c_attach_args *ia = aux; 119 int error; 120 121 sc->sc_dev = self; 122 sc->sc_i2c = ia->ia_tag; 123 sc->sc_addr = ia->ia_addr; 124 125 aprint_naive("\n"); 126 aprint_normal(": AMS AS3822\n"); 127 128 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 129 error = as3722_write(sc, AS3722_GPIO0_CTRL_REG, 130 __SHIFTIN(AS3722_GPIO0_CTRL_IOSF_GPIO, 131 AS3722_GPIO0_CTRL_IOSF) | 132 __SHIFTIN(AS3722_GPIO0_CTRL_MODE_PULLDOWN, 133 AS3722_GPIO0_CTRL_MODE), 134 I2C_F_POLL); 135 error += as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 136 __SHIFTIN(1, AS3722_WATCHDOG_CTRL_MODE), 0, I2C_F_POLL); 137 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 138 139 if (error) 140 aprint_error_dev(self, "couldn't setup watchdog\n"); 141 142 sc->sc_smw.smw_name = device_xname(self); 143 sc->sc_smw.smw_cookie = sc; 144 sc->sc_smw.smw_setmode = as3722_wdt_setmode; 145 sc->sc_smw.smw_tickle = as3722_wdt_tickle; 146 sc->sc_smw.smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD; 147 148 aprint_normal_dev(self, "default watchdog period is %u seconds\n", 149 sc->sc_smw.smw_period); 150 151 if (sysmon_wdog_register(&sc->sc_smw) != 0) 152 aprint_error_dev(self, "couldn't register with sysmon\n"); 153 } 154 155 static int 156 as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val, int flags) 157 { 158 return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr, 159 ®, 1, val, 1, flags); 160 } 161 162 static int 163 as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val, int flags) 164 { 165 uint8_t buf[2] = { reg, val }; 166 return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr, 167 NULL, 0, buf, 2, flags); 168 } 169 170 static int 171 as3722_set_clear(struct as3722_softc *sc, uint8_t reg, uint8_t set, 172 uint8_t clr, int flags) 173 { 174 uint8_t old, new; 175 int error; 176 177 error = as3722_read(sc, reg, &old, flags); 178 if (error) { 179 return error; 180 } 181 new = set | (old & ~clr); 182 183 return as3722_write(sc, reg, new, flags); 184 } 185 186 static int 187 as3722_wdt_setmode(struct sysmon_wdog *smw) 188 { 189 struct as3722_softc * const sc = smw->smw_cookie; 190 int error; 191 192 const int flags = (cold ? I2C_F_POLL : 0); 193 194 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) { 195 iic_acquire_bus(sc->sc_i2c, flags); 196 error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 197 0, AS3722_WATCHDOG_CTRL_ON, flags); 198 iic_release_bus(sc->sc_i2c, flags); 199 return error; 200 } 201 202 if (smw->smw_period == WDOG_PERIOD_DEFAULT) { 203 smw->smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD; 204 } 205 if (smw->smw_period < 1 || smw->smw_period > 128) { 206 return EINVAL; 207 } 208 sc->sc_smw.smw_period = smw->smw_period; 209 210 iic_acquire_bus(sc->sc_i2c, flags); 211 error = as3722_set_clear(sc, AS3722_WATCHDOG_TIMER_REG, 212 __SHIFTIN(sc->sc_smw.smw_period - 1, AS3722_WATCHDOG_TIMER_TIMER), 213 AS3722_WATCHDOG_TIMER_TIMER, flags); 214 if (error == 0) { 215 error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 216 AS3722_WATCHDOG_CTRL_ON, 0, flags); 217 } 218 iic_release_bus(sc->sc_i2c, flags); 219 220 return error; 221 } 222 223 static int 224 as3722_wdt_tickle(struct sysmon_wdog *smw) 225 { 226 struct as3722_softc * const sc = smw->smw_cookie; 227 int error; 228 229 const int flags = (cold ? I2C_F_POLL : 0); 230 231 iic_acquire_bus(sc->sc_i2c, flags); 232 error = as3722_set_clear(sc, AS3722_WATCHDOG_SIGNAL_REG, 233 AS3722_WATCHDOG_SIGNAL_SW_SIG, 0, flags); 234 iic_release_bus(sc->sc_i2c, flags); 235 236 return error; 237 } 238 239 int 240 as3722_poweroff(device_t dev) 241 { 242 struct as3722_softc * const sc = device_private(dev); 243 int error; 244 245 const int flags = I2C_F_POLL; 246 247 iic_acquire_bus(sc->sc_i2c, flags); 248 error = as3722_write(sc, AS3722_RESET_CTRL_REG, 249 AS3722_RESET_CTRL_POWER_OFF, flags); 250 iic_release_bus(sc->sc_i2c, flags); 251 252 return error; 253 } 254
Indexes created Tue Sep 30 20:09:53 GMT 2025