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as3722.c revision 1.3
      1 /* $NetBSD: as3722.c,v 1.3 2015/11/21 12:19:47 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: as3722.c,v 1.3 2015/11/21 12:19:47 jmcneill Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/systm.h>
     34 #include <sys/kernel.h>
     35 #include <sys/device.h>
     36 #include <sys/conf.h>
     37 #include <sys/bus.h>
     38 #include <sys/kmem.h>
     39 #include <sys/wdog.h>
     40 
     41 #include <dev/sysmon/sysmonvar.h>
     42 
     43 #include <dev/i2c/i2cvar.h>
     44 #include <dev/i2c/as3722.h>
     45 
     46 #define AS3722_GPIO0_CTRL_REG		0x08
     47 #define AS3722_GPIO0_CTRL_INVERT	__BIT(7)
     48 #define AS3722_GPIO0_CTRL_IOSF		__BITS(6,3)
     49 #define AS3722_GPIO0_CTRL_IOSF_GPIO	0
     50 #define AS3722_GPIO0_CTRL_IOSF_WATCHDOG	9
     51 #define AS3722_GPIO0_CTRL_MODE		__BITS(2,0)
     52 #define AS3722_GPIO0_CTRL_MODE_PULLDOWN	5
     53 
     54 #define AS3722_RESET_CTRL_REG		0x36
     55 #define AS3722_RESET_CTRL_POWER_OFF	__BIT(1)
     56 #define AS3722_RESET_CTRL_FORCE_RESET	__BIT(0)
     57 
     58 #define AS3722_WATCHDOG_CTRL_REG	0x38
     59 #define AS3722_WATCHDOG_CTRL_MODE	__BITS(2,1)
     60 #define AS3722_WATCHDOG_CTRL_ON		__BIT(0)
     61 
     62 #define AS3722_WATCHDOG_TIMER_REG	0x46
     63 #define AS3722_WATCHDOG_TIMER_TIMER	__BITS(6,0)
     64 
     65 #define AS3722_WATCHDOG_SIGNAL_REG	0x48
     66 #define AS3722_WATCHDOG_SIGNAL_PWM_DIV	__BITS(7,6)
     67 #define AS3722_WATCHDOG_SIGNAL_SW_SIG	__BIT(0)
     68 
     69 #define AS3722_ASIC_ID1_REG		0x90
     70 #define AS3722_ASIC_ID2_REG		0x91
     71 
     72 struct as3722_softc {
     73 	device_t	sc_dev;
     74 	i2c_tag_t	sc_i2c;
     75 	i2c_addr_t	sc_addr;
     76 
     77 	struct sysmon_wdog sc_smw;
     78 };
     79 
     80 #define AS3722_WATCHDOG_DEFAULT_PERIOD	10
     81 
     82 static int	as3722_match(device_t, cfdata_t, void *);
     83 static void	as3722_attach(device_t, device_t, void *);
     84 
     85 static int	as3722_wdt_setmode(struct sysmon_wdog *);
     86 static int	as3722_wdt_tickle(struct sysmon_wdog *);
     87 
     88 static int	as3722_read(struct as3722_softc *, uint8_t, uint8_t *, int);
     89 static int	as3722_write(struct as3722_softc *, uint8_t, uint8_t, int);
     90 static int	as3722_set_clear(struct as3722_softc *, uint8_t, uint8_t,
     91 				 uint8_t, int);
     92 
     93 CFATTACH_DECL_NEW(as3722pmic, sizeof(struct as3722_softc),
     94     as3722_match, as3722_attach, NULL, NULL);
     95 
     96 static int
     97 as3722_match(device_t parent, cfdata_t match, void *aux)
     98 {
     99 	struct i2c_attach_args *ia = aux;
    100 	uint8_t reg, id1;
    101 	int error;
    102 
    103 	iic_acquire_bus(ia->ia_tag, I2C_F_POLL);
    104 	reg = AS3722_ASIC_ID1_REG;
    105 	error = iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr,
    106 	    &reg, 1, &id1, 1, I2C_F_POLL);
    107 	iic_release_bus(ia->ia_tag, I2C_F_POLL);
    108 
    109 	if (error == 0 && id1 == 0x0c)
    110 		return 1;
    111 
    112 	return 0;
    113 }
    114 
    115 static void
    116 as3722_attach(device_t parent, device_t self, void *aux)
    117 {
    118 	struct as3722_softc * const sc = device_private(self);
    119 	struct i2c_attach_args *ia = aux;
    120 	int error;
    121 
    122 	sc->sc_dev = self;
    123 	sc->sc_i2c = ia->ia_tag;
    124 	sc->sc_addr = ia->ia_addr;
    125 
    126 	aprint_naive("\n");
    127 	aprint_normal(": AMS AS3822\n");
    128 
    129 	iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
    130 	error = as3722_write(sc, AS3722_GPIO0_CTRL_REG,
    131 	    __SHIFTIN(AS3722_GPIO0_CTRL_IOSF_GPIO,
    132 		      AS3722_GPIO0_CTRL_IOSF) |
    133 	    __SHIFTIN(AS3722_GPIO0_CTRL_MODE_PULLDOWN,
    134 		      AS3722_GPIO0_CTRL_MODE),
    135 	    I2C_F_POLL);
    136 	error += as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
    137 	    __SHIFTIN(1, AS3722_WATCHDOG_CTRL_MODE), 0, I2C_F_POLL);
    138 	iic_release_bus(sc->sc_i2c, I2C_F_POLL);
    139 
    140 	if (error)
    141 		aprint_error_dev(self, "couldn't setup watchdog\n");
    142 
    143 	sc->sc_smw.smw_name = device_xname(self);
    144 	sc->sc_smw.smw_cookie = sc;
    145 	sc->sc_smw.smw_setmode = as3722_wdt_setmode;
    146 	sc->sc_smw.smw_tickle = as3722_wdt_tickle;
    147 	sc->sc_smw.smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD;
    148 
    149 	aprint_normal_dev(self, "default watchdog period is %u seconds\n",
    150 	    sc->sc_smw.smw_period);
    151 
    152 	if (sysmon_wdog_register(&sc->sc_smw) != 0)
    153 		aprint_error_dev(self, "couldn't register with sysmon\n");
    154 }
    155 
    156 static int
    157 as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val, int flags)
    158 {
    159 	return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr,
    160 	    &reg, 1, val, 1, flags);
    161 }
    162 
    163 static int
    164 as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val, int flags)
    165 {
    166 	uint8_t buf[2] = { reg, val };
    167 	return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr,
    168 	    NULL, 0, buf, 2, flags);
    169 }
    170 
    171 static int
    172 as3722_set_clear(struct as3722_softc *sc, uint8_t reg, uint8_t set,
    173     uint8_t clr, int flags)
    174 {
    175 	uint8_t old, new;
    176 	int error;
    177 
    178 	error = as3722_read(sc, reg, &old, flags);
    179 	if (error) {
    180 		return error;
    181 	}
    182 	new = set | (old & ~clr);
    183 
    184 	return as3722_write(sc, reg, new, flags);
    185 }
    186 
    187 static int
    188 as3722_wdt_setmode(struct sysmon_wdog *smw)
    189 {
    190 	struct as3722_softc * const sc = smw->smw_cookie;
    191 	int error;
    192 
    193 	const int flags = (cold ? I2C_F_POLL : 0);
    194 
    195 	if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
    196 		iic_acquire_bus(sc->sc_i2c, flags);
    197 		error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
    198 		    0, AS3722_WATCHDOG_CTRL_ON, flags);
    199 		iic_release_bus(sc->sc_i2c, flags);
    200 		return error;
    201 	}
    202 
    203 	if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
    204 		smw->smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD;
    205 	}
    206 	if (smw->smw_period < 1 || smw->smw_period > 128) {
    207 		return EINVAL;
    208 	}
    209 	sc->sc_smw.smw_period = smw->smw_period;
    210 
    211 	iic_acquire_bus(sc->sc_i2c, flags);
    212 	error = as3722_set_clear(sc, AS3722_WATCHDOG_TIMER_REG,
    213 	    __SHIFTIN(sc->sc_smw.smw_period - 1, AS3722_WATCHDOG_TIMER_TIMER),
    214 	    AS3722_WATCHDOG_TIMER_TIMER, flags);
    215 	if (error == 0) {
    216 		error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG,
    217 		    AS3722_WATCHDOG_CTRL_ON, 0, flags);
    218 	}
    219 	iic_release_bus(sc->sc_i2c, flags);
    220 
    221 	return error;
    222 }
    223 
    224 static int
    225 as3722_wdt_tickle(struct sysmon_wdog *smw)
    226 {
    227 	struct as3722_softc * const sc = smw->smw_cookie;
    228 	int error;
    229 
    230 	const int flags = (cold ? I2C_F_POLL : 0);
    231 
    232 	iic_acquire_bus(sc->sc_i2c, flags);
    233 	error = as3722_set_clear(sc, AS3722_WATCHDOG_SIGNAL_REG,
    234 	    AS3722_WATCHDOG_SIGNAL_SW_SIG, 0, flags);
    235 	iic_release_bus(sc->sc_i2c, flags);
    236 
    237 	return error;
    238 }
    239 
    240 int
    241 as3722_poweroff(device_t dev)
    242 {
    243 	struct as3722_softc * const sc = device_private(dev);
    244 	int error;
    245 
    246 	const int flags = I2C_F_POLL;
    247 
    248 	iic_acquire_bus(sc->sc_i2c, flags);
    249 	error = as3722_write(sc, AS3722_RESET_CTRL_REG,
    250 	    AS3722_RESET_CTRL_POWER_OFF, flags);
    251 	iic_release_bus(sc->sc_i2c, flags);
    252 
    253 	return error;
    254 }
    255 
    256 int
    257 as3722_reboot(device_t dev)
    258 {
    259 	struct as3722_softc * const sc = device_private(dev);
    260 	int error;
    261 
    262 	const int flags = I2C_F_POLL;
    263 
    264 	iic_acquire_bus(sc->sc_i2c, flags);
    265 	error = as3722_write(sc, AS3722_RESET_CTRL_REG,
    266 	    AS3722_RESET_CTRL_FORCE_RESET, flags);
    267 	iic_release_bus(sc->sc_i2c, flags);
    268 
    269 	return error;
    270 }
    271