as3722.c revision 1.6
1 /* $NetBSD: as3722.c,v 1.6 2017/04/22 13:26:05 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include "opt_fdt.h" 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: as3722.c,v 1.6 2017/04/22 13:26:05 jmcneill Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/conf.h> 39 #include <sys/bus.h> 40 #include <sys/kmem.h> 41 #include <sys/wdog.h> 42 43 #include <dev/clock_subr.h> 44 45 #include <dev/sysmon/sysmonvar.h> 46 47 #include <dev/i2c/i2cvar.h> 48 #include <dev/i2c/as3722.h> 49 50 #ifdef FDT 51 #include <dev/fdt/fdtvar.h> 52 #endif 53 54 #define AS3722_START_YEAR 2000 55 56 #define AS3722_GPIO0_CTRL_REG 0x08 57 #define AS3722_GPIO0_CTRL_INVERT __BIT(7) 58 #define AS3722_GPIO0_CTRL_IOSF __BITS(6,3) 59 #define AS3722_GPIO0_CTRL_IOSF_GPIO 0 60 #define AS3722_GPIO0_CTRL_IOSF_WATCHDOG 9 61 #define AS3722_GPIO0_CTRL_MODE __BITS(2,0) 62 #define AS3722_GPIO0_CTRL_MODE_PULLDOWN 5 63 64 #define AS3722_RESET_CTRL_REG 0x36 65 #define AS3722_RESET_CTRL_POWER_OFF __BIT(1) 66 #define AS3722_RESET_CTRL_FORCE_RESET __BIT(0) 67 68 #define AS3722_WATCHDOG_CTRL_REG 0x38 69 #define AS3722_WATCHDOG_CTRL_MODE __BITS(2,1) 70 #define AS3722_WATCHDOG_CTRL_ON __BIT(0) 71 72 #define AS3722_WATCHDOG_TIMER_REG 0x46 73 #define AS3722_WATCHDOG_TIMER_TIMER __BITS(6,0) 74 75 #define AS3722_WATCHDOG_SIGNAL_REG 0x48 76 #define AS3722_WATCHDOG_SIGNAL_PWM_DIV __BITS(7,6) 77 #define AS3722_WATCHDOG_SIGNAL_SW_SIG __BIT(0) 78 79 #define AS3722_RTC_CONTROL_REG 0x60 80 #define AS3722_RTC_CONTROL_RTC_ON __BIT(2) 81 82 #define AS3722_RTC_SECOND_REG 0x61 83 #define AS3722_RTC_MINUTE_REG 0x62 84 #define AS3722_RTC_HOUR_REG 0x63 85 #define AS3722_RTC_DAY_REG 0x64 86 #define AS3722_RTC_MONTH_REG 0x65 87 #define AS3722_RTC_YEAR_REG 0x66 88 #define AS3722_RTC_ACCESS_REG 0x6f 89 90 #define AS3722_ASIC_ID1_REG 0x90 91 #define AS3722_ASIC_ID2_REG 0x91 92 93 struct as3722_softc { 94 device_t sc_dev; 95 i2c_tag_t sc_i2c; 96 i2c_addr_t sc_addr; 97 int sc_phandle; 98 99 struct sysmon_wdog sc_smw; 100 struct todr_chip_handle sc_todr; 101 }; 102 103 #define AS3722_WATCHDOG_DEFAULT_PERIOD 10 104 105 static int as3722_match(device_t, cfdata_t, void *); 106 static void as3722_attach(device_t, device_t, void *); 107 108 static void as3722_wdt_attach(struct as3722_softc *); 109 static int as3722_wdt_setmode(struct sysmon_wdog *); 110 static int as3722_wdt_tickle(struct sysmon_wdog *); 111 112 static void as3722_rtc_attach(struct as3722_softc *); 113 static int as3722_rtc_gettime(todr_chip_handle_t, struct clock_ymdhms *); 114 static int as3722_rtc_settime(todr_chip_handle_t, struct clock_ymdhms *); 115 116 static int as3722_read(struct as3722_softc *, uint8_t, uint8_t *, int); 117 static int as3722_write(struct as3722_softc *, uint8_t, uint8_t, int); 118 static int as3722_set_clear(struct as3722_softc *, uint8_t, uint8_t, 119 uint8_t, int); 120 121 CFATTACH_DECL_NEW(as3722pmic, sizeof(struct as3722_softc), 122 as3722_match, as3722_attach, NULL, NULL); 123 124 static const char * as3722_compats[] = { 125 "ams,as3722", 126 NULL 127 }; 128 129 static int 130 as3722_match(device_t parent, cfdata_t match, void *aux) 131 { 132 struct i2c_attach_args *ia = aux; 133 uint8_t reg, id1; 134 int error; 135 136 if (ia->ia_name == NULL) { 137 iic_acquire_bus(ia->ia_tag, I2C_F_POLL); 138 reg = AS3722_ASIC_ID1_REG; 139 error = iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr, 140 ®, 1, &id1, 1, I2C_F_POLL); 141 iic_release_bus(ia->ia_tag, I2C_F_POLL); 142 143 if (error == 0 && id1 == 0x0c) 144 return 1; 145 146 return 0; 147 } else { 148 return iic_compat_match(ia, as3722_compats); 149 } 150 } 151 152 static void 153 as3722_attach(device_t parent, device_t self, void *aux) 154 { 155 struct as3722_softc * const sc = device_private(self); 156 struct i2c_attach_args *ia = aux; 157 158 sc->sc_dev = self; 159 sc->sc_i2c = ia->ia_tag; 160 sc->sc_addr = ia->ia_addr; 161 sc->sc_phandle = ia->ia_cookie; 162 163 aprint_naive("\n"); 164 aprint_normal(": AMS AS3722\n"); 165 166 as3722_wdt_attach(sc); 167 as3722_rtc_attach(sc); 168 } 169 170 static void 171 as3722_wdt_attach(struct as3722_softc *sc) 172 { 173 int error; 174 175 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 176 error = as3722_write(sc, AS3722_GPIO0_CTRL_REG, 177 __SHIFTIN(AS3722_GPIO0_CTRL_IOSF_GPIO, 178 AS3722_GPIO0_CTRL_IOSF) | 179 __SHIFTIN(AS3722_GPIO0_CTRL_MODE_PULLDOWN, 180 AS3722_GPIO0_CTRL_MODE), 181 I2C_F_POLL); 182 error += as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 183 __SHIFTIN(1, AS3722_WATCHDOG_CTRL_MODE), 0, I2C_F_POLL); 184 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 185 186 if (error) { 187 aprint_error_dev(sc->sc_dev, "couldn't setup watchdog\n"); 188 return; 189 } 190 191 sc->sc_smw.smw_name = device_xname(sc->sc_dev); 192 sc->sc_smw.smw_cookie = sc; 193 sc->sc_smw.smw_setmode = as3722_wdt_setmode; 194 sc->sc_smw.smw_tickle = as3722_wdt_tickle; 195 sc->sc_smw.smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD; 196 197 aprint_normal_dev(sc->sc_dev, "default watchdog period is %u seconds\n", 198 sc->sc_smw.smw_period); 199 200 if (sysmon_wdog_register(&sc->sc_smw) != 0) 201 aprint_error_dev(sc->sc_dev, "couldn't register with sysmon\n"); 202 } 203 204 static void 205 as3722_rtc_attach(struct as3722_softc *sc) 206 { 207 int error; 208 209 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 210 error = as3722_set_clear(sc, AS3722_RTC_CONTROL_REG, 211 AS3722_RTC_CONTROL_RTC_ON, 0, I2C_F_POLL); 212 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 213 214 if (error) { 215 aprint_error_dev(sc->sc_dev, "couldn't setup RTC\n"); 216 return; 217 } 218 219 sc->sc_todr.todr_gettime_ymdhms = as3722_rtc_gettime; 220 sc->sc_todr.todr_settime_ymdhms = as3722_rtc_settime; 221 sc->sc_todr.cookie = sc; 222 #ifdef FDT 223 fdtbus_todr_attach(sc->sc_dev, sc->sc_phandle, &sc->sc_todr); 224 #else 225 todr_attach(&sc->sc_todr); 226 #endif 227 } 228 229 static int 230 as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val, int flags) 231 { 232 return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr, 233 ®, 1, val, 1, flags); 234 } 235 236 static int 237 as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val, int flags) 238 { 239 uint8_t buf[2] = { reg, val }; 240 return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr, 241 NULL, 0, buf, 2, flags); 242 } 243 244 static int 245 as3722_set_clear(struct as3722_softc *sc, uint8_t reg, uint8_t set, 246 uint8_t clr, int flags) 247 { 248 uint8_t old, new; 249 int error; 250 251 error = as3722_read(sc, reg, &old, flags); 252 if (error) { 253 return error; 254 } 255 new = set | (old & ~clr); 256 257 return as3722_write(sc, reg, new, flags); 258 } 259 260 static int 261 as3722_wdt_setmode(struct sysmon_wdog *smw) 262 { 263 struct as3722_softc * const sc = smw->smw_cookie; 264 int error; 265 266 const int flags = (cold ? I2C_F_POLL : 0); 267 268 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) { 269 iic_acquire_bus(sc->sc_i2c, flags); 270 error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 271 0, AS3722_WATCHDOG_CTRL_ON, flags); 272 iic_release_bus(sc->sc_i2c, flags); 273 return error; 274 } 275 276 if (smw->smw_period == WDOG_PERIOD_DEFAULT) { 277 smw->smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD; 278 } 279 if (smw->smw_period < 1 || smw->smw_period > 128) { 280 return EINVAL; 281 } 282 sc->sc_smw.smw_period = smw->smw_period; 283 284 iic_acquire_bus(sc->sc_i2c, flags); 285 error = as3722_set_clear(sc, AS3722_WATCHDOG_TIMER_REG, 286 __SHIFTIN(sc->sc_smw.smw_period - 1, AS3722_WATCHDOG_TIMER_TIMER), 287 AS3722_WATCHDOG_TIMER_TIMER, flags); 288 if (error == 0) { 289 error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 290 AS3722_WATCHDOG_CTRL_ON, 0, flags); 291 } 292 iic_release_bus(sc->sc_i2c, flags); 293 294 return error; 295 } 296 297 static int 298 as3722_wdt_tickle(struct sysmon_wdog *smw) 299 { 300 struct as3722_softc * const sc = smw->smw_cookie; 301 int error; 302 303 const int flags = (cold ? I2C_F_POLL : 0); 304 305 iic_acquire_bus(sc->sc_i2c, flags); 306 error = as3722_set_clear(sc, AS3722_WATCHDOG_SIGNAL_REG, 307 AS3722_WATCHDOG_SIGNAL_SW_SIG, 0, flags); 308 iic_release_bus(sc->sc_i2c, flags); 309 310 return error; 311 } 312 313 static int 314 as3722_rtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt) 315 { 316 struct as3722_softc * const sc = tch->cookie; 317 uint8_t buf[6]; 318 int error = 0; 319 320 const int flags = (cold ? I2C_F_POLL : 0); 321 322 iic_acquire_bus(sc->sc_i2c, flags); 323 error += as3722_read(sc, AS3722_RTC_SECOND_REG, &buf[0], flags); 324 error += as3722_read(sc, AS3722_RTC_MINUTE_REG, &buf[1], flags); 325 error += as3722_read(sc, AS3722_RTC_HOUR_REG, &buf[2], flags); 326 error += as3722_read(sc, AS3722_RTC_DAY_REG, &buf[3], flags); 327 error += as3722_read(sc, AS3722_RTC_MONTH_REG, &buf[4], flags); 328 error += as3722_read(sc, AS3722_RTC_YEAR_REG, &buf[5], flags); 329 iic_release_bus(sc->sc_i2c, flags); 330 331 if (error) 332 return error; 333 334 dt->dt_sec = bcdtobin(buf[0] & 0x7f); 335 dt->dt_min = bcdtobin(buf[1] & 0x7f); 336 dt->dt_hour = bcdtobin(buf[2] & 0x3f); 337 dt->dt_day = bcdtobin(buf[3] & 0x3f); 338 dt->dt_mon = bcdtobin(buf[4] & 0x1f) - 1; 339 dt->dt_year = AS3722_START_YEAR + bcdtobin(buf[5] & 0x7f); 340 dt->dt_wday = 0; 341 342 return 0; 343 } 344 345 static int 346 as3722_rtc_settime(todr_chip_handle_t tch, struct clock_ymdhms *dt) 347 { 348 struct as3722_softc * const sc = tch->cookie; 349 uint8_t buf[6]; 350 int error = 0; 351 352 if (dt->dt_year < AS3722_START_YEAR) 353 return EINVAL; 354 355 buf[0] = bintobcd(dt->dt_sec) & 0x7f; 356 buf[1] = bintobcd(dt->dt_min) & 0x7f; 357 buf[2] = bintobcd(dt->dt_hour) & 0x3f; 358 buf[3] = bintobcd(dt->dt_day) & 0x3f; 359 buf[4] = bintobcd(dt->dt_mon + 1) & 0x1f; 360 buf[5] = bintobcd(dt->dt_year - AS3722_START_YEAR) & 0x7f; 361 362 const int flags = (cold ? I2C_F_POLL : 0); 363 364 iic_acquire_bus(sc->sc_i2c, flags); 365 error += as3722_write(sc, AS3722_RTC_SECOND_REG, buf[0], flags); 366 error += as3722_write(sc, AS3722_RTC_MINUTE_REG, buf[1], flags); 367 error += as3722_write(sc, AS3722_RTC_HOUR_REG, buf[2], flags); 368 error += as3722_write(sc, AS3722_RTC_DAY_REG, buf[3], flags); 369 error += as3722_write(sc, AS3722_RTC_MONTH_REG, buf[4], flags); 370 error += as3722_write(sc, AS3722_RTC_YEAR_REG, buf[5], flags); 371 iic_release_bus(sc->sc_i2c, flags); 372 373 return error; 374 } 375 376 int 377 as3722_poweroff(device_t dev) 378 { 379 struct as3722_softc * const sc = device_private(dev); 380 int error; 381 382 const int flags = I2C_F_POLL; 383 384 iic_acquire_bus(sc->sc_i2c, flags); 385 error = as3722_write(sc, AS3722_RESET_CTRL_REG, 386 AS3722_RESET_CTRL_POWER_OFF, flags); 387 iic_release_bus(sc->sc_i2c, flags); 388 389 return error; 390 } 391 392 int 393 as3722_reboot(device_t dev) 394 { 395 struct as3722_softc * const sc = device_private(dev); 396 int error; 397 398 const int flags = I2C_F_POLL; 399 400 iic_acquire_bus(sc->sc_i2c, flags); 401 error = as3722_write(sc, AS3722_RESET_CTRL_REG, 402 AS3722_RESET_CTRL_FORCE_RESET, flags); 403 iic_release_bus(sc->sc_i2c, flags); 404 405 return error; 406 } 407
Indexes created Tue Sep 30 11:09:46 GMT 2025