as3722.c revision 1.9.2.1
1 /* $NetBSD: as3722.c,v 1.9.2.1 2017/05/02 03:19:18 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include "opt_fdt.h" 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: as3722.c,v 1.9.2.1 2017/05/02 03:19:18 pgoyette Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/conf.h> 39 #include <sys/bus.h> 40 #include <sys/kmem.h> 41 #include <sys/wdog.h> 42 43 #include <dev/clock_subr.h> 44 45 #include <dev/sysmon/sysmonvar.h> 46 47 #include <dev/i2c/i2cvar.h> 48 #include <dev/i2c/as3722.h> 49 50 #ifdef FDT 51 #include <dev/fdt/fdtvar.h> 52 #endif 53 54 #define AS3722_START_YEAR 2000 55 56 #define AS3722_SD0_VOLTAGE_REG 0x00 57 58 #define AS3722_SD4_VOLTAGE_REG 0x04 59 60 #define AS3722_GPIO0_CTRL_REG 0x08 61 #define AS3722_GPIO0_CTRL_INVERT __BIT(7) 62 #define AS3722_GPIO0_CTRL_IOSF __BITS(6,3) 63 #define AS3722_GPIO0_CTRL_IOSF_GPIO 0 64 #define AS3722_GPIO0_CTRL_IOSF_WATCHDOG 9 65 #define AS3722_GPIO0_CTRL_MODE __BITS(2,0) 66 #define AS3722_GPIO0_CTRL_MODE_PULLDOWN 5 67 68 #define AS3722_LDO6_VOLTAGE_REG 0x16 69 70 #define AS3722_RESET_CTRL_REG 0x36 71 #define AS3722_RESET_CTRL_POWER_OFF __BIT(1) 72 #define AS3722_RESET_CTRL_FORCE_RESET __BIT(0) 73 74 #define AS3722_WATCHDOG_CTRL_REG 0x38 75 #define AS3722_WATCHDOG_CTRL_MODE __BITS(2,1) 76 #define AS3722_WATCHDOG_CTRL_ON __BIT(0) 77 78 #define AS3722_WATCHDOG_TIMER_REG 0x46 79 #define AS3722_WATCHDOG_TIMER_TIMER __BITS(6,0) 80 81 #define AS3722_WATCHDOG_SIGNAL_REG 0x48 82 #define AS3722_WATCHDOG_SIGNAL_PWM_DIV __BITS(7,6) 83 #define AS3722_WATCHDOG_SIGNAL_SW_SIG __BIT(0) 84 85 #define AS3722_SDCONTROL_REG 0x4d 86 #define AS3722_SDCONTROL_SD4_ENABLE __BIT(4) 87 88 #define AS3722_LDOCONTROL0_REG 0x4e 89 90 #define AS3722_RTC_CONTROL_REG 0x60 91 #define AS3722_RTC_CONTROL_RTC_ON __BIT(2) 92 93 #define AS3722_RTC_SECOND_REG 0x61 94 #define AS3722_RTC_MINUTE_REG 0x62 95 #define AS3722_RTC_HOUR_REG 0x63 96 #define AS3722_RTC_DAY_REG 0x64 97 #define AS3722_RTC_MONTH_REG 0x65 98 #define AS3722_RTC_YEAR_REG 0x66 99 #define AS3722_RTC_ACCESS_REG 0x6f 100 101 #define AS3722_ASIC_ID1_REG 0x90 102 #define AS3722_ASIC_ID2_REG 0x91 103 104 #define AS3722_FUSE7_REG 0xa7 105 #define AS3722_FUSE7_SD0_V_MINUS_200MV __BIT(4) 106 107 struct as3722_softc { 108 device_t sc_dev; 109 i2c_tag_t sc_i2c; 110 i2c_addr_t sc_addr; 111 int sc_phandle; 112 int sc_flags; 113 #define AS3722_FLAG_SD0_V_MINUS_200MV 0x01 114 115 struct sysmon_wdog sc_smw; 116 struct todr_chip_handle sc_todr; 117 }; 118 119 #ifdef FDT 120 static int as3722reg_set_voltage_sd0(device_t, u_int, u_int); 121 static int as3722reg_get_voltage_sd0(device_t, u_int *); 122 static int as3722reg_set_voltage_sd4(device_t, u_int, u_int); 123 static int as3722reg_get_voltage_sd4(device_t, u_int *); 124 static int as3722reg_set_voltage_ldo(device_t, u_int, u_int); 125 static int as3722reg_get_voltage_ldo(device_t, u_int *); 126 127 static const struct as3722regdef { 128 const char *name; 129 u_int vsel_reg; 130 u_int vsel_mask; 131 u_int enable_reg; 132 u_int enable_mask; 133 int (*set)(device_t, u_int, u_int); 134 int (*get)(device_t, u_int *); 135 } as3722regdefs[] = { 136 { .name = "sd0", 137 .vsel_reg = AS3722_SD0_VOLTAGE_REG, 138 .vsel_mask = 0x7f, 139 .set = as3722reg_set_voltage_sd0, 140 .get = as3722reg_get_voltage_sd0 }, 141 { .name = "sd4", 142 .vsel_reg = AS3722_SD4_VOLTAGE_REG, 143 .vsel_mask = 0x7f, 144 .enable_reg = AS3722_SDCONTROL_REG, 145 .enable_mask = AS3722_SDCONTROL_SD4_ENABLE, 146 .set = as3722reg_set_voltage_sd4, 147 .get = as3722reg_get_voltage_sd4 }, 148 { .name = "ldo6", 149 .vsel_reg = AS3722_LDO6_VOLTAGE_REG, 150 .vsel_mask = 0x7f, 151 .enable_reg = AS3722_LDOCONTROL0_REG, 152 .enable_mask = 0x40, 153 .set = as3722reg_set_voltage_ldo, 154 .get = as3722reg_get_voltage_ldo }, 155 }; 156 157 struct as3722reg_softc { 158 device_t sc_dev; 159 int sc_phandle; 160 const struct as3722regdef *sc_regdef; 161 }; 162 163 struct as3722reg_attach_args { 164 const struct as3722regdef *reg_def; 165 int reg_phandle; 166 }; 167 #endif 168 169 #define AS3722_WATCHDOG_DEFAULT_PERIOD 10 170 171 static int as3722_match(device_t, cfdata_t, void *); 172 static void as3722_attach(device_t, device_t, void *); 173 174 static void as3722_wdt_attach(struct as3722_softc *); 175 static int as3722_wdt_setmode(struct sysmon_wdog *); 176 static int as3722_wdt_tickle(struct sysmon_wdog *); 177 178 static void as3722_rtc_attach(struct as3722_softc *); 179 static int as3722_rtc_gettime(todr_chip_handle_t, struct clock_ymdhms *); 180 static int as3722_rtc_settime(todr_chip_handle_t, struct clock_ymdhms *); 181 182 #ifdef FDT 183 static void as3722_regulator_attach(struct as3722_softc *); 184 static int as3722reg_match(device_t, cfdata_t, void *); 185 static void as3722reg_attach(device_t, device_t, void *); 186 187 static int as3722reg_acquire(device_t); 188 static void as3722reg_release(device_t); 189 static int as3722reg_enable(device_t, bool); 190 static int as3722reg_set_voltage(device_t, u_int, u_int); 191 static int as3722reg_get_voltage(device_t, u_int *); 192 193 static struct fdtbus_regulator_controller_func as3722reg_funcs = { 194 .acquire = as3722reg_acquire, 195 .release = as3722reg_release, 196 .enable = as3722reg_enable, 197 .set_voltage = as3722reg_set_voltage, 198 .get_voltage = as3722reg_get_voltage, 199 }; 200 #endif 201 202 static int as3722_read(struct as3722_softc *, uint8_t, uint8_t *, int); 203 static int as3722_write(struct as3722_softc *, uint8_t, uint8_t, int); 204 static int as3722_set_clear(struct as3722_softc *, uint8_t, uint8_t, 205 uint8_t, int); 206 207 CFATTACH_DECL_NEW(as3722pmic, sizeof(struct as3722_softc), 208 as3722_match, as3722_attach, NULL, NULL); 209 210 #ifdef FDT 211 CFATTACH_DECL_NEW(as3722reg, sizeof(struct as3722reg_softc), 212 as3722reg_match, as3722reg_attach, NULL, NULL); 213 #endif 214 215 static const char * as3722_compats[] = { 216 "ams,as3722", 217 NULL 218 }; 219 220 static int 221 as3722_match(device_t parent, cfdata_t match, void *aux) 222 { 223 struct i2c_attach_args *ia = aux; 224 uint8_t reg, id1; 225 int error; 226 227 if (ia->ia_name == NULL) { 228 iic_acquire_bus(ia->ia_tag, I2C_F_POLL); 229 reg = AS3722_ASIC_ID1_REG; 230 error = iic_exec(ia->ia_tag, I2C_OP_READ_WITH_STOP, ia->ia_addr, 231 ®, 1, &id1, 1, I2C_F_POLL); 232 iic_release_bus(ia->ia_tag, I2C_F_POLL); 233 234 if (error == 0 && id1 == 0x0c) 235 return 1; 236 237 return 0; 238 } else { 239 return iic_compat_match(ia, as3722_compats); 240 } 241 } 242 243 static void 244 as3722_attach(device_t parent, device_t self, void *aux) 245 { 246 struct as3722_softc * const sc = device_private(self); 247 struct i2c_attach_args *ia = aux; 248 249 sc->sc_dev = self; 250 sc->sc_i2c = ia->ia_tag; 251 sc->sc_addr = ia->ia_addr; 252 sc->sc_phandle = ia->ia_cookie; 253 254 aprint_naive("\n"); 255 aprint_normal(": AMS AS3722\n"); 256 257 as3722_wdt_attach(sc); 258 as3722_rtc_attach(sc); 259 #ifdef FDT 260 as3722_regulator_attach(sc); 261 #endif 262 } 263 264 static void 265 as3722_wdt_attach(struct as3722_softc *sc) 266 { 267 int error; 268 269 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 270 error = as3722_write(sc, AS3722_GPIO0_CTRL_REG, 271 __SHIFTIN(AS3722_GPIO0_CTRL_IOSF_GPIO, 272 AS3722_GPIO0_CTRL_IOSF) | 273 __SHIFTIN(AS3722_GPIO0_CTRL_MODE_PULLDOWN, 274 AS3722_GPIO0_CTRL_MODE), 275 I2C_F_POLL); 276 error += as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 277 __SHIFTIN(1, AS3722_WATCHDOG_CTRL_MODE), 0, I2C_F_POLL); 278 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 279 280 if (error) { 281 aprint_error_dev(sc->sc_dev, "couldn't setup watchdog\n"); 282 return; 283 } 284 285 sc->sc_smw.smw_name = device_xname(sc->sc_dev); 286 sc->sc_smw.smw_cookie = sc; 287 sc->sc_smw.smw_setmode = as3722_wdt_setmode; 288 sc->sc_smw.smw_tickle = as3722_wdt_tickle; 289 sc->sc_smw.smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD; 290 291 aprint_normal_dev(sc->sc_dev, "default watchdog period is %u seconds\n", 292 sc->sc_smw.smw_period); 293 294 if (sysmon_wdog_register(&sc->sc_smw) != 0) 295 aprint_error_dev(sc->sc_dev, "couldn't register with sysmon\n"); 296 } 297 298 static void 299 as3722_rtc_attach(struct as3722_softc *sc) 300 { 301 int error; 302 303 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 304 error = as3722_set_clear(sc, AS3722_RTC_CONTROL_REG, 305 AS3722_RTC_CONTROL_RTC_ON, 0, I2C_F_POLL); 306 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 307 308 if (error) { 309 aprint_error_dev(sc->sc_dev, "couldn't setup RTC\n"); 310 return; 311 } 312 313 sc->sc_todr.todr_gettime_ymdhms = as3722_rtc_gettime; 314 sc->sc_todr.todr_settime_ymdhms = as3722_rtc_settime; 315 sc->sc_todr.cookie = sc; 316 #ifdef FDT 317 fdtbus_todr_attach(sc->sc_dev, sc->sc_phandle, &sc->sc_todr); 318 #else 319 todr_attach(&sc->sc_todr); 320 #endif 321 } 322 323 static int 324 as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val, int flags) 325 { 326 return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr, 327 ®, 1, val, 1, flags); 328 } 329 330 static int 331 as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val, int flags) 332 { 333 uint8_t buf[2] = { reg, val }; 334 return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr, 335 NULL, 0, buf, 2, flags); 336 } 337 338 static int 339 as3722_set_clear(struct as3722_softc *sc, uint8_t reg, uint8_t set, 340 uint8_t clr, int flags) 341 { 342 uint8_t old, new; 343 int error; 344 345 error = as3722_read(sc, reg, &old, flags); 346 if (error) { 347 return error; 348 } 349 new = set | (old & ~clr); 350 351 return as3722_write(sc, reg, new, flags); 352 } 353 354 static int 355 as3722_wdt_setmode(struct sysmon_wdog *smw) 356 { 357 struct as3722_softc * const sc = smw->smw_cookie; 358 int error; 359 360 const int flags = (cold ? I2C_F_POLL : 0); 361 362 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) { 363 iic_acquire_bus(sc->sc_i2c, flags); 364 error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 365 0, AS3722_WATCHDOG_CTRL_ON, flags); 366 iic_release_bus(sc->sc_i2c, flags); 367 return error; 368 } 369 370 if (smw->smw_period == WDOG_PERIOD_DEFAULT) { 371 smw->smw_period = AS3722_WATCHDOG_DEFAULT_PERIOD; 372 } 373 if (smw->smw_period < 1 || smw->smw_period > 128) { 374 return EINVAL; 375 } 376 sc->sc_smw.smw_period = smw->smw_period; 377 378 iic_acquire_bus(sc->sc_i2c, flags); 379 error = as3722_set_clear(sc, AS3722_WATCHDOG_TIMER_REG, 380 __SHIFTIN(sc->sc_smw.smw_period - 1, AS3722_WATCHDOG_TIMER_TIMER), 381 AS3722_WATCHDOG_TIMER_TIMER, flags); 382 if (error == 0) { 383 error = as3722_set_clear(sc, AS3722_WATCHDOG_CTRL_REG, 384 AS3722_WATCHDOG_CTRL_ON, 0, flags); 385 } 386 iic_release_bus(sc->sc_i2c, flags); 387 388 return error; 389 } 390 391 static int 392 as3722_wdt_tickle(struct sysmon_wdog *smw) 393 { 394 struct as3722_softc * const sc = smw->smw_cookie; 395 int error; 396 397 const int flags = (cold ? I2C_F_POLL : 0); 398 399 iic_acquire_bus(sc->sc_i2c, flags); 400 error = as3722_set_clear(sc, AS3722_WATCHDOG_SIGNAL_REG, 401 AS3722_WATCHDOG_SIGNAL_SW_SIG, 0, flags); 402 iic_release_bus(sc->sc_i2c, flags); 403 404 return error; 405 } 406 407 static int 408 as3722_rtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt) 409 { 410 struct as3722_softc * const sc = tch->cookie; 411 uint8_t buf[6]; 412 int error = 0; 413 414 const int flags = (cold ? I2C_F_POLL : 0); 415 416 iic_acquire_bus(sc->sc_i2c, flags); 417 error += as3722_read(sc, AS3722_RTC_SECOND_REG, &buf[0], flags); 418 error += as3722_read(sc, AS3722_RTC_MINUTE_REG, &buf[1], flags); 419 error += as3722_read(sc, AS3722_RTC_HOUR_REG, &buf[2], flags); 420 error += as3722_read(sc, AS3722_RTC_DAY_REG, &buf[3], flags); 421 error += as3722_read(sc, AS3722_RTC_MONTH_REG, &buf[4], flags); 422 error += as3722_read(sc, AS3722_RTC_YEAR_REG, &buf[5], flags); 423 iic_release_bus(sc->sc_i2c, flags); 424 425 if (error) 426 return error; 427 428 dt->dt_sec = bcdtobin(buf[0] & 0x7f); 429 dt->dt_min = bcdtobin(buf[1] & 0x7f); 430 dt->dt_hour = bcdtobin(buf[2] & 0x3f); 431 dt->dt_day = bcdtobin(buf[3] & 0x3f); 432 dt->dt_mon = bcdtobin(buf[4] & 0x1f) - 1; 433 dt->dt_year = AS3722_START_YEAR + bcdtobin(buf[5] & 0x7f); 434 dt->dt_wday = 0; 435 436 return 0; 437 } 438 439 static int 440 as3722_rtc_settime(todr_chip_handle_t tch, struct clock_ymdhms *dt) 441 { 442 struct as3722_softc * const sc = tch->cookie; 443 uint8_t buf[6]; 444 int error = 0; 445 446 if (dt->dt_year < AS3722_START_YEAR) 447 return EINVAL; 448 449 buf[0] = bintobcd(dt->dt_sec) & 0x7f; 450 buf[1] = bintobcd(dt->dt_min) & 0x7f; 451 buf[2] = bintobcd(dt->dt_hour) & 0x3f; 452 buf[3] = bintobcd(dt->dt_day) & 0x3f; 453 buf[4] = bintobcd(dt->dt_mon + 1) & 0x1f; 454 buf[5] = bintobcd(dt->dt_year - AS3722_START_YEAR) & 0x7f; 455 456 const int flags = (cold ? I2C_F_POLL : 0); 457 458 iic_acquire_bus(sc->sc_i2c, flags); 459 error += as3722_write(sc, AS3722_RTC_SECOND_REG, buf[0], flags); 460 error += as3722_write(sc, AS3722_RTC_MINUTE_REG, buf[1], flags); 461 error += as3722_write(sc, AS3722_RTC_HOUR_REG, buf[2], flags); 462 error += as3722_write(sc, AS3722_RTC_DAY_REG, buf[3], flags); 463 error += as3722_write(sc, AS3722_RTC_MONTH_REG, buf[4], flags); 464 error += as3722_write(sc, AS3722_RTC_YEAR_REG, buf[5], flags); 465 iic_release_bus(sc->sc_i2c, flags); 466 467 return error; 468 } 469 470 #ifdef FDT 471 static void 472 as3722_regulator_attach(struct as3722_softc *sc) 473 { 474 struct as3722reg_attach_args raa; 475 int phandle, child; 476 int error; 477 const int flags = (cold ? I2C_F_POLL : 0); 478 uint8_t tmp; 479 480 iic_acquire_bus(sc->sc_i2c, flags); 481 error = as3722_read(sc, AS3722_FUSE7_REG, &tmp, flags); 482 iic_release_bus(sc->sc_i2c, flags); 483 if (error != 0) { 484 aprint_error_dev(sc->sc_dev, "failed to read Fuse7: %d\n", error); 485 return; 486 } 487 488 if (tmp & AS3722_FUSE7_SD0_V_MINUS_200MV) 489 sc->sc_flags |= AS3722_FLAG_SD0_V_MINUS_200MV; 490 491 phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators"); 492 if (phandle <= 0) 493 return; 494 495 for (int i = 0; i < __arraycount(as3722regdefs); i++) { 496 const struct as3722regdef *regdef = &as3722regdefs[i]; 497 child = of_find_firstchild_byname(phandle, regdef->name); 498 if (child <= 0) 499 continue; 500 raa.reg_def = regdef; 501 raa.reg_phandle = child; 502 config_found(sc->sc_dev, &raa, NULL); 503 } 504 } 505 506 static int 507 as3722reg_match(device_t parent, cfdata_t match, void *aux) 508 { 509 return 1; 510 } 511 512 static void 513 as3722reg_attach(device_t parent, device_t self, void *aux) 514 { 515 struct as3722reg_softc *sc = device_private(self); 516 struct as3722reg_attach_args *raa = aux; 517 char *name = NULL; 518 int len; 519 520 sc->sc_dev = self; 521 sc->sc_phandle = raa->reg_phandle; 522 sc->sc_regdef = raa->reg_def; 523 524 fdtbus_register_regulator_controller(self, sc->sc_phandle, 525 &as3722reg_funcs); 526 527 len = OF_getproplen(sc->sc_phandle, "regulator-name"); 528 if (len > 0) { 529 name = kmem_zalloc(len, KM_SLEEP); 530 OF_getprop(sc->sc_phandle, "regulator-name", name, len); 531 } 532 533 aprint_naive("\n"); 534 if (name) 535 aprint_normal(": %s\n", name); 536 else 537 aprint_normal("\n"); 538 539 if (name) 540 kmem_free(name, len); 541 } 542 543 static int 544 as3722reg_acquire(device_t dev) 545 { 546 return 0; 547 } 548 549 static void 550 as3722reg_release(device_t dev) 551 { 552 } 553 554 static int 555 as3722reg_enable(device_t dev, bool enable) 556 { 557 struct as3722reg_softc *sc = device_private(dev); 558 struct as3722_softc *asc = device_private(device_parent(dev)); 559 const struct as3722regdef *regdef = sc->sc_regdef; 560 const int flags = (cold ? I2C_F_POLL : 0); 561 int error; 562 563 if (!regdef->enable_mask) 564 return enable ? 0 : EINVAL; 565 566 iic_acquire_bus(asc->sc_i2c, flags); 567 if (enable) 568 error = as3722_set_clear(asc, regdef->enable_reg, 569 regdef->enable_mask, 0, flags); 570 else 571 error = as3722_set_clear(asc, regdef->enable_reg, 572 0, regdef->enable_mask, flags); 573 iic_release_bus(asc->sc_i2c, flags); 574 575 return error; 576 } 577 578 static int 579 as3722reg_set_voltage_ldo(device_t dev, u_int min_uvol, u_int max_uvol) 580 { 581 struct as3722reg_softc *sc = device_private(dev); 582 struct as3722_softc *asc = device_private(device_parent(dev)); 583 const struct as3722regdef *regdef = sc->sc_regdef; 584 const int flags = (cold ? I2C_F_POLL : 0); 585 uint8_t set_v = 0x00; 586 u_int uvol; 587 int error; 588 589 for (uint8_t v = 0x01; v <= 0x24; v++) { 590 uvol = 800000 + (v * 25000); 591 if (uvol >= min_uvol && uvol <= max_uvol) { 592 set_v = v; 593 goto done; 594 } 595 } 596 for (uint8_t v = 0x40; v <= 0x7f; v++) { 597 uvol = 1725000 + ((v - 0x40) * 25000); 598 if (uvol >= min_uvol && uvol <= max_uvol) { 599 set_v = v; 600 goto done; 601 } 602 } 603 if (set_v == 0) 604 return ERANGE; 605 606 done: 607 iic_acquire_bus(asc->sc_i2c, flags); 608 error = as3722_set_clear(asc, regdef->vsel_reg, set_v, 609 regdef->vsel_mask, flags); 610 iic_release_bus(asc->sc_i2c, flags); 611 612 return error; 613 } 614 615 static int 616 as3722reg_get_voltage_ldo(device_t dev, u_int *puvol) 617 { 618 struct as3722reg_softc *sc = device_private(dev); 619 struct as3722_softc *asc = device_private(device_parent(dev)); 620 const struct as3722regdef *regdef = sc->sc_regdef; 621 const int flags = (cold ? I2C_F_POLL : 0); 622 uint8_t v; 623 int error; 624 625 iic_acquire_bus(asc->sc_i2c, flags); 626 error = as3722_read(asc, regdef->vsel_reg, &v, flags); 627 iic_release_bus(asc->sc_i2c, flags); 628 if (error != 0) 629 return error; 630 631 v &= regdef->vsel_mask; 632 633 if (v == 0) 634 *puvol = 0; /* LDO off */ 635 else if (v >= 0x01 && v <= 0x24) 636 *puvol = 800000 + (v * 25000); 637 else if (v >= 0x40 && v <= 0x7f) 638 *puvol = 1725000 + ((v - 0x40) * 25000); 639 else 640 return EINVAL; 641 642 return 0; 643 } 644 645 static int 646 as3722reg_set_voltage_sd0(device_t dev, u_int min_uvol, u_int max_uvol) 647 { 648 struct as3722reg_softc *sc = device_private(dev); 649 struct as3722_softc *asc = device_private(device_parent(dev)); 650 const struct as3722regdef *regdef = sc->sc_regdef; 651 const int flags = (cold ? I2C_F_POLL : 0); 652 uint8_t set_v = 0x00; 653 u_int uvol; 654 int error; 655 656 if (asc->sc_flags & AS3722_FLAG_SD0_V_MINUS_200MV) { 657 for (uint8_t v = 0x01; v <= 0x6e; v++) { 658 uvol = 400000 + (v * 10000); 659 if (uvol >= min_uvol && uvol <= max_uvol) { 660 set_v = v; 661 goto done; 662 } 663 } 664 } else { 665 for (uint8_t v = 0x01; v <= 0x5a; v++) { 666 uvol = 600000 + (v * 10000); 667 if (uvol >= min_uvol && uvol <= max_uvol) { 668 set_v = v; 669 goto done; 670 } 671 } 672 } 673 if (set_v == 0) 674 return ERANGE; 675 676 done: 677 iic_acquire_bus(asc->sc_i2c, flags); 678 error = as3722_set_clear(asc, regdef->vsel_reg, set_v, 679 regdef->vsel_mask, flags); 680 iic_release_bus(asc->sc_i2c, flags); 681 682 return error; 683 } 684 685 static int 686 as3722reg_get_voltage_sd0(device_t dev, u_int *puvol) 687 { 688 struct as3722reg_softc *sc = device_private(dev); 689 struct as3722_softc *asc = device_private(device_parent(dev)); 690 const struct as3722regdef *regdef = sc->sc_regdef; 691 const int flags = (cold ? I2C_F_POLL : 0); 692 uint8_t v; 693 int error; 694 695 iic_acquire_bus(asc->sc_i2c, flags); 696 error = as3722_read(asc, regdef->vsel_reg, &v, flags); 697 iic_release_bus(asc->sc_i2c, flags); 698 if (error != 0) 699 return error; 700 701 v &= regdef->vsel_mask; 702 703 if (v == 0) { 704 *puvol = 0; /* DC/DC powered down */ 705 return 0; 706 } 707 if (asc->sc_flags & AS3722_FLAG_SD0_V_MINUS_200MV) { 708 if (v >= 0x01 && v <= 0x6e) { 709 *puvol = 400000 + (v * 10000); 710 return 0; 711 } 712 } else { 713 if (v >= 0x01 && v <= 0x5a) { 714 *puvol = 600000 + (v * 10000); 715 return 0; 716 } 717 } 718 719 return EINVAL; 720 } 721 722 static int 723 as3722reg_set_voltage_sd4(device_t dev, u_int min_uvol, u_int max_uvol) 724 { 725 struct as3722reg_softc *sc = device_private(dev); 726 struct as3722_softc *asc = device_private(device_parent(dev)); 727 const struct as3722regdef *regdef = sc->sc_regdef; 728 const int flags = (cold ? I2C_F_POLL : 0); 729 uint8_t set_v = 0x00; 730 u_int uvol; 731 int error; 732 733 734 for (uint8_t v = 0x01; v <= 0x40; v++) { 735 uvol = 600000 + (v * 12500); 736 if (uvol >= min_uvol && uvol <= max_uvol) { 737 set_v = v; 738 goto done; 739 } 740 } 741 for (uint8_t v = 0x41; v <= 0x70; v++) { 742 uvol = 1400000 + ((v - 0x40) * 25000); 743 if (uvol >= min_uvol && uvol <= max_uvol) { 744 set_v = v; 745 goto done; 746 } 747 } 748 for (uint8_t v = 0x71; v <= 0x7f; v++) { 749 uvol = 2600000 + ((v - 0x70) * 50000); 750 if (uvol >= min_uvol && uvol <= max_uvol) { 751 set_v = v; 752 goto done; 753 } 754 } 755 if (set_v == 0) 756 return ERANGE; 757 758 done: 759 iic_acquire_bus(asc->sc_i2c, flags); 760 error = as3722_set_clear(asc, regdef->vsel_reg, set_v, 761 regdef->vsel_mask, flags); 762 iic_release_bus(asc->sc_i2c, flags); 763 764 return error; 765 } 766 767 static int 768 as3722reg_get_voltage_sd4(device_t dev, u_int *puvol) 769 { 770 struct as3722reg_softc *sc = device_private(dev); 771 struct as3722_softc *asc = device_private(device_parent(dev)); 772 const struct as3722regdef *regdef = sc->sc_regdef; 773 const int flags = (cold ? I2C_F_POLL : 0); 774 uint8_t v; 775 int error; 776 777 iic_acquire_bus(asc->sc_i2c, flags); 778 error = as3722_read(asc, regdef->vsel_reg, &v, flags); 779 iic_release_bus(asc->sc_i2c, flags); 780 if (error != 0) 781 return error; 782 783 v &= regdef->vsel_mask; 784 785 if (v == 0) 786 *puvol = 0; /* DC/DC powered down */ 787 else if (v >= 0x01 && v <= 0x40) 788 *puvol = 600000 + (v * 12500); 789 else if (v >= 0x41 && v <= 0x70) 790 *puvol = 1400000 + (v - 0x40) * 25000; 791 else if (v >= 0x71 && v <= 0x7f) 792 *puvol = 2600000 + (v - 0x70) * 50000; 793 else 794 return EINVAL; 795 796 return 0; 797 } 798 799 static int 800 as3722reg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol) 801 { 802 struct as3722reg_softc *sc = device_private(dev); 803 const struct as3722regdef *regdef = sc->sc_regdef; 804 805 return regdef->set(dev, min_uvol, max_uvol); 806 } 807 808 static int 809 as3722reg_get_voltage(device_t dev, u_int *puvol) 810 { 811 struct as3722reg_softc *sc = device_private(dev); 812 const struct as3722regdef *regdef = sc->sc_regdef; 813 814 return regdef->get(dev, puvol); 815 } 816 #endif 817 818 int 819 as3722_poweroff(device_t dev) 820 { 821 struct as3722_softc * const sc = device_private(dev); 822 int error; 823 824 const int flags = I2C_F_POLL; 825 826 iic_acquire_bus(sc->sc_i2c, flags); 827 error = as3722_write(sc, AS3722_RESET_CTRL_REG, 828 AS3722_RESET_CTRL_POWER_OFF, flags); 829 iic_release_bus(sc->sc_i2c, flags); 830 831 return error; 832 } 833 834 int 835 as3722_reboot(device_t dev) 836 { 837 struct as3722_softc * const sc = device_private(dev); 838 int error; 839 840 const int flags = I2C_F_POLL; 841 842 iic_acquire_bus(sc->sc_i2c, flags); 843 error = as3722_write(sc, AS3722_RESET_CTRL_REG, 844 AS3722_RESET_CTRL_FORCE_RESET, flags); 845 iic_release_bus(sc->sc_i2c, flags); 846 847 return error; 848 } 849
Indexes created Fri Oct 03 02:09:57 GMT 2025