au8522.c revision 1.2.6.3 1 1.2.6.2 rmind /* $NetBSD: au8522.c,v 1.2.6.3 2011/05/31 03:04:36 rmind Exp $ */
2 1.2.6.2 rmind
3 1.2.6.2 rmind /*-
4 1.2.6.2 rmind * Copyright (c) 2010 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.2.6.2 rmind * All rights reserved.
6 1.2.6.2 rmind *
7 1.2.6.2 rmind * Redistribution and use in source and binary forms, with or without
8 1.2.6.2 rmind * modification, are permitted provided that the following conditions
9 1.2.6.2 rmind * are met:
10 1.2.6.2 rmind * 1. Redistributions of source code must retain the above copyright
11 1.2.6.2 rmind * notice, this list of conditions and the following disclaimer.
12 1.2.6.2 rmind * 2. Redistributions in binary form must reproduce the above copyright
13 1.2.6.2 rmind * notice, this list of conditions and the following disclaimer in the
14 1.2.6.2 rmind * documentation and/or other materials provided with the distribution.
15 1.2.6.2 rmind *
16 1.2.6.2 rmind * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.2.6.2 rmind * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.2.6.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.2.6.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.2.6.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.2.6.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.2.6.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.2.6.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.2.6.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.2.6.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.2.6.2 rmind * POSSIBILITY OF SUCH DAMAGE.
27 1.2.6.2 rmind */
28 1.2.6.2 rmind
29 1.2.6.2 rmind /*
30 1.2.6.2 rmind * Auvitek AU8522
31 1.2.6.2 rmind */
32 1.2.6.2 rmind
33 1.2.6.2 rmind #include <sys/cdefs.h>
34 1.2.6.2 rmind __KERNEL_RCSID(0, "$NetBSD: au8522.c,v 1.2.6.3 2011/05/31 03:04:36 rmind Exp $");
35 1.2.6.2 rmind
36 1.2.6.2 rmind #include <sys/param.h>
37 1.2.6.2 rmind #include <sys/systm.h>
38 1.2.6.2 rmind #include <sys/device.h>
39 1.2.6.2 rmind #include <sys/conf.h>
40 1.2.6.2 rmind #include <sys/bus.h>
41 1.2.6.2 rmind #include <sys/kmem.h>
42 1.2.6.2 rmind #include <sys/module.h>
43 1.2.6.2 rmind
44 1.2.6.2 rmind #include <dev/i2c/i2cvar.h>
45 1.2.6.2 rmind
46 1.2.6.2 rmind #include <dev/i2c/au8522reg.h>
47 1.2.6.2 rmind #include <dev/i2c/au8522var.h>
48 1.2.6.2 rmind
49 1.2.6.2 rmind static int au8522_reset(struct au8522 *);
50 1.2.6.2 rmind static int au8522_read_1(struct au8522 *, uint16_t, uint8_t *);
51 1.2.6.2 rmind static int au8522_write_1(struct au8522 *, uint16_t, uint8_t);
52 1.2.6.2 rmind static int au8522_set_vinput(struct au8522 *, au8522_vinput_t);
53 1.2.6.2 rmind static int au8522_set_ainput(struct au8522 *, au8522_ainput_t);
54 1.2.6.2 rmind static void au8522_set_common(struct au8522 *, au8522_vinput_t);
55 1.2.6.2 rmind
56 1.2.6.2 rmind static int
57 1.2.6.2 rmind au8522_reset(struct au8522 *au)
58 1.2.6.2 rmind {
59 1.2.6.2 rmind return au8522_write_1(au, 0xa4, 1 << 5);
60 1.2.6.2 rmind }
61 1.2.6.2 rmind
62 1.2.6.2 rmind static int
63 1.2.6.2 rmind au8522_read_1(struct au8522 *au, uint16_t reg, uint8_t *val)
64 1.2.6.2 rmind {
65 1.2.6.2 rmind uint8_t cmd[2];
66 1.2.6.2 rmind int error;
67 1.2.6.2 rmind
68 1.2.6.2 rmind cmd[0] = (reg >> 8) | 0x40;
69 1.2.6.2 rmind cmd[1] = reg & 0xff;
70 1.2.6.2 rmind error = iic_exec(au->i2c, I2C_OP_WRITE, au->i2c_addr,
71 1.2.6.2 rmind cmd, sizeof(cmd), NULL, 0, 0);
72 1.2.6.2 rmind if (error)
73 1.2.6.2 rmind return error;
74 1.2.6.2 rmind return iic_exec(au->i2c, I2C_OP_READ, au->i2c_addr,
75 1.2.6.2 rmind NULL, 0, val, sizeof(*val), 0);
76 1.2.6.2 rmind }
77 1.2.6.2 rmind
78 1.2.6.2 rmind static int
79 1.2.6.2 rmind au8522_write_1(struct au8522 *au, uint16_t reg, uint8_t val)
80 1.2.6.2 rmind {
81 1.2.6.2 rmind uint8_t data[3];
82 1.2.6.2 rmind
83 1.2.6.2 rmind data[0] = (reg >> 8) | 0x80;
84 1.2.6.2 rmind data[1] = reg & 0xff;
85 1.2.6.2 rmind data[2] = val;
86 1.2.6.2 rmind return iic_exec(au->i2c, I2C_OP_WRITE, au->i2c_addr,
87 1.2.6.2 rmind data, sizeof(data), NULL, 0, 0);
88 1.2.6.2 rmind }
89 1.2.6.2 rmind
90 1.2.6.2 rmind static int
91 1.2.6.2 rmind au8522_set_vinput(struct au8522 *au, au8522_vinput_t vi)
92 1.2.6.2 rmind {
93 1.2.6.2 rmind switch (vi) {
94 1.2.6.2 rmind case AU8522_VINPUT_CVBS:
95 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_MODCLKCTL, AU8522_MODCLKCTL_CVBS);
96 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_PGACTL, 0x00);
97 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_CLAMPCTL, 0x0e);
98 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_PGACTL, 0x10);
99 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_INPUTCTL,
100 1.2.6.2 rmind AU8522_INPUTCTL_CVBS_CH1);
101 1.2.6.2 rmind
102 1.2.6.2 rmind au8522_set_common(au, vi);
103 1.2.6.2 rmind
104 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL0,
105 1.2.6.2 rmind AU8522_SYSMODCTL0_CVBS);
106 1.2.6.2 rmind break;
107 1.2.6.2 rmind case AU8522_VINPUT_SVIDEO:
108 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_MODCLKCTL,
109 1.2.6.2 rmind AU8522_MODCLKCTL_SVIDEO);
110 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_INPUTCTL,
111 1.2.6.2 rmind AU8522_INPUTCTL_SVIDEO_CH13);
112 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_CLAMPCTL, 0x00);
113 1.2.6.2 rmind
114 1.2.6.2 rmind au8522_set_common(au, vi);
115 1.2.6.2 rmind
116 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL0,
117 1.2.6.2 rmind AU8522_SYSMODCTL0_CVBS);
118 1.2.6.2 rmind
119 1.2.6.2 rmind break;
120 1.2.6.2 rmind case AU8522_VINPUT_CVBS_TUNER:
121 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_MODCLKCTL, AU8522_MODCLKCTL_CVBS);
122 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_PGACTL, 0x00);
123 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_CLAMPCTL, 0x0e);
124 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_PGACTL, 0x10);
125 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_INPUTCTL,
126 1.2.6.2 rmind AU8522_INPUTCTL_CVBS_CH4_SIF);
127 1.2.6.2 rmind
128 1.2.6.2 rmind au8522_set_common(au, vi);
129 1.2.6.2 rmind
130 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL0,
131 1.2.6.2 rmind AU8522_SYSMODCTL0_CVBS);
132 1.2.6.2 rmind
133 1.2.6.2 rmind break;
134 1.2.6.2 rmind default:
135 1.2.6.2 rmind return EINVAL;
136 1.2.6.2 rmind }
137 1.2.6.2 rmind
138 1.2.6.2 rmind return 0;
139 1.2.6.2 rmind }
140 1.2.6.2 rmind
141 1.2.6.2 rmind static void
142 1.2.6.2 rmind au8522_set_common(struct au8522 *au, au8522_vinput_t vi)
143 1.2.6.2 rmind {
144 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_INTMASK, 0x00);
145 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_VIDEOMODE, vi == AU8522_VINPUT_SVIDEO ?
146 1.2.6.2 rmind AU8522_VIDEOMODE_SVIDEO : AU8522_VIDEOMODE_CVBS);
147 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_TV_PGA, AU8522_TV_PGA_CVBS);
148 1.2.6.2 rmind }
149 1.2.6.2 rmind
150 1.2.6.2 rmind static int
151 1.2.6.2 rmind au8522_set_ainput(struct au8522 *au, au8522_ainput_t ai)
152 1.2.6.2 rmind {
153 1.2.6.2 rmind /* mute during mode change */
154 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x00);
155 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x00);
156 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL, 0x00);
157 1.2.6.2 rmind
158 1.2.6.2 rmind switch (ai) {
159 1.2.6.2 rmind case AU8522_AINPUT_SIF:
160 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL0,
161 1.2.6.2 rmind AU8522_SYSMODCTL0_CVBS);
162 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_MODE, 0x82);
163 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL1,
164 1.2.6.2 rmind AU8522_SYSMODCTL1_I2S);
165 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_FREQ, 0x03);
166 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_I2S_CTL2, 0xc2);
167 1.2.6.2 rmind /* unmute */
168 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x7f);
169 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x7f);
170 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL, 0xff);
171 1.2.6.2 rmind break;
172 1.2.6.2 rmind case AU8522_AINPUT_NONE:
173 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_USBEN, 0x00);
174 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x7f);
175 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x7f);
176 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_MODE, 0x40);
177 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL1,
178 1.2.6.2 rmind AU8522_SYSMODCTL1_SVIDEO);
179 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_AUDIO_FREQ, 0x03);
180 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_I2S_CTL2, 0x02);
181 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL0,
182 1.2.6.2 rmind AU8522_SYSMODCTL0_CVBS);
183 1.2.6.2 rmind break;
184 1.2.6.2 rmind default:
185 1.2.6.2 rmind return EINVAL;
186 1.2.6.2 rmind }
187 1.2.6.2 rmind return 0;
188 1.2.6.2 rmind }
189 1.2.6.2 rmind
190 1.2.6.2 rmind struct au8522 *
191 1.2.6.2 rmind au8522_open(device_t parent, i2c_tag_t i2c, i2c_addr_t addr)
192 1.2.6.2 rmind {
193 1.2.6.2 rmind struct au8522 *au;
194 1.2.6.2 rmind
195 1.2.6.2 rmind au = kmem_alloc(sizeof(*au), KM_SLEEP);
196 1.2.6.2 rmind if (au == NULL)
197 1.2.6.2 rmind return NULL;
198 1.2.6.2 rmind au->parent = parent;
199 1.2.6.2 rmind au->i2c = i2c;
200 1.2.6.2 rmind au->i2c_addr = addr;
201 1.2.6.2 rmind
202 1.2.6.2 rmind if (au8522_reset(au))
203 1.2.6.2 rmind goto failed;
204 1.2.6.2 rmind if (au8522_write_1(au, AU8522_REG_TUNERCTL, AU8522_TUNERCTL_EN))
205 1.2.6.2 rmind goto failed;
206 1.2.6.2 rmind
207 1.2.6.2 rmind return au;
208 1.2.6.2 rmind
209 1.2.6.2 rmind failed:
210 1.2.6.2 rmind kmem_free(au, sizeof(*au));
211 1.2.6.2 rmind return NULL;
212 1.2.6.2 rmind }
213 1.2.6.2 rmind
214 1.2.6.2 rmind void
215 1.2.6.2 rmind au8522_close(struct au8522 *au)
216 1.2.6.2 rmind {
217 1.2.6.2 rmind kmem_free(au, sizeof(*au));
218 1.2.6.2 rmind }
219 1.2.6.2 rmind
220 1.2.6.2 rmind void
221 1.2.6.2 rmind au8522_enable(struct au8522 *au, bool enable)
222 1.2.6.2 rmind {
223 1.2.6.2 rmind if (enable) {
224 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL0,
225 1.2.6.2 rmind AU8522_SYSMODCTL0_RESET);
226 1.2.6.2 rmind delay(1000);
227 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL0,
228 1.2.6.2 rmind AU8522_SYSMODCTL0_CVBS);
229 1.2.6.2 rmind } else {
230 1.2.6.2 rmind au8522_write_1(au, AU8522_REG_SYSMODCTL0,
231 1.2.6.2 rmind AU8522_SYSMODCTL0_DISABLE);
232 1.2.6.2 rmind }
233 1.2.6.2 rmind }
234 1.2.6.2 rmind
235 1.2.6.2 rmind void
236 1.2.6.2 rmind au8522_set_input(struct au8522 *au, au8522_vinput_t vi, au8522_ainput_t ai)
237 1.2.6.2 rmind {
238 1.2.6.2 rmind au8522_reset(au);
239 1.2.6.2 rmind
240 1.2.6.2 rmind if (vi != AU8522_VINPUT_UNCONF)
241 1.2.6.2 rmind au8522_set_vinput(au, vi);
242 1.2.6.2 rmind if (ai != AU8522_AINPUT_UNCONF)
243 1.2.6.2 rmind au8522_set_ainput(au, ai);
244 1.2.6.2 rmind }
245 1.2.6.2 rmind
246 1.2.6.2 rmind int
247 1.2.6.2 rmind au8522_get_signal(struct au8522 *au)
248 1.2.6.2 rmind {
249 1.2.6.2 rmind uint8_t status;
250 1.2.6.2 rmind
251 1.2.6.2 rmind if (au8522_read_1(au, AU8522_REG_STATUS, &status))
252 1.2.6.2 rmind return 0;
253 1.2.6.2 rmind
254 1.2.6.2 rmind #ifdef AU8522_DEBUG
255 1.2.6.2 rmind printf("au8522: status=0x%02x\n", status);
256 1.2.6.2 rmind #endif
257 1.2.6.2 rmind return (status & AU8522_STATUS_LOCK) == AU8522_STATUS_LOCK ? 1 : 0;
258 1.2.6.2 rmind }
259 1.2.6.2 rmind
260 1.2.6.3 rmind void
261 1.2.6.3 rmind au8522_set_audio(struct au8522 *au, bool onoff)
262 1.2.6.3 rmind {
263 1.2.6.3 rmind if (onoff) {
264 1.2.6.3 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x7f);
265 1.2.6.3 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x7f);
266 1.2.6.3 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL, 0xff);
267 1.2.6.3 rmind } else {
268 1.2.6.3 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x00);
269 1.2.6.3 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x00);
270 1.2.6.3 rmind au8522_write_1(au, AU8522_REG_AUDIO_VOL, 0x00);
271 1.2.6.3 rmind }
272 1.2.6.3 rmind }
273 1.2.6.3 rmind
274 1.2.6.2 rmind MODULE(MODULE_CLASS_DRIVER, au8522, NULL);
275 1.2.6.2 rmind
276 1.2.6.2 rmind static int
277 1.2.6.2 rmind au8522_modcmd(modcmd_t cmd, void *opaque)
278 1.2.6.2 rmind {
279 1.2.6.2 rmind switch (cmd) {
280 1.2.6.2 rmind case MODULE_CMD_INIT:
281 1.2.6.2 rmind return 0;
282 1.2.6.2 rmind case MODULE_CMD_FINI:
283 1.2.6.2 rmind return 0;
284 1.2.6.2 rmind default:
285 1.2.6.2 rmind return ENOTTY;
286 1.2.6.2 rmind }
287 1.2.6.2 rmind }
288