axppmic.c revision 1.8 1 1.8 jmcneill /* $NetBSD: axppmic.c,v 1.8 2018/05/13 11:13:02 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2014-2018 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include <sys/cdefs.h>
30 1.8 jmcneill __KERNEL_RCSID(0, "$NetBSD: axppmic.c,v 1.8 2018/05/13 11:13:02 jmcneill Exp $");
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/param.h>
33 1.1 jmcneill #include <sys/systm.h>
34 1.1 jmcneill #include <sys/kernel.h>
35 1.1 jmcneill #include <sys/device.h>
36 1.1 jmcneill #include <sys/conf.h>
37 1.1 jmcneill #include <sys/bus.h>
38 1.1 jmcneill #include <sys/kmem.h>
39 1.1 jmcneill
40 1.1 jmcneill #include <dev/i2c/i2cvar.h>
41 1.1 jmcneill
42 1.1 jmcneill #include <dev/sysmon/sysmonvar.h>
43 1.1 jmcneill #include <dev/sysmon/sysmon_taskq.h>
44 1.1 jmcneill
45 1.1 jmcneill #include <dev/fdt/fdtvar.h>
46 1.1 jmcneill
47 1.3 jmcneill #define AXP_POWER_SOURCE_REG 0x00
48 1.3 jmcneill #define AXP_POWER_SOURCE_ACIN_PRESENT __BIT(7)
49 1.3 jmcneill #define AXP_POWER_SOURCE_VBUS_PRESENT __BIT(5)
50 1.3 jmcneill
51 1.2 jmcneill #define AXP_POWER_MODE_REG 0x01
52 1.2 jmcneill #define AXP_POWER_MODE_BATT_VALID __BIT(4)
53 1.2 jmcneill #define AXP_POWER_MODE_BATT_PRESENT __BIT(5)
54 1.2 jmcneill #define AXP_POWER_MODE_BATT_CHARGING __BIT(6)
55 1.2 jmcneill
56 1.1 jmcneill #define AXP_POWER_DISABLE_REG 0x32
57 1.1 jmcneill #define AXP_POWER_DISABLE_CTRL __BIT(7)
58 1.1 jmcneill
59 1.1 jmcneill #define AXP_IRQ_ENABLE_REG(n) (0x40 + (n) - 1)
60 1.5 jmcneill #define AXP_IRQ1_ACIN_RAISE __BIT(6)
61 1.5 jmcneill #define AXP_IRQ1_ACIN_LOWER __BIT(5)
62 1.5 jmcneill #define AXP_IRQ1_VBUS_RAISE __BIT(3)
63 1.5 jmcneill #define AXP_IRQ1_VBUS_LOWER __BIT(2)
64 1.1 jmcneill #define AXP_IRQ_STATUS_REG(n) (0x48 + (n) - 1)
65 1.1 jmcneill
66 1.2 jmcneill #define AXP_FUEL_GAUGE_CTRL_REG 0xb8
67 1.2 jmcneill #define AXP_FUEL_GAUGE_CTRL_EN __BIT(7)
68 1.2 jmcneill #define AXP_BATT_CAP_REG 0xb9
69 1.2 jmcneill #define AXP_BATT_CAP_VALID __BIT(7)
70 1.2 jmcneill #define AXP_BATT_CAP_PERCENT __BITS(6,0)
71 1.2 jmcneill
72 1.2 jmcneill #define AXP_BATT_CAP_WARN_REG 0xe6
73 1.2 jmcneill #define AXP_BATT_CAP_WARN_LV1 __BITS(7,4)
74 1.2 jmcneill #define AXP_BATT_CAP_WARN_LV2 __BITS(3,0)
75 1.2 jmcneill
76 1.1 jmcneill struct axppmic_ctrl {
77 1.1 jmcneill device_t c_dev;
78 1.1 jmcneill
79 1.1 jmcneill const char * c_name;
80 1.1 jmcneill u_int c_min;
81 1.1 jmcneill u_int c_max;
82 1.1 jmcneill u_int c_step1;
83 1.1 jmcneill u_int c_step1cnt;
84 1.1 jmcneill u_int c_step2;
85 1.1 jmcneill u_int c_step2cnt;
86 1.1 jmcneill
87 1.1 jmcneill uint8_t c_enable_reg;
88 1.1 jmcneill uint8_t c_enable_mask;
89 1.1 jmcneill
90 1.1 jmcneill uint8_t c_voltage_reg;
91 1.1 jmcneill uint8_t c_voltage_mask;
92 1.1 jmcneill };
93 1.1 jmcneill
94 1.1 jmcneill #define AXP_CTRL(name, min, max, step, ereg, emask, vreg, vmask) \
95 1.1 jmcneill { .c_name = (name), .c_min = (min), .c_max = (max), \
96 1.1 jmcneill .c_step1 = (step), .c_step1cnt = (((max) - (min)) / (step)) + 1, \
97 1.1 jmcneill .c_step2 = 0, .c_step2cnt = 0, \
98 1.1 jmcneill .c_enable_reg = (ereg), .c_enable_mask = (emask), \
99 1.1 jmcneill .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) }
100 1.1 jmcneill
101 1.1 jmcneill #define AXP_CTRL2(name, min, max, step1, step1cnt, step2, step2cnt, ereg, emask, vreg, vmask) \
102 1.1 jmcneill { .c_name = (name), .c_min = (min), .c_max = (max), \
103 1.1 jmcneill .c_step1 = (step1), .c_step1cnt = (step1cnt), \
104 1.1 jmcneill .c_step2 = (step2), .c_step2cnt = (step2cnt), \
105 1.1 jmcneill .c_enable_reg = (ereg), .c_enable_mask = (emask), \
106 1.1 jmcneill .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) }
107 1.1 jmcneill
108 1.1 jmcneill static const struct axppmic_ctrl axp803_ctrls[] = {
109 1.1 jmcneill AXP_CTRL("dldo1", 700, 3300, 100,
110 1.1 jmcneill 0x12, __BIT(3), 0x15, __BITS(4,0)),
111 1.1 jmcneill AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4,
112 1.1 jmcneill 0x12, __BIT(4), 0x16, __BITS(4,0)),
113 1.1 jmcneill AXP_CTRL("dldo3", 700, 3300, 100,
114 1.1 jmcneill 0x12, __BIT(5), 0x17, __BITS(4,0)),
115 1.1 jmcneill AXP_CTRL("dldo4", 700, 3300, 100,
116 1.1 jmcneill 0x12, __BIT(6), 0x18, __BITS(4,0)),
117 1.1 jmcneill AXP_CTRL("eldo1", 700, 1900, 50,
118 1.1 jmcneill 0x12, __BIT(0), 0x19, __BITS(4,0)),
119 1.1 jmcneill AXP_CTRL("eldo2", 700, 1900, 50,
120 1.1 jmcneill 0x12, __BIT(1), 0x1a, __BITS(4,0)),
121 1.1 jmcneill AXP_CTRL("eldo3", 700, 1900, 50,
122 1.1 jmcneill 0x12, __BIT(2), 0x1b, __BITS(4,0)),
123 1.1 jmcneill AXP_CTRL("fldo1", 700, 1450, 50,
124 1.1 jmcneill 0x13, __BIT(2), 0x1c, __BITS(3,0)),
125 1.1 jmcneill AXP_CTRL("fldo2", 700, 1450, 50,
126 1.1 jmcneill 0x13, __BIT(3), 0x1d, __BITS(3,0)),
127 1.1 jmcneill AXP_CTRL("dcdc1", 1600, 3400, 100,
128 1.1 jmcneill 0x10, __BIT(0), 0x20, __BITS(4,0)),
129 1.6 jmcneill AXP_CTRL2("dcdc2", 500, 1300, 10, 70, 20, 5,
130 1.1 jmcneill 0x10, __BIT(1), 0x21, __BITS(6,0)),
131 1.6 jmcneill AXP_CTRL2("dcdc3", 500, 1300, 10, 70, 20, 5,
132 1.1 jmcneill 0x10, __BIT(2), 0x22, __BITS(6,0)),
133 1.6 jmcneill AXP_CTRL2("dcdc4", 500, 1300, 10, 70, 20, 5,
134 1.1 jmcneill 0x10, __BIT(3), 0x23, __BITS(6,0)),
135 1.1 jmcneill AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36,
136 1.1 jmcneill 0x10, __BIT(4), 0x24, __BITS(6,0)),
137 1.1 jmcneill AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21,
138 1.1 jmcneill 0x10, __BIT(5), 0x25, __BITS(6,0)),
139 1.1 jmcneill AXP_CTRL("aldo1", 700, 3300, 100,
140 1.1 jmcneill 0x13, __BIT(5), 0x28, __BITS(4,0)),
141 1.1 jmcneill AXP_CTRL("aldo2", 700, 3300, 100,
142 1.1 jmcneill 0x13, __BIT(6), 0x29, __BITS(4,0)),
143 1.1 jmcneill AXP_CTRL("aldo3", 700, 3300, 100,
144 1.1 jmcneill 0x13, __BIT(7), 0x2a, __BITS(4,0)),
145 1.1 jmcneill };
146 1.1 jmcneill
147 1.1 jmcneill static const struct axppmic_ctrl axp805_ctrls[] = {
148 1.1 jmcneill AXP_CTRL2("dcdca", 600, 1520, 10, 51, 20, 21,
149 1.1 jmcneill 0x10, __BIT(0), 0x12, __BITS(6,0)),
150 1.1 jmcneill AXP_CTRL("dcdcb", 1000, 2550, 50,
151 1.1 jmcneill 0x10, __BIT(1), 0x13, __BITS(4,0)),
152 1.1 jmcneill AXP_CTRL2("dcdcc", 600, 1520, 10, 51, 20, 21,
153 1.1 jmcneill 0x10, __BIT(2), 0x14, __BITS(6,0)),
154 1.1 jmcneill AXP_CTRL2("dcdcd", 600, 3300, 20, 46, 100, 18,
155 1.1 jmcneill 0x10, __BIT(3), 0x15, __BITS(5,0)),
156 1.1 jmcneill AXP_CTRL("dcdce", 1100, 3400, 100,
157 1.1 jmcneill 0x10, __BIT(4), 0x16, __BITS(4,0)),
158 1.1 jmcneill AXP_CTRL("aldo1", 700, 3300, 100,
159 1.1 jmcneill 0x10, __BIT(5), 0x17, __BITS(4,0)),
160 1.1 jmcneill AXP_CTRL("aldo2", 700, 3400, 100,
161 1.1 jmcneill 0x10, __BIT(6), 0x18, __BITS(4,0)),
162 1.1 jmcneill AXP_CTRL("aldo3", 700, 3300, 100,
163 1.1 jmcneill 0x10, __BIT(7), 0x19, __BITS(4,0)),
164 1.1 jmcneill AXP_CTRL("bldo1", 700, 1900, 100,
165 1.1 jmcneill 0x11, __BIT(0), 0x20, __BITS(3,0)),
166 1.1 jmcneill AXP_CTRL("bldo2", 700, 1900, 100,
167 1.1 jmcneill 0x11, __BIT(1), 0x21, __BITS(3,0)),
168 1.1 jmcneill AXP_CTRL("bldo3", 700, 1900, 100,
169 1.1 jmcneill 0x11, __BIT(2), 0x22, __BITS(3,0)),
170 1.1 jmcneill AXP_CTRL("bldo4", 700, 1900, 100,
171 1.1 jmcneill 0x11, __BIT(3), 0x23, __BITS(3,0)),
172 1.1 jmcneill AXP_CTRL("cldo1", 700, 3300, 100,
173 1.1 jmcneill 0x11, __BIT(4), 0x24, __BITS(4,0)),
174 1.1 jmcneill AXP_CTRL2("cldo2", 700, 4200, 100, 28, 200, 4,
175 1.1 jmcneill 0x11, __BIT(5), 0x25, __BITS(4,0)),
176 1.1 jmcneill AXP_CTRL("cldo3", 700, 3300, 100,
177 1.1 jmcneill 0x11, __BIT(6), 0x26, __BITS(4,0)),
178 1.1 jmcneill };
179 1.1 jmcneill
180 1.8 jmcneill struct axppmic_irq {
181 1.8 jmcneill u_int reg;
182 1.8 jmcneill uint8_t mask;
183 1.8 jmcneill };
184 1.8 jmcneill
185 1.8 jmcneill #define AXPPMIC_IRQ(_reg, _mask) \
186 1.8 jmcneill { .reg = (_reg), .mask = (_mask) }
187 1.8 jmcneill
188 1.1 jmcneill struct axppmic_config {
189 1.1 jmcneill const char *name;
190 1.1 jmcneill const struct axppmic_ctrl *controls;
191 1.1 jmcneill u_int ncontrols;
192 1.1 jmcneill u_int irq_regs;
193 1.2 jmcneill bool has_battery;
194 1.2 jmcneill bool has_fuel_gauge;
195 1.8 jmcneill struct axppmic_irq poklirq;
196 1.8 jmcneill struct axppmic_irq acinirq;
197 1.8 jmcneill struct axppmic_irq vbusirq;
198 1.8 jmcneill struct axppmic_irq battirq;
199 1.8 jmcneill struct axppmic_irq chargeirq;
200 1.8 jmcneill struct axppmic_irq chargestirq;
201 1.2 jmcneill };
202 1.2 jmcneill
203 1.2 jmcneill enum axppmic_sensor {
204 1.3 jmcneill AXP_SENSOR_ACIN_PRESENT,
205 1.3 jmcneill AXP_SENSOR_VBUS_PRESENT,
206 1.2 jmcneill AXP_SENSOR_BATT_PRESENT,
207 1.2 jmcneill AXP_SENSOR_BATT_CHARGING,
208 1.2 jmcneill AXP_SENSOR_BATT_CHARGE_STATE,
209 1.2 jmcneill AXP_SENSOR_BATT_CAPACITY,
210 1.2 jmcneill AXP_NSENSORS
211 1.1 jmcneill };
212 1.1 jmcneill
213 1.1 jmcneill struct axppmic_softc {
214 1.1 jmcneill device_t sc_dev;
215 1.1 jmcneill i2c_tag_t sc_i2c;
216 1.1 jmcneill i2c_addr_t sc_addr;
217 1.1 jmcneill int sc_phandle;
218 1.1 jmcneill
219 1.8 jmcneill const struct axppmic_config *sc_conf;
220 1.2 jmcneill
221 1.1 jmcneill struct sysmon_pswitch sc_smpsw;
222 1.1 jmcneill
223 1.2 jmcneill struct sysmon_envsys *sc_sme;
224 1.3 jmcneill
225 1.2 jmcneill envsys_data_t sc_sensor[AXP_NSENSORS];
226 1.4 jmcneill
227 1.4 jmcneill u_int sc_warn_thres;
228 1.4 jmcneill u_int sc_shut_thres;
229 1.1 jmcneill };
230 1.1 jmcneill
231 1.1 jmcneill struct axpreg_softc {
232 1.1 jmcneill device_t sc_dev;
233 1.1 jmcneill i2c_tag_t sc_i2c;
234 1.1 jmcneill i2c_addr_t sc_addr;
235 1.1 jmcneill const struct axppmic_ctrl *sc_ctrl;
236 1.1 jmcneill };
237 1.1 jmcneill
238 1.1 jmcneill struct axpreg_attach_args {
239 1.1 jmcneill const struct axppmic_ctrl *reg_ctrl;
240 1.1 jmcneill int reg_phandle;
241 1.1 jmcneill i2c_tag_t reg_i2c;
242 1.1 jmcneill i2c_addr_t reg_addr;
243 1.1 jmcneill };
244 1.1 jmcneill
245 1.1 jmcneill static const struct axppmic_config axp803_config = {
246 1.1 jmcneill .name = "AXP803",
247 1.1 jmcneill .controls = axp803_ctrls,
248 1.1 jmcneill .ncontrols = __arraycount(axp803_ctrls),
249 1.1 jmcneill .irq_regs = 6,
250 1.2 jmcneill .has_battery = true,
251 1.2 jmcneill .has_fuel_gauge = true,
252 1.8 jmcneill .poklirq = AXPPMIC_IRQ(5, __BIT(3)),
253 1.8 jmcneill .acinirq = AXPPMIC_IRQ(1, __BITS(6,5)),
254 1.8 jmcneill .vbusirq = AXPPMIC_IRQ(1, __BITS(3,2)),
255 1.8 jmcneill .battirq = AXPPMIC_IRQ(2, __BITS(7,6)),
256 1.8 jmcneill .chargeirq = AXPPMIC_IRQ(2, __BITS(3,2)),
257 1.8 jmcneill .chargestirq = AXPPMIC_IRQ(4, __BITS(1,0)),
258 1.1 jmcneill };
259 1.1 jmcneill
260 1.1 jmcneill static const struct axppmic_config axp805_config = {
261 1.1 jmcneill .name = "AXP805/806",
262 1.1 jmcneill .controls = axp805_ctrls,
263 1.1 jmcneill .ncontrols = __arraycount(axp805_ctrls),
264 1.1 jmcneill .irq_regs = 2,
265 1.8 jmcneill .poklirq = AXPPMIC_IRQ(2, __BIT(0)),
266 1.1 jmcneill };
267 1.1 jmcneill
268 1.1 jmcneill static const struct of_compat_data compat_data[] = {
269 1.1 jmcneill { "x-powers,axp803", (uintptr_t)&axp803_config },
270 1.1 jmcneill { "x-powers,axp805", (uintptr_t)&axp805_config },
271 1.1 jmcneill { "x-powers,axp806", (uintptr_t)&axp805_config },
272 1.1 jmcneill { NULL }
273 1.1 jmcneill };
274 1.1 jmcneill
275 1.1 jmcneill static int
276 1.1 jmcneill axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags)
277 1.1 jmcneill {
278 1.1 jmcneill return iic_smbus_read_byte(tag, addr, reg, val, flags);
279 1.1 jmcneill }
280 1.1 jmcneill
281 1.1 jmcneill static int
282 1.1 jmcneill axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags)
283 1.1 jmcneill {
284 1.1 jmcneill return iic_smbus_write_byte(tag, addr, reg, val, flags);
285 1.1 jmcneill }
286 1.1 jmcneill
287 1.1 jmcneill static int
288 1.1 jmcneill axppmic_set_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int min, u_int max)
289 1.1 jmcneill {
290 1.1 jmcneill const int flags = (cold ? I2C_F_POLL : 0);
291 1.1 jmcneill u_int vol, reg_val;
292 1.1 jmcneill int nstep, error;
293 1.1 jmcneill uint8_t val;
294 1.1 jmcneill
295 1.1 jmcneill if (!c->c_voltage_mask)
296 1.1 jmcneill return EINVAL;
297 1.1 jmcneill
298 1.1 jmcneill if (min < c->c_min || min > c->c_max)
299 1.1 jmcneill return EINVAL;
300 1.1 jmcneill
301 1.1 jmcneill reg_val = 0;
302 1.1 jmcneill nstep = 1;
303 1.1 jmcneill vol = c->c_min;
304 1.1 jmcneill
305 1.1 jmcneill for (nstep = 0; nstep < c->c_step1cnt && vol < min; nstep++) {
306 1.1 jmcneill ++reg_val;
307 1.1 jmcneill vol += c->c_step1;
308 1.1 jmcneill }
309 1.1 jmcneill for (nstep = 0; nstep < c->c_step2cnt && vol < min; nstep++) {
310 1.1 jmcneill ++reg_val;
311 1.1 jmcneill vol += c->c_step2;
312 1.1 jmcneill }
313 1.1 jmcneill
314 1.1 jmcneill if (vol > max)
315 1.1 jmcneill return EINVAL;
316 1.1 jmcneill
317 1.1 jmcneill iic_acquire_bus(tag, flags);
318 1.1 jmcneill if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags)) == 0) {
319 1.1 jmcneill val &= ~c->c_voltage_mask;
320 1.1 jmcneill val |= __SHIFTIN(reg_val, c->c_voltage_mask);
321 1.1 jmcneill error = axppmic_write(tag, addr, c->c_voltage_reg, val, flags);
322 1.1 jmcneill }
323 1.1 jmcneill iic_release_bus(tag, flags);
324 1.1 jmcneill
325 1.1 jmcneill return error;
326 1.1 jmcneill }
327 1.1 jmcneill
328 1.1 jmcneill static int
329 1.1 jmcneill axppmic_get_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int *pvol)
330 1.1 jmcneill {
331 1.1 jmcneill const int flags = (cold ? I2C_F_POLL : 0);
332 1.1 jmcneill int reg_val, error;
333 1.1 jmcneill uint8_t val;
334 1.1 jmcneill
335 1.1 jmcneill if (!c->c_voltage_mask)
336 1.1 jmcneill return EINVAL;
337 1.1 jmcneill
338 1.1 jmcneill iic_acquire_bus(tag, flags);
339 1.1 jmcneill error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags);
340 1.1 jmcneill iic_release_bus(tag, flags);
341 1.1 jmcneill if (error)
342 1.1 jmcneill return error;
343 1.1 jmcneill
344 1.1 jmcneill reg_val = __SHIFTOUT(val, c->c_voltage_mask);
345 1.1 jmcneill if (reg_val < c->c_step1cnt) {
346 1.1 jmcneill *pvol = c->c_min + reg_val * c->c_step1;
347 1.1 jmcneill } else {
348 1.1 jmcneill *pvol = c->c_min + (c->c_step1cnt * c->c_step1) +
349 1.1 jmcneill ((reg_val - c->c_step1cnt) * c->c_step2);
350 1.1 jmcneill }
351 1.1 jmcneill
352 1.1 jmcneill return 0;
353 1.1 jmcneill }
354 1.1 jmcneill
355 1.1 jmcneill static void
356 1.1 jmcneill axppmic_power_poweroff(device_t dev)
357 1.1 jmcneill {
358 1.1 jmcneill struct axppmic_softc *sc = device_private(dev);
359 1.1 jmcneill
360 1.1 jmcneill delay(1000000);
361 1.1 jmcneill
362 1.1 jmcneill iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
363 1.1 jmcneill axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_POWER_DISABLE_REG, AXP_POWER_DISABLE_CTRL, I2C_F_POLL);
364 1.1 jmcneill iic_release_bus(sc->sc_i2c, I2C_F_POLL);
365 1.1 jmcneill }
366 1.1 jmcneill
367 1.1 jmcneill static struct fdtbus_power_controller_func axppmic_power_funcs = {
368 1.1 jmcneill .poweroff = axppmic_power_poweroff,
369 1.1 jmcneill };
370 1.1 jmcneill
371 1.1 jmcneill static void
372 1.1 jmcneill axppmic_task_shut(void *priv)
373 1.1 jmcneill {
374 1.1 jmcneill struct axppmic_softc *sc = priv;
375 1.1 jmcneill
376 1.1 jmcneill sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED);
377 1.1 jmcneill }
378 1.1 jmcneill
379 1.2 jmcneill static void
380 1.8 jmcneill axppmic_sensor_update(struct sysmon_envsys *sme, envsys_data_t *e)
381 1.2 jmcneill {
382 1.2 jmcneill struct axppmic_softc *sc = sme->sme_cookie;
383 1.2 jmcneill const int flags = I2C_F_POLL;
384 1.4 jmcneill uint8_t val;
385 1.2 jmcneill
386 1.2 jmcneill e->state = ENVSYS_SINVALID;
387 1.2 jmcneill
388 1.2 jmcneill switch (e->private) {
389 1.3 jmcneill case AXP_SENSOR_ACIN_PRESENT:
390 1.3 jmcneill if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) {
391 1.3 jmcneill e->state = ENVSYS_SVALID;
392 1.3 jmcneill e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT);
393 1.3 jmcneill }
394 1.3 jmcneill break;
395 1.3 jmcneill case AXP_SENSOR_VBUS_PRESENT:
396 1.3 jmcneill if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) {
397 1.3 jmcneill e->state = ENVSYS_SVALID;
398 1.3 jmcneill e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT);
399 1.3 jmcneill }
400 1.3 jmcneill break;
401 1.2 jmcneill case AXP_SENSOR_BATT_PRESENT:
402 1.2 jmcneill if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) {
403 1.2 jmcneill if (val & AXP_POWER_MODE_BATT_VALID) {
404 1.2 jmcneill e->state = ENVSYS_SVALID;
405 1.2 jmcneill e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT);
406 1.2 jmcneill }
407 1.2 jmcneill }
408 1.2 jmcneill break;
409 1.2 jmcneill case AXP_SENSOR_BATT_CHARGING:
410 1.2 jmcneill if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) {
411 1.2 jmcneill e->state = ENVSYS_SVALID;
412 1.2 jmcneill e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING);
413 1.2 jmcneill }
414 1.2 jmcneill break;
415 1.2 jmcneill case AXP_SENSOR_BATT_CHARGE_STATE:
416 1.2 jmcneill if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 &&
417 1.2 jmcneill (val & AXP_POWER_MODE_BATT_VALID) != 0 &&
418 1.2 jmcneill (val & AXP_POWER_MODE_BATT_PRESENT) != 0 &&
419 1.2 jmcneill axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 &&
420 1.4 jmcneill (val & AXP_BATT_CAP_VALID) != 0) {
421 1.2 jmcneill const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT);
422 1.4 jmcneill if (batt_val <= sc->sc_shut_thres) {
423 1.2 jmcneill e->state = ENVSYS_SCRITICAL;
424 1.2 jmcneill e->value_cur = ENVSYS_BATTERY_CAPACITY_CRITICAL;
425 1.4 jmcneill } else if (batt_val <= sc->sc_warn_thres) {
426 1.2 jmcneill e->state = ENVSYS_SWARNUNDER;
427 1.2 jmcneill e->value_cur = ENVSYS_BATTERY_CAPACITY_WARNING;
428 1.2 jmcneill } else {
429 1.2 jmcneill e->state = ENVSYS_SVALID;
430 1.2 jmcneill e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL;
431 1.2 jmcneill }
432 1.2 jmcneill }
433 1.2 jmcneill break;
434 1.2 jmcneill case AXP_SENSOR_BATT_CAPACITY:
435 1.2 jmcneill if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 &&
436 1.2 jmcneill (val & AXP_POWER_MODE_BATT_VALID) != 0 &&
437 1.2 jmcneill (val & AXP_POWER_MODE_BATT_PRESENT) != 0 &&
438 1.2 jmcneill axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 &&
439 1.2 jmcneill (val & AXP_BATT_CAP_VALID) != 0) {
440 1.2 jmcneill e->state = ENVSYS_SVALID;
441 1.2 jmcneill e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT);
442 1.2 jmcneill }
443 1.2 jmcneill break;
444 1.2 jmcneill }
445 1.8 jmcneill }
446 1.8 jmcneill
447 1.8 jmcneill static void
448 1.8 jmcneill axppmic_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *e)
449 1.8 jmcneill {
450 1.8 jmcneill struct axppmic_softc *sc = sme->sme_cookie;
451 1.8 jmcneill const int flags = I2C_F_POLL;
452 1.8 jmcneill
453 1.8 jmcneill switch (e->private) {
454 1.8 jmcneill case AXP_SENSOR_BATT_CAPACITY:
455 1.8 jmcneill /* Always update battery capacity (fuel gauge) */
456 1.8 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
457 1.8 jmcneill axppmic_sensor_update(sme, e);
458 1.8 jmcneill iic_release_bus(sc->sc_i2c, flags);
459 1.8 jmcneill break;
460 1.8 jmcneill default:
461 1.8 jmcneill /* Refresh if the sensor is not in valid state */
462 1.8 jmcneill if (e->state != ENVSYS_SVALID) {
463 1.8 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
464 1.8 jmcneill axppmic_sensor_update(sme, e);
465 1.8 jmcneill iic_release_bus(sc->sc_i2c, flags);
466 1.8 jmcneill }
467 1.8 jmcneill break;
468 1.8 jmcneill }
469 1.8 jmcneill }
470 1.8 jmcneill
471 1.8 jmcneill static int
472 1.8 jmcneill axppmic_intr(void *priv)
473 1.8 jmcneill {
474 1.8 jmcneill struct axppmic_softc *sc = priv;
475 1.8 jmcneill const struct axppmic_config *c = sc->sc_conf;
476 1.8 jmcneill const int flags = I2C_F_POLL;
477 1.8 jmcneill uint8_t stat;
478 1.8 jmcneill u_int n;
479 1.8 jmcneill
480 1.8 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
481 1.8 jmcneill for (n = 1; n <= c->irq_regs; n++) {
482 1.8 jmcneill if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(n), &stat, flags) == 0) {
483 1.8 jmcneill if (n == c->poklirq.reg && (stat & c->poklirq.mask) != 0)
484 1.8 jmcneill sysmon_task_queue_sched(0, axppmic_task_shut, sc);
485 1.8 jmcneill if (n == c->acinirq.reg && (stat & c->acinirq.mask) != 0)
486 1.8 jmcneill axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]);
487 1.8 jmcneill if (n == c->vbusirq.reg && (stat & c->vbusirq.mask) != 0)
488 1.8 jmcneill axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]);
489 1.8 jmcneill if (n == c->battirq.reg && (stat & c->battirq.mask) != 0)
490 1.8 jmcneill axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]);
491 1.8 jmcneill if (n == c->chargeirq.reg && (stat & c->chargeirq.mask) != 0)
492 1.8 jmcneill axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]);
493 1.8 jmcneill if (n == c->chargestirq.reg && (stat & c->chargestirq.mask) != 0)
494 1.8 jmcneill axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]);
495 1.8 jmcneill
496 1.8 jmcneill if (stat != 0)
497 1.8 jmcneill axppmic_write(sc->sc_i2c, sc->sc_addr,
498 1.8 jmcneill AXP_IRQ_STATUS_REG(n), stat, flags);
499 1.8 jmcneill }
500 1.8 jmcneill }
501 1.2 jmcneill iic_release_bus(sc->sc_i2c, flags);
502 1.8 jmcneill
503 1.8 jmcneill return 1;
504 1.2 jmcneill }
505 1.2 jmcneill
506 1.2 jmcneill static void
507 1.3 jmcneill axppmic_attach_acadapter(struct axppmic_softc *sc)
508 1.3 jmcneill {
509 1.3 jmcneill envsys_data_t *e;
510 1.3 jmcneill
511 1.3 jmcneill e = &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT];
512 1.3 jmcneill e->private = AXP_SENSOR_ACIN_PRESENT;
513 1.3 jmcneill e->units = ENVSYS_INDICATOR;
514 1.3 jmcneill e->state = ENVSYS_SINVALID;
515 1.3 jmcneill strlcpy(e->desc, "ACIN present", sizeof(e->desc));
516 1.3 jmcneill sysmon_envsys_sensor_attach(sc->sc_sme, e);
517 1.3 jmcneill
518 1.3 jmcneill e = &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT];
519 1.3 jmcneill e->private = AXP_SENSOR_VBUS_PRESENT;
520 1.3 jmcneill e->units = ENVSYS_INDICATOR;
521 1.3 jmcneill e->state = ENVSYS_SINVALID;
522 1.3 jmcneill strlcpy(e->desc, "VBUS present", sizeof(e->desc));
523 1.3 jmcneill sysmon_envsys_sensor_attach(sc->sc_sme, e);
524 1.3 jmcneill }
525 1.3 jmcneill
526 1.3 jmcneill static void
527 1.2 jmcneill axppmic_attach_battery(struct axppmic_softc *sc)
528 1.2 jmcneill {
529 1.2 jmcneill envsys_data_t *e;
530 1.4 jmcneill uint8_t val;
531 1.4 jmcneill
532 1.4 jmcneill iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
533 1.4 jmcneill if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &val, I2C_F_POLL) == 0) {
534 1.4 jmcneill sc->sc_warn_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV1) + 5;
535 1.4 jmcneill sc->sc_shut_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV2);
536 1.4 jmcneill }
537 1.4 jmcneill iic_release_bus(sc->sc_i2c, I2C_F_POLL);
538 1.2 jmcneill
539 1.2 jmcneill e = &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT];
540 1.2 jmcneill e->private = AXP_SENSOR_BATT_PRESENT;
541 1.2 jmcneill e->units = ENVSYS_INDICATOR;
542 1.2 jmcneill e->state = ENVSYS_SINVALID;
543 1.2 jmcneill strlcpy(e->desc, "battery present", sizeof(e->desc));
544 1.2 jmcneill sysmon_envsys_sensor_attach(sc->sc_sme, e);
545 1.2 jmcneill
546 1.2 jmcneill e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING];
547 1.2 jmcneill e->private = AXP_SENSOR_BATT_CHARGING;
548 1.2 jmcneill e->units = ENVSYS_BATTERY_CHARGE;
549 1.2 jmcneill e->state = ENVSYS_SINVALID;
550 1.2 jmcneill strlcpy(e->desc, "charging", sizeof(e->desc));
551 1.2 jmcneill sysmon_envsys_sensor_attach(sc->sc_sme, e);
552 1.2 jmcneill
553 1.2 jmcneill e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE];
554 1.2 jmcneill e->private = AXP_SENSOR_BATT_CHARGE_STATE;
555 1.2 jmcneill e->units = ENVSYS_BATTERY_CAPACITY;
556 1.2 jmcneill e->flags = ENVSYS_FMONSTCHANGED;
557 1.2 jmcneill e->state = ENVSYS_SVALID;
558 1.2 jmcneill e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL;
559 1.2 jmcneill strlcpy(e->desc, "charge state", sizeof(e->desc));
560 1.2 jmcneill sysmon_envsys_sensor_attach(sc->sc_sme, e);
561 1.2 jmcneill
562 1.8 jmcneill if (sc->sc_conf->has_fuel_gauge) {
563 1.2 jmcneill e = &sc->sc_sensor[AXP_SENSOR_BATT_CAPACITY];
564 1.2 jmcneill e->private = AXP_SENSOR_BATT_CAPACITY;
565 1.2 jmcneill e->units = ENVSYS_INTEGER;
566 1.2 jmcneill e->state = ENVSYS_SINVALID;
567 1.2 jmcneill e->flags = ENVSYS_FPERCENT;
568 1.2 jmcneill strlcpy(e->desc, "battery percent", sizeof(e->desc));
569 1.2 jmcneill sysmon_envsys_sensor_attach(sc->sc_sme, e);
570 1.2 jmcneill }
571 1.2 jmcneill }
572 1.2 jmcneill
573 1.2 jmcneill static void
574 1.2 jmcneill axppmic_attach_sensors(struct axppmic_softc *sc)
575 1.2 jmcneill {
576 1.8 jmcneill if (sc->sc_conf->has_battery) {
577 1.2 jmcneill sc->sc_sme = sysmon_envsys_create();
578 1.2 jmcneill sc->sc_sme->sme_name = device_xname(sc->sc_dev);
579 1.2 jmcneill sc->sc_sme->sme_cookie = sc;
580 1.2 jmcneill sc->sc_sme->sme_refresh = axppmic_sensor_refresh;
581 1.2 jmcneill sc->sc_sme->sme_class = SME_CLASS_BATTERY;
582 1.5 jmcneill sc->sc_sme->sme_flags = SME_INIT_REFRESH;
583 1.2 jmcneill
584 1.3 jmcneill axppmic_attach_acadapter(sc);
585 1.2 jmcneill axppmic_attach_battery(sc);
586 1.2 jmcneill
587 1.2 jmcneill sysmon_envsys_register(sc->sc_sme);
588 1.2 jmcneill }
589 1.2 jmcneill }
590 1.2 jmcneill
591 1.2 jmcneill
592 1.1 jmcneill static int
593 1.1 jmcneill axppmic_match(device_t parent, cfdata_t match, void *aux)
594 1.1 jmcneill {
595 1.1 jmcneill struct i2c_attach_args *ia = aux;
596 1.1 jmcneill
597 1.1 jmcneill if (ia->ia_name != NULL) {
598 1.1 jmcneill if (ia->ia_cookie)
599 1.1 jmcneill return of_match_compat_data(ia->ia_cookie, compat_data);
600 1.1 jmcneill else
601 1.1 jmcneill return 0;
602 1.1 jmcneill }
603 1.1 jmcneill
604 1.1 jmcneill return 1;
605 1.1 jmcneill }
606 1.1 jmcneill
607 1.1 jmcneill static void
608 1.1 jmcneill axppmic_attach(device_t parent, device_t self, void *aux)
609 1.1 jmcneill {
610 1.1 jmcneill struct axppmic_softc *sc = device_private(self);
611 1.1 jmcneill const struct axppmic_config *c;
612 1.1 jmcneill struct axpreg_attach_args aaa;
613 1.1 jmcneill struct i2c_attach_args *ia = aux;
614 1.1 jmcneill int phandle, child, i;
615 1.1 jmcneill uint32_t irq_mask;
616 1.1 jmcneill void *ih;
617 1.1 jmcneill
618 1.1 jmcneill c = (void *)of_search_compatible(ia->ia_cookie, compat_data)->data;
619 1.1 jmcneill
620 1.1 jmcneill sc->sc_dev = self;
621 1.1 jmcneill sc->sc_i2c = ia->ia_tag;
622 1.1 jmcneill sc->sc_addr = ia->ia_addr;
623 1.1 jmcneill sc->sc_phandle = ia->ia_cookie;
624 1.8 jmcneill sc->sc_conf = c;
625 1.1 jmcneill
626 1.1 jmcneill aprint_naive("\n");
627 1.1 jmcneill aprint_normal(": %s\n", c->name);
628 1.1 jmcneill
629 1.1 jmcneill sc->sc_smpsw.smpsw_name = device_xname(self);
630 1.1 jmcneill sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_POWER;
631 1.1 jmcneill sysmon_pswitch_register(&sc->sc_smpsw);
632 1.1 jmcneill
633 1.1 jmcneill iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
634 1.2 jmcneill for (i = 1; i <= c->irq_regs; i++) {
635 1.1 jmcneill irq_mask = 0;
636 1.8 jmcneill if (i == c->poklirq.reg)
637 1.8 jmcneill irq_mask |= c->poklirq.mask;
638 1.8 jmcneill if (i == c->acinirq.reg)
639 1.8 jmcneill irq_mask |= c->acinirq.mask;
640 1.8 jmcneill if (i == c->vbusirq.reg)
641 1.8 jmcneill irq_mask |= c->vbusirq.mask;
642 1.8 jmcneill if (i == c->battirq.reg)
643 1.8 jmcneill irq_mask |= c->battirq.mask;
644 1.8 jmcneill if (i == c->chargeirq.reg)
645 1.8 jmcneill irq_mask |= c->chargeirq.mask;
646 1.8 jmcneill if (i == c->chargestirq.reg)
647 1.8 jmcneill irq_mask |= c->chargestirq.mask;
648 1.1 jmcneill axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_ENABLE_REG(i), irq_mask, I2C_F_POLL);
649 1.1 jmcneill }
650 1.1 jmcneill iic_release_bus(sc->sc_i2c, I2C_F_POLL);
651 1.1 jmcneill
652 1.1 jmcneill ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
653 1.1 jmcneill axppmic_intr, sc);
654 1.1 jmcneill if (ih == NULL) {
655 1.1 jmcneill aprint_error_dev(self, "WARNING: couldn't establish interrupt handler\n");
656 1.1 jmcneill }
657 1.1 jmcneill
658 1.1 jmcneill fdtbus_register_power_controller(sc->sc_dev, sc->sc_phandle,
659 1.1 jmcneill &axppmic_power_funcs);
660 1.1 jmcneill
661 1.1 jmcneill phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators");
662 1.2 jmcneill if (phandle > 0) {
663 1.2 jmcneill aaa.reg_i2c = sc->sc_i2c;
664 1.2 jmcneill aaa.reg_addr = sc->sc_addr;
665 1.2 jmcneill for (i = 0; i < c->ncontrols; i++) {
666 1.2 jmcneill const struct axppmic_ctrl *ctrl = &c->controls[i];
667 1.2 jmcneill child = of_find_firstchild_byname(phandle, ctrl->c_name);
668 1.2 jmcneill if (child <= 0)
669 1.2 jmcneill continue;
670 1.2 jmcneill aaa.reg_ctrl = ctrl;
671 1.2 jmcneill aaa.reg_phandle = child;
672 1.2 jmcneill config_found(sc->sc_dev, &aaa, NULL);
673 1.2 jmcneill }
674 1.2 jmcneill }
675 1.1 jmcneill
676 1.2 jmcneill if (c->has_battery)
677 1.2 jmcneill axppmic_attach_sensors(sc);
678 1.1 jmcneill }
679 1.1 jmcneill
680 1.1 jmcneill static int
681 1.1 jmcneill axpreg_acquire(device_t dev)
682 1.1 jmcneill {
683 1.1 jmcneill return 0;
684 1.1 jmcneill }
685 1.1 jmcneill
686 1.1 jmcneill static void
687 1.1 jmcneill axpreg_release(device_t dev)
688 1.1 jmcneill {
689 1.1 jmcneill }
690 1.1 jmcneill
691 1.1 jmcneill static int
692 1.1 jmcneill axpreg_enable(device_t dev, bool enable)
693 1.1 jmcneill {
694 1.1 jmcneill struct axpreg_softc *sc = device_private(dev);
695 1.1 jmcneill const struct axppmic_ctrl *c = sc->sc_ctrl;
696 1.1 jmcneill const int flags = (cold ? I2C_F_POLL : 0);
697 1.1 jmcneill uint8_t val;
698 1.1 jmcneill int error;
699 1.1 jmcneill
700 1.1 jmcneill if (!c->c_enable_mask)
701 1.1 jmcneill return EINVAL;
702 1.1 jmcneill
703 1.1 jmcneill iic_acquire_bus(sc->sc_i2c, flags);
704 1.1 jmcneill if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) {
705 1.1 jmcneill if (enable)
706 1.1 jmcneill val |= c->c_enable_mask;
707 1.1 jmcneill else
708 1.1 jmcneill val &= ~c->c_enable_mask;
709 1.1 jmcneill error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags);
710 1.1 jmcneill }
711 1.1 jmcneill iic_release_bus(sc->sc_i2c, flags);
712 1.1 jmcneill
713 1.1 jmcneill return error;
714 1.1 jmcneill }
715 1.1 jmcneill
716 1.1 jmcneill static int
717 1.1 jmcneill axpreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol)
718 1.1 jmcneill {
719 1.1 jmcneill struct axpreg_softc *sc = device_private(dev);
720 1.1 jmcneill const struct axppmic_ctrl *c = sc->sc_ctrl;
721 1.1 jmcneill
722 1.1 jmcneill return axppmic_set_voltage(sc->sc_i2c, sc->sc_addr, c,
723 1.1 jmcneill min_uvol / 1000, max_uvol / 1000);
724 1.1 jmcneill }
725 1.1 jmcneill
726 1.1 jmcneill static int
727 1.1 jmcneill axpreg_get_voltage(device_t dev, u_int *puvol)
728 1.1 jmcneill {
729 1.1 jmcneill struct axpreg_softc *sc = device_private(dev);
730 1.1 jmcneill const struct axppmic_ctrl *c = sc->sc_ctrl;
731 1.1 jmcneill int error;
732 1.1 jmcneill u_int vol;
733 1.1 jmcneill
734 1.1 jmcneill error = axppmic_get_voltage(sc->sc_i2c, sc->sc_addr, c, &vol);
735 1.1 jmcneill if (error)
736 1.1 jmcneill return error;
737 1.1 jmcneill
738 1.1 jmcneill *puvol = vol * 1000;
739 1.1 jmcneill return 0;
740 1.1 jmcneill }
741 1.1 jmcneill
742 1.1 jmcneill static struct fdtbus_regulator_controller_func axpreg_funcs = {
743 1.1 jmcneill .acquire = axpreg_acquire,
744 1.1 jmcneill .release = axpreg_release,
745 1.1 jmcneill .enable = axpreg_enable,
746 1.1 jmcneill .set_voltage = axpreg_set_voltage,
747 1.1 jmcneill .get_voltage = axpreg_get_voltage,
748 1.1 jmcneill };
749 1.1 jmcneill
750 1.1 jmcneill static int
751 1.1 jmcneill axpreg_match(device_t parent, cfdata_t match, void *aux)
752 1.1 jmcneill {
753 1.1 jmcneill return 1;
754 1.1 jmcneill }
755 1.1 jmcneill
756 1.1 jmcneill static void
757 1.1 jmcneill axpreg_attach(device_t parent, device_t self, void *aux)
758 1.1 jmcneill {
759 1.1 jmcneill struct axpreg_softc *sc = device_private(self);
760 1.1 jmcneill struct axpreg_attach_args *aaa = aux;
761 1.1 jmcneill const int phandle = aaa->reg_phandle;
762 1.1 jmcneill const char *name;
763 1.1 jmcneill
764 1.1 jmcneill sc->sc_dev = self;
765 1.1 jmcneill sc->sc_i2c = aaa->reg_i2c;
766 1.1 jmcneill sc->sc_addr = aaa->reg_addr;
767 1.1 jmcneill sc->sc_ctrl = aaa->reg_ctrl;
768 1.1 jmcneill
769 1.1 jmcneill fdtbus_register_regulator_controller(self, phandle,
770 1.1 jmcneill &axpreg_funcs);
771 1.1 jmcneill
772 1.1 jmcneill aprint_naive("\n");
773 1.1 jmcneill name = fdtbus_get_string(phandle, "regulator-name");
774 1.1 jmcneill if (name)
775 1.1 jmcneill aprint_normal(": %s\n", name);
776 1.1 jmcneill else
777 1.1 jmcneill aprint_normal("\n");
778 1.1 jmcneill }
779 1.1 jmcneill
780 1.1 jmcneill CFATTACH_DECL_NEW(axppmic, sizeof(struct axppmic_softc),
781 1.1 jmcneill axppmic_match, axppmic_attach, NULL, NULL);
782 1.1 jmcneill
783 1.1 jmcneill CFATTACH_DECL_NEW(axpreg, sizeof(struct axpreg_softc),
784 1.1 jmcneill axpreg_match, axpreg_attach, NULL, NULL);
785