axppmic.c revision 1.11
1 /* $NetBSD: axppmic.c,v 1.11 2018/06/16 21:22:13 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2014-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: axppmic.c,v 1.11 2018/06/16 21:22:13 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 40 #include <dev/i2c/i2cvar.h> 41 42 #include <dev/sysmon/sysmonvar.h> 43 #include <dev/sysmon/sysmon_taskq.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #define AXP_POWER_SOURCE_REG 0x00 48 #define AXP_POWER_SOURCE_ACIN_PRESENT __BIT(7) 49 #define AXP_POWER_SOURCE_VBUS_PRESENT __BIT(5) 50 #define AXP_POWER_SOURCE_CHARGE_DIRECTION __BIT(2) 51 52 #define AXP_POWER_MODE_REG 0x01 53 #define AXP_POWER_MODE_BATT_VALID __BIT(4) 54 #define AXP_POWER_MODE_BATT_PRESENT __BIT(5) 55 #define AXP_POWER_MODE_BATT_CHARGING __BIT(6) 56 57 #define AXP_POWER_DISABLE_REG 0x32 58 #define AXP_POWER_DISABLE_CTRL __BIT(7) 59 60 #define AXP_IRQ_ENABLE_REG(n) (0x40 + (n) - 1) 61 #define AXP_IRQ1_ACIN_RAISE __BIT(6) 62 #define AXP_IRQ1_ACIN_LOWER __BIT(5) 63 #define AXP_IRQ1_VBUS_RAISE __BIT(3) 64 #define AXP_IRQ1_VBUS_LOWER __BIT(2) 65 #define AXP_IRQ_STATUS_REG(n) (0x48 + (n) - 1) 66 67 #define AXP_BATSENSE_HI_REG 0x78 68 #define AXP_BATSENSE_LO_REG 0x79 69 70 #define AXP_BATTCHG_HI_REG 0x7a 71 #define AXP_BATTCHG_LO_REG 0x7b 72 73 #define AXP_BATTDISCHG_HI_REG 0x7c 74 #define AXP_BATTDISCHG_LO_REG 0x7d 75 76 #define AXP_ADC_RAW(_hi, _lo) \ 77 (((u_int)(_hi) << 4) | ((lo) & 0xf)) 78 79 #define AXP_FUEL_GAUGE_CTRL_REG 0xb8 80 #define AXP_FUEL_GAUGE_CTRL_EN __BIT(7) 81 82 #define AXP_BATT_CAP_REG 0xb9 83 #define AXP_BATT_CAP_VALID __BIT(7) 84 #define AXP_BATT_CAP_PERCENT __BITS(6,0) 85 86 #define AXP_BATT_CAP_WARN_REG 0xe6 87 #define AXP_BATT_CAP_WARN_LV1 __BITS(7,4) 88 #define AXP_BATT_CAP_WARN_LV2 __BITS(3,0) 89 90 struct axppmic_ctrl { 91 device_t c_dev; 92 93 const char * c_name; 94 u_int c_min; 95 u_int c_max; 96 u_int c_step1; 97 u_int c_step1cnt; 98 u_int c_step2; 99 u_int c_step2cnt; 100 101 uint8_t c_enable_reg; 102 uint8_t c_enable_mask; 103 104 uint8_t c_voltage_reg; 105 uint8_t c_voltage_mask; 106 }; 107 108 #define AXP_CTRL(name, min, max, step, ereg, emask, vreg, vmask) \ 109 { .c_name = (name), .c_min = (min), .c_max = (max), \ 110 .c_step1 = (step), .c_step1cnt = (((max) - (min)) / (step)) + 1, \ 111 .c_step2 = 0, .c_step2cnt = 0, \ 112 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 113 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 114 115 #define AXP_CTRL2(name, min, max, step1, step1cnt, step2, step2cnt, ereg, emask, vreg, vmask) \ 116 { .c_name = (name), .c_min = (min), .c_max = (max), \ 117 .c_step1 = (step1), .c_step1cnt = (step1cnt), \ 118 .c_step2 = (step2), .c_step2cnt = (step2cnt), \ 119 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 120 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 121 122 static const struct axppmic_ctrl axp803_ctrls[] = { 123 AXP_CTRL("dldo1", 700, 3300, 100, 124 0x12, __BIT(3), 0x15, __BITS(4,0)), 125 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 126 0x12, __BIT(4), 0x16, __BITS(4,0)), 127 AXP_CTRL("dldo3", 700, 3300, 100, 128 0x12, __BIT(5), 0x17, __BITS(4,0)), 129 AXP_CTRL("dldo4", 700, 3300, 100, 130 0x12, __BIT(6), 0x18, __BITS(4,0)), 131 AXP_CTRL("eldo1", 700, 1900, 50, 132 0x12, __BIT(0), 0x19, __BITS(4,0)), 133 AXP_CTRL("eldo2", 700, 1900, 50, 134 0x12, __BIT(1), 0x1a, __BITS(4,0)), 135 AXP_CTRL("eldo3", 700, 1900, 50, 136 0x12, __BIT(2), 0x1b, __BITS(4,0)), 137 AXP_CTRL("fldo1", 700, 1450, 50, 138 0x13, __BIT(2), 0x1c, __BITS(3,0)), 139 AXP_CTRL("fldo2", 700, 1450, 50, 140 0x13, __BIT(3), 0x1d, __BITS(3,0)), 141 AXP_CTRL("dcdc1", 1600, 3400, 100, 142 0x10, __BIT(0), 0x20, __BITS(4,0)), 143 AXP_CTRL2("dcdc2", 500, 1300, 10, 70, 20, 5, 144 0x10, __BIT(1), 0x21, __BITS(6,0)), 145 AXP_CTRL2("dcdc3", 500, 1300, 10, 70, 20, 5, 146 0x10, __BIT(2), 0x22, __BITS(6,0)), 147 AXP_CTRL2("dcdc4", 500, 1300, 10, 70, 20, 5, 148 0x10, __BIT(3), 0x23, __BITS(6,0)), 149 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 150 0x10, __BIT(4), 0x24, __BITS(6,0)), 151 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 152 0x10, __BIT(5), 0x25, __BITS(6,0)), 153 AXP_CTRL("aldo1", 700, 3300, 100, 154 0x13, __BIT(5), 0x28, __BITS(4,0)), 155 AXP_CTRL("aldo2", 700, 3300, 100, 156 0x13, __BIT(6), 0x29, __BITS(4,0)), 157 AXP_CTRL("aldo3", 700, 3300, 100, 158 0x13, __BIT(7), 0x2a, __BITS(4,0)), 159 }; 160 161 static const struct axppmic_ctrl axp805_ctrls[] = { 162 AXP_CTRL2("dcdca", 600, 1520, 10, 51, 20, 21, 163 0x10, __BIT(0), 0x12, __BITS(6,0)), 164 AXP_CTRL("dcdcb", 1000, 2550, 50, 165 0x10, __BIT(1), 0x13, __BITS(4,0)), 166 AXP_CTRL2("dcdcc", 600, 1520, 10, 51, 20, 21, 167 0x10, __BIT(2), 0x14, __BITS(6,0)), 168 AXP_CTRL2("dcdcd", 600, 3300, 20, 46, 100, 18, 169 0x10, __BIT(3), 0x15, __BITS(5,0)), 170 AXP_CTRL("dcdce", 1100, 3400, 100, 171 0x10, __BIT(4), 0x16, __BITS(4,0)), 172 AXP_CTRL("aldo1", 700, 3300, 100, 173 0x10, __BIT(5), 0x17, __BITS(4,0)), 174 AXP_CTRL("aldo2", 700, 3400, 100, 175 0x10, __BIT(6), 0x18, __BITS(4,0)), 176 AXP_CTRL("aldo3", 700, 3300, 100, 177 0x10, __BIT(7), 0x19, __BITS(4,0)), 178 AXP_CTRL("bldo1", 700, 1900, 100, 179 0x11, __BIT(0), 0x20, __BITS(3,0)), 180 AXP_CTRL("bldo2", 700, 1900, 100, 181 0x11, __BIT(1), 0x21, __BITS(3,0)), 182 AXP_CTRL("bldo3", 700, 1900, 100, 183 0x11, __BIT(2), 0x22, __BITS(3,0)), 184 AXP_CTRL("bldo4", 700, 1900, 100, 185 0x11, __BIT(3), 0x23, __BITS(3,0)), 186 AXP_CTRL("cldo1", 700, 3300, 100, 187 0x11, __BIT(4), 0x24, __BITS(4,0)), 188 AXP_CTRL2("cldo2", 700, 4200, 100, 28, 200, 4, 189 0x11, __BIT(5), 0x25, __BITS(4,0)), 190 AXP_CTRL("cldo3", 700, 3300, 100, 191 0x11, __BIT(6), 0x26, __BITS(4,0)), 192 }; 193 194 struct axppmic_irq { 195 u_int reg; 196 uint8_t mask; 197 }; 198 199 #define AXPPMIC_IRQ(_reg, _mask) \ 200 { .reg = (_reg), .mask = (_mask) } 201 202 struct axppmic_config { 203 const char *name; 204 const struct axppmic_ctrl *controls; 205 u_int ncontrols; 206 u_int irq_regs; 207 bool has_battery; 208 bool has_fuel_gauge; 209 struct axppmic_irq poklirq; 210 struct axppmic_irq acinirq; 211 struct axppmic_irq vbusirq; 212 struct axppmic_irq battirq; 213 struct axppmic_irq chargeirq; 214 struct axppmic_irq chargestirq; 215 u_int batsense_step; /* uV */ 216 u_int charge_step; /* uA */ 217 u_int discharge_step; /* uA */ 218 u_int maxcap_step; /* uAh */ 219 u_int coulomb_step; /* uAh */ 220 }; 221 222 enum axppmic_sensor { 223 AXP_SENSOR_ACIN_PRESENT, 224 AXP_SENSOR_VBUS_PRESENT, 225 AXP_SENSOR_BATT_PRESENT, 226 AXP_SENSOR_BATT_CHARGING, 227 AXP_SENSOR_BATT_CHARGE_STATE, 228 AXP_SENSOR_BATT_VOLTAGE, 229 AXP_SENSOR_BATT_CHARGE_CURRENT, 230 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 231 AXP_SENSOR_BATT_CAPACITY_PERCENT, 232 AXP_NSENSORS 233 }; 234 235 struct axppmic_softc { 236 device_t sc_dev; 237 i2c_tag_t sc_i2c; 238 i2c_addr_t sc_addr; 239 int sc_phandle; 240 241 const struct axppmic_config *sc_conf; 242 243 struct sysmon_pswitch sc_smpsw; 244 245 struct sysmon_envsys *sc_sme; 246 247 envsys_data_t sc_sensor[AXP_NSENSORS]; 248 249 u_int sc_warn_thres; 250 u_int sc_shut_thres; 251 }; 252 253 struct axpreg_softc { 254 device_t sc_dev; 255 i2c_tag_t sc_i2c; 256 i2c_addr_t sc_addr; 257 const struct axppmic_ctrl *sc_ctrl; 258 }; 259 260 struct axpreg_attach_args { 261 const struct axppmic_ctrl *reg_ctrl; 262 int reg_phandle; 263 i2c_tag_t reg_i2c; 264 i2c_addr_t reg_addr; 265 }; 266 267 static const struct axppmic_config axp803_config = { 268 .name = "AXP803", 269 .controls = axp803_ctrls, 270 .ncontrols = __arraycount(axp803_ctrls), 271 .irq_regs = 6, 272 .has_battery = true, 273 .has_fuel_gauge = true, 274 .batsense_step = 1100, 275 .charge_step = 1000, 276 .discharge_step = 1000, 277 .poklirq = AXPPMIC_IRQ(5, __BIT(3)), 278 .acinirq = AXPPMIC_IRQ(1, __BITS(6,5)), 279 .vbusirq = AXPPMIC_IRQ(1, __BITS(3,2)), 280 .battirq = AXPPMIC_IRQ(2, __BITS(7,6)), 281 .chargeirq = AXPPMIC_IRQ(2, __BITS(3,2)), 282 .chargestirq = AXPPMIC_IRQ(4, __BITS(1,0)), 283 }; 284 285 static const struct axppmic_config axp805_config = { 286 .name = "AXP805/806", 287 .controls = axp805_ctrls, 288 .ncontrols = __arraycount(axp805_ctrls), 289 .irq_regs = 2, 290 .poklirq = AXPPMIC_IRQ(2, __BIT(0)), 291 }; 292 293 static const struct of_compat_data compat_data[] = { 294 { "x-powers,axp803", (uintptr_t)&axp803_config }, 295 { "x-powers,axp805", (uintptr_t)&axp805_config }, 296 { "x-powers,axp806", (uintptr_t)&axp805_config }, 297 { NULL } 298 }; 299 300 static int 301 axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags) 302 { 303 return iic_smbus_read_byte(tag, addr, reg, val, flags); 304 } 305 306 static int 307 axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags) 308 { 309 return iic_smbus_write_byte(tag, addr, reg, val, flags); 310 } 311 312 static int 313 axppmic_set_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int min, u_int max) 314 { 315 const int flags = (cold ? I2C_F_POLL : 0); 316 u_int vol, reg_val; 317 int nstep, error; 318 uint8_t val; 319 320 if (!c->c_voltage_mask) 321 return EINVAL; 322 323 if (min < c->c_min || min > c->c_max) 324 return EINVAL; 325 326 reg_val = 0; 327 nstep = 1; 328 vol = c->c_min; 329 330 for (nstep = 0; nstep < c->c_step1cnt && vol < min; nstep++) { 331 ++reg_val; 332 vol += c->c_step1; 333 } 334 for (nstep = 0; nstep < c->c_step2cnt && vol < min; nstep++) { 335 ++reg_val; 336 vol += c->c_step2; 337 } 338 339 if (vol > max) 340 return EINVAL; 341 342 iic_acquire_bus(tag, flags); 343 if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags)) == 0) { 344 val &= ~c->c_voltage_mask; 345 val |= __SHIFTIN(reg_val, c->c_voltage_mask); 346 error = axppmic_write(tag, addr, c->c_voltage_reg, val, flags); 347 } 348 iic_release_bus(tag, flags); 349 350 return error; 351 } 352 353 static int 354 axppmic_get_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int *pvol) 355 { 356 const int flags = (cold ? I2C_F_POLL : 0); 357 int reg_val, error; 358 uint8_t val; 359 360 if (!c->c_voltage_mask) 361 return EINVAL; 362 363 iic_acquire_bus(tag, flags); 364 error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags); 365 iic_release_bus(tag, flags); 366 if (error) 367 return error; 368 369 reg_val = __SHIFTOUT(val, c->c_voltage_mask); 370 if (reg_val < c->c_step1cnt) { 371 *pvol = c->c_min + reg_val * c->c_step1; 372 } else { 373 *pvol = c->c_min + (c->c_step1cnt * c->c_step1) + 374 ((reg_val - c->c_step1cnt) * c->c_step2); 375 } 376 377 return 0; 378 } 379 380 static void 381 axppmic_power_poweroff(device_t dev) 382 { 383 struct axppmic_softc *sc = device_private(dev); 384 385 delay(1000000); 386 387 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 388 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_POWER_DISABLE_REG, AXP_POWER_DISABLE_CTRL, I2C_F_POLL); 389 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 390 } 391 392 static struct fdtbus_power_controller_func axppmic_power_funcs = { 393 .poweroff = axppmic_power_poweroff, 394 }; 395 396 static void 397 axppmic_task_shut(void *priv) 398 { 399 struct axppmic_softc *sc = priv; 400 401 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 402 } 403 404 static void 405 axppmic_sensor_update(struct sysmon_envsys *sme, envsys_data_t *e) 406 { 407 struct axppmic_softc *sc = sme->sme_cookie; 408 const struct axppmic_config *c = sc->sc_conf; 409 const int flags = I2C_F_POLL; 410 uint8_t val, lo, hi; 411 412 e->state = ENVSYS_SINVALID; 413 414 const bool battery_present = 415 sc->sc_sensor[AXP_SENSOR_BATT_PRESENT].state == ENVSYS_SVALID && 416 sc->sc_sensor[AXP_SENSOR_BATT_PRESENT].value_cur == 1; 417 418 switch (e->private) { 419 case AXP_SENSOR_ACIN_PRESENT: 420 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 421 e->state = ENVSYS_SVALID; 422 e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT); 423 } 424 break; 425 case AXP_SENSOR_VBUS_PRESENT: 426 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 427 e->state = ENVSYS_SVALID; 428 e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT); 429 } 430 break; 431 case AXP_SENSOR_BATT_PRESENT: 432 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 433 if (val & AXP_POWER_MODE_BATT_VALID) { 434 e->state = ENVSYS_SVALID; 435 e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT); 436 } 437 } 438 break; 439 case AXP_SENSOR_BATT_CHARGING: 440 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 441 e->state = ENVSYS_SVALID; 442 e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING); 443 } 444 break; 445 case AXP_SENSOR_BATT_CHARGE_STATE: 446 if (battery_present && 447 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 448 (val & AXP_BATT_CAP_VALID) != 0) { 449 const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 450 if (batt_val <= sc->sc_shut_thres) { 451 e->state = ENVSYS_SCRITICAL; 452 e->value_cur = ENVSYS_BATTERY_CAPACITY_CRITICAL; 453 } else if (batt_val <= sc->sc_warn_thres) { 454 e->state = ENVSYS_SWARNUNDER; 455 e->value_cur = ENVSYS_BATTERY_CAPACITY_WARNING; 456 } else { 457 e->state = ENVSYS_SVALID; 458 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 459 } 460 } 461 break; 462 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 463 if (battery_present && 464 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 465 (val & AXP_BATT_CAP_VALID) != 0) { 466 e->state = ENVSYS_SVALID; 467 e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 468 } 469 break; 470 case AXP_SENSOR_BATT_VOLTAGE: 471 if (battery_present && 472 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATSENSE_HI_REG, &hi, flags) == 0 && 473 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATSENSE_LO_REG, &lo, flags) == 0) { 474 e->state = ENVSYS_SVALID; 475 e->value_cur = AXP_ADC_RAW(hi, lo) * c->batsense_step; 476 } 477 break; 478 case AXP_SENSOR_BATT_CHARGE_CURRENT: 479 if (battery_present && 480 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0 && 481 (val & AXP_POWER_SOURCE_CHARGE_DIRECTION) != 0 && 482 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTCHG_HI_REG, &hi, flags) == 0 && 483 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTCHG_LO_REG, &lo, flags) == 0) { 484 e->state = ENVSYS_SVALID; 485 e->value_cur = AXP_ADC_RAW(hi, lo) * c->charge_step; 486 } 487 break; 488 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 489 if (battery_present && 490 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0 && 491 (val & AXP_POWER_SOURCE_CHARGE_DIRECTION) == 0 && 492 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTDISCHG_HI_REG, &hi, flags) == 0 && 493 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTDISCHG_LO_REG, &lo, flags) == 0) { 494 e->state = ENVSYS_SVALID; 495 e->value_cur = AXP_ADC_RAW(hi, lo) * c->discharge_step; 496 } 497 break; 498 } 499 } 500 501 static void 502 axppmic_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *e) 503 { 504 struct axppmic_softc *sc = sme->sme_cookie; 505 const int flags = I2C_F_POLL; 506 507 switch (e->private) { 508 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 509 case AXP_SENSOR_BATT_VOLTAGE: 510 case AXP_SENSOR_BATT_CHARGE_CURRENT: 511 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 512 /* Always update battery capacity and ADCs */ 513 iic_acquire_bus(sc->sc_i2c, flags); 514 axppmic_sensor_update(sme, e); 515 iic_release_bus(sc->sc_i2c, flags); 516 break; 517 default: 518 /* Refresh if the sensor is not in valid state */ 519 if (e->state != ENVSYS_SVALID) { 520 iic_acquire_bus(sc->sc_i2c, flags); 521 axppmic_sensor_update(sme, e); 522 iic_release_bus(sc->sc_i2c, flags); 523 } 524 break; 525 } 526 } 527 528 static int 529 axppmic_intr(void *priv) 530 { 531 struct axppmic_softc *sc = priv; 532 const struct axppmic_config *c = sc->sc_conf; 533 const int flags = I2C_F_POLL; 534 uint8_t stat; 535 u_int n; 536 537 iic_acquire_bus(sc->sc_i2c, flags); 538 for (n = 1; n <= c->irq_regs; n++) { 539 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(n), &stat, flags) == 0) { 540 if (n == c->poklirq.reg && (stat & c->poklirq.mask) != 0) 541 sysmon_task_queue_sched(0, axppmic_task_shut, sc); 542 if (n == c->acinirq.reg && (stat & c->acinirq.mask) != 0) 543 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]); 544 if (n == c->vbusirq.reg && (stat & c->vbusirq.mask) != 0) 545 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]); 546 if (n == c->battirq.reg && (stat & c->battirq.mask) != 0) 547 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]); 548 if (n == c->chargeirq.reg && (stat & c->chargeirq.mask) != 0) 549 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]); 550 if (n == c->chargestirq.reg && (stat & c->chargestirq.mask) != 0) 551 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]); 552 553 if (stat != 0) 554 axppmic_write(sc->sc_i2c, sc->sc_addr, 555 AXP_IRQ_STATUS_REG(n), stat, flags); 556 } 557 } 558 iic_release_bus(sc->sc_i2c, flags); 559 560 return 1; 561 } 562 563 static void 564 axppmic_attach_acadapter(struct axppmic_softc *sc) 565 { 566 envsys_data_t *e; 567 568 e = &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]; 569 e->private = AXP_SENSOR_ACIN_PRESENT; 570 e->units = ENVSYS_INDICATOR; 571 e->state = ENVSYS_SINVALID; 572 strlcpy(e->desc, "ACIN present", sizeof(e->desc)); 573 sysmon_envsys_sensor_attach(sc->sc_sme, e); 574 575 e = &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]; 576 e->private = AXP_SENSOR_VBUS_PRESENT; 577 e->units = ENVSYS_INDICATOR; 578 e->state = ENVSYS_SINVALID; 579 strlcpy(e->desc, "VBUS present", sizeof(e->desc)); 580 sysmon_envsys_sensor_attach(sc->sc_sme, e); 581 } 582 583 static void 584 axppmic_attach_battery(struct axppmic_softc *sc) 585 { 586 const struct axppmic_config *c = sc->sc_conf; 587 envsys_data_t *e; 588 uint8_t val; 589 590 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 591 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &val, I2C_F_POLL) == 0) { 592 sc->sc_warn_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV1) + 5; 593 sc->sc_shut_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV2); 594 } 595 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 596 597 e = &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]; 598 e->private = AXP_SENSOR_BATT_PRESENT; 599 e->units = ENVSYS_INDICATOR; 600 e->state = ENVSYS_SINVALID; 601 strlcpy(e->desc, "battery present", sizeof(e->desc)); 602 sysmon_envsys_sensor_attach(sc->sc_sme, e); 603 604 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]; 605 e->private = AXP_SENSOR_BATT_CHARGING; 606 e->units = ENVSYS_BATTERY_CHARGE; 607 e->state = ENVSYS_SINVALID; 608 strlcpy(e->desc, "charging", sizeof(e->desc)); 609 sysmon_envsys_sensor_attach(sc->sc_sme, e); 610 611 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]; 612 e->private = AXP_SENSOR_BATT_CHARGE_STATE; 613 e->units = ENVSYS_BATTERY_CAPACITY; 614 e->flags = ENVSYS_FMONSTCHANGED; 615 e->state = ENVSYS_SINVALID; 616 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 617 strlcpy(e->desc, "charge state", sizeof(e->desc)); 618 sysmon_envsys_sensor_attach(sc->sc_sme, e); 619 620 if (c->batsense_step) { 621 e = &sc->sc_sensor[AXP_SENSOR_BATT_VOLTAGE]; 622 e->private = AXP_SENSOR_BATT_VOLTAGE; 623 e->units = ENVSYS_SVOLTS_DC; 624 e->state = ENVSYS_SINVALID; 625 strlcpy(e->desc, "battery voltage", sizeof(e->desc)); 626 sysmon_envsys_sensor_attach(sc->sc_sme, e); 627 } 628 629 if (c->charge_step) { 630 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_CURRENT]; 631 e->private = AXP_SENSOR_BATT_CHARGE_CURRENT; 632 e->units = ENVSYS_SAMPS; 633 e->state = ENVSYS_SINVALID; 634 strlcpy(e->desc, "battery charge current", sizeof(e->desc)); 635 sysmon_envsys_sensor_attach(sc->sc_sme, e); 636 } 637 638 if (c->discharge_step) { 639 e = &sc->sc_sensor[AXP_SENSOR_BATT_DISCHARGE_CURRENT]; 640 e->private = AXP_SENSOR_BATT_DISCHARGE_CURRENT; 641 e->units = ENVSYS_SAMPS; 642 e->state = ENVSYS_SINVALID; 643 strlcpy(e->desc, "battery discharge current", sizeof(e->desc)); 644 sysmon_envsys_sensor_attach(sc->sc_sme, e); 645 } 646 647 if (c->has_fuel_gauge) { 648 e = &sc->sc_sensor[AXP_SENSOR_BATT_CAPACITY_PERCENT]; 649 e->private = AXP_SENSOR_BATT_CAPACITY_PERCENT; 650 e->units = ENVSYS_INTEGER; 651 e->state = ENVSYS_SINVALID; 652 e->flags = ENVSYS_FPERCENT; 653 strlcpy(e->desc, "battery percent", sizeof(e->desc)); 654 sysmon_envsys_sensor_attach(sc->sc_sme, e); 655 } 656 } 657 658 static void 659 axppmic_attach_sensors(struct axppmic_softc *sc) 660 { 661 if (sc->sc_conf->has_battery) { 662 sc->sc_sme = sysmon_envsys_create(); 663 sc->sc_sme->sme_name = device_xname(sc->sc_dev); 664 sc->sc_sme->sme_cookie = sc; 665 sc->sc_sme->sme_refresh = axppmic_sensor_refresh; 666 sc->sc_sme->sme_class = SME_CLASS_BATTERY; 667 sc->sc_sme->sme_flags = SME_INIT_REFRESH; 668 669 axppmic_attach_acadapter(sc); 670 axppmic_attach_battery(sc); 671 672 sysmon_envsys_register(sc->sc_sme); 673 } 674 } 675 676 677 static int 678 axppmic_match(device_t parent, cfdata_t match, void *aux) 679 { 680 struct i2c_attach_args *ia = aux; 681 682 /* XXXJRT Gross. */ 683 if (ia->ia_name != NULL) { 684 if (ia->ia_cookie) { 685 int match_result = 686 of_match_compat_data(ia->ia_cookie, compat_data); 687 if (match_result) { 688 match_result = match_result - 1 + 689 I2C_MATCH_DIRECT_COMPATIBLE; 690 match_result = MIN(match_result, 691 I2C_MATCH_DIRECT_COMPATIBLE_MAX); 692 } 693 return match_result; 694 } else 695 return 0; 696 } 697 698 /* This device is direct-config only. */ 699 700 return 0; 701 } 702 703 static void 704 axppmic_attach(device_t parent, device_t self, void *aux) 705 { 706 struct axppmic_softc *sc = device_private(self); 707 const struct axppmic_config *c; 708 struct axpreg_attach_args aaa; 709 struct i2c_attach_args *ia = aux; 710 int phandle, child, i; 711 uint32_t irq_mask; 712 void *ih; 713 714 c = (void *)of_search_compatible(ia->ia_cookie, compat_data)->data; 715 716 sc->sc_dev = self; 717 sc->sc_i2c = ia->ia_tag; 718 sc->sc_addr = ia->ia_addr; 719 sc->sc_phandle = ia->ia_cookie; 720 sc->sc_conf = c; 721 722 aprint_naive("\n"); 723 aprint_normal(": %s\n", c->name); 724 725 sc->sc_smpsw.smpsw_name = device_xname(self); 726 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_POWER; 727 sysmon_pswitch_register(&sc->sc_smpsw); 728 729 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 730 for (i = 1; i <= c->irq_regs; i++) { 731 irq_mask = 0; 732 if (i == c->poklirq.reg) 733 irq_mask |= c->poklirq.mask; 734 if (i == c->acinirq.reg) 735 irq_mask |= c->acinirq.mask; 736 if (i == c->vbusirq.reg) 737 irq_mask |= c->vbusirq.mask; 738 if (i == c->battirq.reg) 739 irq_mask |= c->battirq.mask; 740 if (i == c->chargeirq.reg) 741 irq_mask |= c->chargeirq.mask; 742 if (i == c->chargestirq.reg) 743 irq_mask |= c->chargestirq.mask; 744 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_ENABLE_REG(i), irq_mask, I2C_F_POLL); 745 } 746 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 747 748 ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, FDT_INTR_MPSAFE, 749 axppmic_intr, sc); 750 if (ih == NULL) { 751 aprint_error_dev(self, "WARNING: couldn't establish interrupt handler\n"); 752 } 753 754 fdtbus_register_power_controller(sc->sc_dev, sc->sc_phandle, 755 &axppmic_power_funcs); 756 757 phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators"); 758 if (phandle > 0) { 759 aaa.reg_i2c = sc->sc_i2c; 760 aaa.reg_addr = sc->sc_addr; 761 for (i = 0; i < c->ncontrols; i++) { 762 const struct axppmic_ctrl *ctrl = &c->controls[i]; 763 child = of_find_firstchild_byname(phandle, ctrl->c_name); 764 if (child <= 0) 765 continue; 766 aaa.reg_ctrl = ctrl; 767 aaa.reg_phandle = child; 768 config_found(sc->sc_dev, &aaa, NULL); 769 } 770 } 771 772 if (c->has_battery) 773 axppmic_attach_sensors(sc); 774 } 775 776 static int 777 axpreg_acquire(device_t dev) 778 { 779 return 0; 780 } 781 782 static void 783 axpreg_release(device_t dev) 784 { 785 } 786 787 static int 788 axpreg_enable(device_t dev, bool enable) 789 { 790 struct axpreg_softc *sc = device_private(dev); 791 const struct axppmic_ctrl *c = sc->sc_ctrl; 792 const int flags = (cold ? I2C_F_POLL : 0); 793 uint8_t val; 794 int error; 795 796 if (!c->c_enable_mask) 797 return EINVAL; 798 799 iic_acquire_bus(sc->sc_i2c, flags); 800 if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) { 801 if (enable) 802 val |= c->c_enable_mask; 803 else 804 val &= ~c->c_enable_mask; 805 error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags); 806 } 807 iic_release_bus(sc->sc_i2c, flags); 808 809 return error; 810 } 811 812 static int 813 axpreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol) 814 { 815 struct axpreg_softc *sc = device_private(dev); 816 const struct axppmic_ctrl *c = sc->sc_ctrl; 817 818 return axppmic_set_voltage(sc->sc_i2c, sc->sc_addr, c, 819 min_uvol / 1000, max_uvol / 1000); 820 } 821 822 static int 823 axpreg_get_voltage(device_t dev, u_int *puvol) 824 { 825 struct axpreg_softc *sc = device_private(dev); 826 const struct axppmic_ctrl *c = sc->sc_ctrl; 827 int error; 828 u_int vol; 829 830 error = axppmic_get_voltage(sc->sc_i2c, sc->sc_addr, c, &vol); 831 if (error) 832 return error; 833 834 *puvol = vol * 1000; 835 return 0; 836 } 837 838 static struct fdtbus_regulator_controller_func axpreg_funcs = { 839 .acquire = axpreg_acquire, 840 .release = axpreg_release, 841 .enable = axpreg_enable, 842 .set_voltage = axpreg_set_voltage, 843 .get_voltage = axpreg_get_voltage, 844 }; 845 846 static int 847 axpreg_match(device_t parent, cfdata_t match, void *aux) 848 { 849 return 1; 850 } 851 852 static void 853 axpreg_attach(device_t parent, device_t self, void *aux) 854 { 855 struct axpreg_softc *sc = device_private(self); 856 struct axpreg_attach_args *aaa = aux; 857 const int phandle = aaa->reg_phandle; 858 const char *name; 859 860 sc->sc_dev = self; 861 sc->sc_i2c = aaa->reg_i2c; 862 sc->sc_addr = aaa->reg_addr; 863 sc->sc_ctrl = aaa->reg_ctrl; 864 865 fdtbus_register_regulator_controller(self, phandle, 866 &axpreg_funcs); 867 868 aprint_naive("\n"); 869 name = fdtbus_get_string(phandle, "regulator-name"); 870 if (name) 871 aprint_normal(": %s\n", name); 872 else 873 aprint_normal("\n"); 874 } 875 876 CFATTACH_DECL_NEW(axppmic, sizeof(struct axppmic_softc), 877 axppmic_match, axppmic_attach, NULL, NULL); 878 879 CFATTACH_DECL_NEW(axpreg, sizeof(struct axpreg_softc), 880 axpreg_match, axpreg_attach, NULL, NULL); 881
Indexes created Tue Sep 23 14:10:03 GMT 2025