axppmic.c revision 1.19
1 /* $NetBSD: axppmic.c,v 1.19 2019/05/27 21:10:44 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2014-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: axppmic.c,v 1.19 2019/05/27 21:10:44 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 40 #include <dev/i2c/i2cvar.h> 41 42 #include <dev/sysmon/sysmonvar.h> 43 #include <dev/sysmon/sysmon_taskq.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #define AXP_POWER_SOURCE_REG 0x00 48 #define AXP_POWER_SOURCE_ACIN_PRESENT __BIT(7) 49 #define AXP_POWER_SOURCE_VBUS_PRESENT __BIT(5) 50 #define AXP_POWER_SOURCE_CHARGE_DIRECTION __BIT(2) 51 52 #define AXP_POWER_MODE_REG 0x01 53 #define AXP_POWER_MODE_BATT_VALID __BIT(4) 54 #define AXP_POWER_MODE_BATT_PRESENT __BIT(5) 55 #define AXP_POWER_MODE_BATT_CHARGING __BIT(6) 56 57 #define AXP_CHIP_ID_REG 0x03 58 59 #define AXP_POWER_DISABLE_REG 0x32 60 #define AXP_POWER_DISABLE_CTRL __BIT(7) 61 62 #define AXP_IRQ_ENABLE_REG(n) (0x40 + (n) - 1) 63 #define AXP_IRQ1_ACIN_RAISE __BIT(6) 64 #define AXP_IRQ1_ACIN_LOWER __BIT(5) 65 #define AXP_IRQ1_VBUS_RAISE __BIT(3) 66 #define AXP_IRQ1_VBUS_LOWER __BIT(2) 67 #define AXP_IRQ_STATUS_REG(n) (0x48 + (n) - 1) 68 69 #define AXP_BATSENSE_HI_REG 0x78 70 #define AXP_BATSENSE_LO_REG 0x79 71 72 #define AXP_BATTCHG_HI_REG 0x7a 73 #define AXP_BATTCHG_LO_REG 0x7b 74 75 #define AXP_BATTDISCHG_HI_REG 0x7c 76 #define AXP_BATTDISCHG_LO_REG 0x7d 77 78 #define AXP_ADC_RAW(_hi, _lo) \ 79 (((u_int)(_hi) << 4) | ((_lo) & 0xf)) 80 81 #define AXP_FUEL_GAUGE_CTRL_REG 0xb8 82 #define AXP_FUEL_GAUGE_CTRL_EN __BIT(7) 83 84 #define AXP_BATT_CAP_REG 0xb9 85 #define AXP_BATT_CAP_VALID __BIT(7) 86 #define AXP_BATT_CAP_PERCENT __BITS(6,0) 87 88 #define AXP_BATT_MAX_CAP_HI_REG 0xe0 89 #define AXP_BATT_MAX_CAP_VALID __BIT(7) 90 #define AXP_BATT_MAX_CAP_LO_REG 0xe1 91 92 #define AXP_BATT_COULOMB_HI_REG 0xe2 93 #define AXP_BATT_COULOMB_VALID __BIT(7) 94 #define AXP_BATT_COULOMB_LO_REG 0xe3 95 96 #define AXP_COULOMB_RAW(_hi, _lo) \ 97 (((u_int)(_hi & ~__BIT(7)) << 8) | (_lo)) 98 99 #define AXP_BATT_CAP_WARN_REG 0xe6 100 #define AXP_BATT_CAP_WARN_LV1 __BITS(7,4) 101 #define AXP_BATT_CAP_WARN_LV2 __BITS(3,0) 102 103 #define AXP_ADDR_EXT_REG 0xff /* AXP806 */ 104 #define AXP_ADDR_EXT_MASTER 0 105 #define AXP_ADDR_EXT_SLAVE __BIT(4) 106 107 struct axppmic_ctrl { 108 device_t c_dev; 109 110 const char * c_name; 111 u_int c_min; 112 u_int c_max; 113 u_int c_step1; 114 u_int c_step1cnt; 115 u_int c_step2; 116 u_int c_step2cnt; 117 118 uint8_t c_enable_reg; 119 uint8_t c_enable_mask; 120 121 uint8_t c_voltage_reg; 122 uint8_t c_voltage_mask; 123 }; 124 125 #define AXP_CTRL(name, min, max, step, ereg, emask, vreg, vmask) \ 126 { .c_name = (name), .c_min = (min), .c_max = (max), \ 127 .c_step1 = (step), .c_step1cnt = (((max) - (min)) / (step)) + 1, \ 128 .c_step2 = 0, .c_step2cnt = 0, \ 129 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 130 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 131 132 #define AXP_CTRL2(name, min, max, step1, step1cnt, step2, step2cnt, ereg, emask, vreg, vmask) \ 133 { .c_name = (name), .c_min = (min), .c_max = (max), \ 134 .c_step1 = (step1), .c_step1cnt = (step1cnt), \ 135 .c_step2 = (step2), .c_step2cnt = (step2cnt), \ 136 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 137 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 138 139 static const struct axppmic_ctrl axp803_ctrls[] = { 140 AXP_CTRL("dldo1", 700, 3300, 100, 141 0x12, __BIT(3), 0x15, __BITS(4,0)), 142 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 143 0x12, __BIT(4), 0x16, __BITS(4,0)), 144 AXP_CTRL("dldo3", 700, 3300, 100, 145 0x12, __BIT(5), 0x17, __BITS(4,0)), 146 AXP_CTRL("dldo4", 700, 3300, 100, 147 0x12, __BIT(6), 0x18, __BITS(4,0)), 148 AXP_CTRL("eldo1", 700, 1900, 50, 149 0x12, __BIT(0), 0x19, __BITS(4,0)), 150 AXP_CTRL("eldo2", 700, 1900, 50, 151 0x12, __BIT(1), 0x1a, __BITS(4,0)), 152 AXP_CTRL("eldo3", 700, 1900, 50, 153 0x12, __BIT(2), 0x1b, __BITS(4,0)), 154 AXP_CTRL("fldo1", 700, 1450, 50, 155 0x13, __BIT(2), 0x1c, __BITS(3,0)), 156 AXP_CTRL("fldo2", 700, 1450, 50, 157 0x13, __BIT(3), 0x1d, __BITS(3,0)), 158 AXP_CTRL("dcdc1", 1600, 3400, 100, 159 0x10, __BIT(0), 0x20, __BITS(4,0)), 160 AXP_CTRL2("dcdc2", 500, 1300, 10, 70, 20, 5, 161 0x10, __BIT(1), 0x21, __BITS(6,0)), 162 AXP_CTRL2("dcdc3", 500, 1300, 10, 70, 20, 5, 163 0x10, __BIT(2), 0x22, __BITS(6,0)), 164 AXP_CTRL2("dcdc4", 500, 1300, 10, 70, 20, 5, 165 0x10, __BIT(3), 0x23, __BITS(6,0)), 166 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 167 0x10, __BIT(4), 0x24, __BITS(6,0)), 168 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 169 0x10, __BIT(5), 0x25, __BITS(6,0)), 170 AXP_CTRL("aldo1", 700, 3300, 100, 171 0x13, __BIT(5), 0x28, __BITS(4,0)), 172 AXP_CTRL("aldo2", 700, 3300, 100, 173 0x13, __BIT(6), 0x29, __BITS(4,0)), 174 AXP_CTRL("aldo3", 700, 3300, 100, 175 0x13, __BIT(7), 0x2a, __BITS(4,0)), 176 }; 177 178 static const struct axppmic_ctrl axp805_ctrls[] = { 179 AXP_CTRL2("dcdca", 600, 1520, 10, 51, 20, 21, 180 0x10, __BIT(0), 0x12, __BITS(6,0)), 181 AXP_CTRL("dcdcb", 1000, 2550, 50, 182 0x10, __BIT(1), 0x13, __BITS(4,0)), 183 AXP_CTRL2("dcdcc", 600, 1520, 10, 51, 20, 21, 184 0x10, __BIT(2), 0x14, __BITS(6,0)), 185 AXP_CTRL2("dcdcd", 600, 3300, 20, 46, 100, 18, 186 0x10, __BIT(3), 0x15, __BITS(5,0)), 187 AXP_CTRL("dcdce", 1100, 3400, 100, 188 0x10, __BIT(4), 0x16, __BITS(4,0)), 189 AXP_CTRL("aldo1", 700, 3300, 100, 190 0x10, __BIT(5), 0x17, __BITS(4,0)), 191 AXP_CTRL("aldo2", 700, 3400, 100, 192 0x10, __BIT(6), 0x18, __BITS(4,0)), 193 AXP_CTRL("aldo3", 700, 3300, 100, 194 0x10, __BIT(7), 0x19, __BITS(4,0)), 195 AXP_CTRL("bldo1", 700, 1900, 100, 196 0x11, __BIT(0), 0x20, __BITS(3,0)), 197 AXP_CTRL("bldo2", 700, 1900, 100, 198 0x11, __BIT(1), 0x21, __BITS(3,0)), 199 AXP_CTRL("bldo3", 700, 1900, 100, 200 0x11, __BIT(2), 0x22, __BITS(3,0)), 201 AXP_CTRL("bldo4", 700, 1900, 100, 202 0x11, __BIT(3), 0x23, __BITS(3,0)), 203 AXP_CTRL("cldo1", 700, 3300, 100, 204 0x11, __BIT(4), 0x24, __BITS(4,0)), 205 AXP_CTRL2("cldo2", 700, 4200, 100, 28, 200, 4, 206 0x11, __BIT(5), 0x25, __BITS(4,0)), 207 AXP_CTRL("cldo3", 700, 3300, 100, 208 0x11, __BIT(6), 0x26, __BITS(4,0)), 209 }; 210 211 static const struct axppmic_ctrl axp813_ctrls[] = { 212 AXP_CTRL("dldo1", 700, 3300, 100, 213 0x12, __BIT(3), 0x15, __BITS(4,0)), 214 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 215 0x12, __BIT(4), 0x16, __BITS(4,0)), 216 AXP_CTRL("dldo3", 700, 3300, 100, 217 0x12, __BIT(5), 0x17, __BITS(4,0)), 218 AXP_CTRL("dldo4", 700, 3300, 100, 219 0x12, __BIT(6), 0x18, __BITS(4,0)), 220 AXP_CTRL("eldo1", 700, 1900, 50, 221 0x12, __BIT(0), 0x19, __BITS(4,0)), 222 AXP_CTRL("eldo2", 700, 1900, 50, 223 0x12, __BIT(1), 0x1a, __BITS(4,0)), 224 AXP_CTRL("eldo3", 700, 1900, 50, 225 0x12, __BIT(2), 0x1b, __BITS(4,0)), 226 AXP_CTRL("fldo1", 700, 1450, 50, 227 0x13, __BIT(2), 0x1c, __BITS(3,0)), 228 AXP_CTRL("fldo2", 700, 1450, 50, 229 0x13, __BIT(3), 0x1d, __BITS(3,0)), 230 AXP_CTRL("dcdc1", 1600, 3400, 100, 231 0x10, __BIT(0), 0x20, __BITS(4,0)), 232 AXP_CTRL2("dcdc2", 500, 1300, 10, 70, 20, 5, 233 0x10, __BIT(1), 0x21, __BITS(6,0)), 234 AXP_CTRL2("dcdc3", 500, 1300, 10, 70, 20, 5, 235 0x10, __BIT(2), 0x22, __BITS(6,0)), 236 AXP_CTRL2("dcdc4", 500, 1300, 10, 70, 20, 5, 237 0x10, __BIT(3), 0x23, __BITS(6,0)), 238 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 239 0x10, __BIT(4), 0x24, __BITS(6,0)), 240 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 241 0x10, __BIT(5), 0x25, __BITS(6,0)), 242 AXP_CTRL2("dcdc7", 600, 1520, 10, 51, 20, 21, 243 0x10, __BIT(6), 0x26, __BITS(6,0)), 244 AXP_CTRL("aldo1", 700, 3300, 100, 245 0x13, __BIT(5), 0x28, __BITS(4,0)), 246 AXP_CTRL("aldo2", 700, 3300, 100, 247 0x13, __BIT(6), 0x29, __BITS(4,0)), 248 AXP_CTRL("aldo3", 700, 3300, 100, 249 0x13, __BIT(7), 0x2a, __BITS(4,0)), 250 }; 251 252 struct axppmic_irq { 253 u_int reg; 254 uint8_t mask; 255 }; 256 257 #define AXPPMIC_IRQ(_reg, _mask) \ 258 { .reg = (_reg), .mask = (_mask) } 259 260 struct axppmic_config { 261 const char *name; 262 const struct axppmic_ctrl *controls; 263 u_int ncontrols; 264 u_int irq_regs; 265 bool has_battery; 266 bool has_fuel_gauge; 267 bool has_mode_set; 268 struct axppmic_irq poklirq; 269 struct axppmic_irq acinirq; 270 struct axppmic_irq vbusirq; 271 struct axppmic_irq battirq; 272 struct axppmic_irq chargeirq; 273 struct axppmic_irq chargestirq; 274 u_int batsense_step; /* uV */ 275 u_int charge_step; /* uA */ 276 u_int discharge_step; /* uA */ 277 u_int maxcap_step; /* uAh */ 278 u_int coulomb_step; /* uAh */ 279 }; 280 281 enum axppmic_sensor { 282 AXP_SENSOR_ACIN_PRESENT, 283 AXP_SENSOR_VBUS_PRESENT, 284 AXP_SENSOR_BATT_PRESENT, 285 AXP_SENSOR_BATT_CHARGING, 286 AXP_SENSOR_BATT_CHARGE_STATE, 287 AXP_SENSOR_BATT_VOLTAGE, 288 AXP_SENSOR_BATT_CHARGE_CURRENT, 289 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 290 AXP_SENSOR_BATT_CAPACITY_PERCENT, 291 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 292 AXP_SENSOR_BATT_CURRENT_CAPACITY, 293 AXP_NSENSORS 294 }; 295 296 struct axppmic_softc { 297 device_t sc_dev; 298 i2c_tag_t sc_i2c; 299 i2c_addr_t sc_addr; 300 int sc_phandle; 301 302 const struct axppmic_config *sc_conf; 303 304 struct sysmon_pswitch sc_smpsw; 305 306 struct sysmon_envsys *sc_sme; 307 308 envsys_data_t sc_sensor[AXP_NSENSORS]; 309 310 u_int sc_warn_thres; 311 u_int sc_shut_thres; 312 }; 313 314 struct axpreg_softc { 315 device_t sc_dev; 316 i2c_tag_t sc_i2c; 317 i2c_addr_t sc_addr; 318 const struct axppmic_ctrl *sc_ctrl; 319 }; 320 321 struct axpreg_attach_args { 322 const struct axppmic_ctrl *reg_ctrl; 323 int reg_phandle; 324 i2c_tag_t reg_i2c; 325 i2c_addr_t reg_addr; 326 }; 327 328 static const struct axppmic_config axp803_config = { 329 .name = "AXP803", 330 .controls = axp803_ctrls, 331 .ncontrols = __arraycount(axp803_ctrls), 332 .irq_regs = 6, 333 .has_battery = true, 334 .has_fuel_gauge = true, 335 .batsense_step = 1100, 336 .charge_step = 1000, 337 .discharge_step = 1000, 338 .maxcap_step = 1456, 339 .coulomb_step = 1456, 340 .poklirq = AXPPMIC_IRQ(5, __BIT(3)), 341 .acinirq = AXPPMIC_IRQ(1, __BITS(6,5)), 342 .vbusirq = AXPPMIC_IRQ(1, __BITS(3,2)), 343 .battirq = AXPPMIC_IRQ(2, __BITS(7,6)), 344 .chargeirq = AXPPMIC_IRQ(2, __BITS(3,2)), 345 .chargestirq = AXPPMIC_IRQ(4, __BITS(1,0)), 346 }; 347 348 static const struct axppmic_config axp805_config = { 349 .name = "AXP805", 350 .controls = axp805_ctrls, 351 .ncontrols = __arraycount(axp805_ctrls), 352 .irq_regs = 2, 353 .poklirq = AXPPMIC_IRQ(2, __BIT(0)), 354 }; 355 356 static const struct axppmic_config axp806_config = { 357 .name = "AXP806", 358 .controls = axp805_ctrls, 359 .ncontrols = __arraycount(axp805_ctrls), 360 #if notyet 361 .irq_regs = 2, 362 .poklirq = AXPPMIC_IRQ(2, __BIT(0)), 363 #endif 364 .has_mode_set = true, 365 }; 366 367 static const struct axppmic_config axp813_config = { 368 .name = "AXP813", 369 .controls = axp813_ctrls, 370 .ncontrols = __arraycount(axp813_ctrls), 371 .irq_regs = 6, 372 .has_battery = true, 373 .has_fuel_gauge = true, 374 .batsense_step = 1100, 375 .charge_step = 1000, 376 .discharge_step = 1000, 377 .maxcap_step = 1456, 378 .coulomb_step = 1456, 379 .poklirq = AXPPMIC_IRQ(5, __BIT(3)), 380 .acinirq = AXPPMIC_IRQ(1, __BITS(6,5)), 381 .vbusirq = AXPPMIC_IRQ(1, __BITS(3,2)), 382 .battirq = AXPPMIC_IRQ(2, __BITS(7,6)), 383 .chargeirq = AXPPMIC_IRQ(2, __BITS(3,2)), 384 .chargestirq = AXPPMIC_IRQ(4, __BITS(1,0)), 385 }; 386 387 static const struct device_compatible_entry compat_data[] = { 388 { "x-powers,axp803", (uintptr_t)&axp803_config }, 389 { "x-powers,axp805", (uintptr_t)&axp805_config }, 390 { "x-powers,axp806", (uintptr_t)&axp806_config }, 391 { "x-powers,axp813", (uintptr_t)&axp813_config }, 392 { NULL, 0 } 393 }; 394 395 static int 396 axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags) 397 { 398 return iic_smbus_read_byte(tag, addr, reg, val, flags); 399 } 400 401 static int 402 axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags) 403 { 404 return iic_smbus_write_byte(tag, addr, reg, val, flags); 405 } 406 407 static int 408 axppmic_set_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int min, u_int max) 409 { 410 const int flags = (cold ? I2C_F_POLL : 0); 411 u_int vol, reg_val; 412 int nstep, error; 413 uint8_t val; 414 415 if (!c->c_voltage_mask) 416 return EINVAL; 417 418 if (min < c->c_min || min > c->c_max) 419 return EINVAL; 420 421 reg_val = 0; 422 nstep = 1; 423 vol = c->c_min; 424 425 for (nstep = 0; nstep < c->c_step1cnt && vol < min; nstep++) { 426 ++reg_val; 427 vol += c->c_step1; 428 } 429 for (nstep = 0; nstep < c->c_step2cnt && vol < min; nstep++) { 430 ++reg_val; 431 vol += c->c_step2; 432 } 433 434 if (vol > max) 435 return EINVAL; 436 437 iic_acquire_bus(tag, flags); 438 if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags)) == 0) { 439 val &= ~c->c_voltage_mask; 440 val |= __SHIFTIN(reg_val, c->c_voltage_mask); 441 error = axppmic_write(tag, addr, c->c_voltage_reg, val, flags); 442 } 443 iic_release_bus(tag, flags); 444 445 return error; 446 } 447 448 static int 449 axppmic_get_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int *pvol) 450 { 451 const int flags = (cold ? I2C_F_POLL : 0); 452 int reg_val, error; 453 uint8_t val; 454 455 if (!c->c_voltage_mask) 456 return EINVAL; 457 458 iic_acquire_bus(tag, flags); 459 error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags); 460 iic_release_bus(tag, flags); 461 if (error) 462 return error; 463 464 reg_val = __SHIFTOUT(val, c->c_voltage_mask); 465 if (reg_val < c->c_step1cnt) { 466 *pvol = c->c_min + reg_val * c->c_step1; 467 } else { 468 *pvol = c->c_min + (c->c_step1cnt * c->c_step1) + 469 ((reg_val - c->c_step1cnt) * c->c_step2); 470 } 471 472 return 0; 473 } 474 475 static void 476 axppmic_power_poweroff(device_t dev) 477 { 478 struct axppmic_softc *sc = device_private(dev); 479 480 delay(1000000); 481 482 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 483 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_POWER_DISABLE_REG, AXP_POWER_DISABLE_CTRL, I2C_F_POLL); 484 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 485 } 486 487 static struct fdtbus_power_controller_func axppmic_power_funcs = { 488 .poweroff = axppmic_power_poweroff, 489 }; 490 491 static void 492 axppmic_task_shut(void *priv) 493 { 494 struct axppmic_softc *sc = priv; 495 496 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 497 } 498 499 static void 500 axppmic_sensor_update(struct sysmon_envsys *sme, envsys_data_t *e) 501 { 502 struct axppmic_softc *sc = sme->sme_cookie; 503 const struct axppmic_config *c = sc->sc_conf; 504 const int flags = I2C_F_POLL; 505 uint8_t val, lo, hi; 506 507 e->state = ENVSYS_SINVALID; 508 509 const bool battery_present = 510 sc->sc_sensor[AXP_SENSOR_BATT_PRESENT].state == ENVSYS_SVALID && 511 sc->sc_sensor[AXP_SENSOR_BATT_PRESENT].value_cur == 1; 512 513 switch (e->private) { 514 case AXP_SENSOR_ACIN_PRESENT: 515 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 516 e->state = ENVSYS_SVALID; 517 e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT); 518 } 519 break; 520 case AXP_SENSOR_VBUS_PRESENT: 521 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 522 e->state = ENVSYS_SVALID; 523 e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT); 524 } 525 break; 526 case AXP_SENSOR_BATT_PRESENT: 527 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 528 if (val & AXP_POWER_MODE_BATT_VALID) { 529 e->state = ENVSYS_SVALID; 530 e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT); 531 } 532 } 533 break; 534 case AXP_SENSOR_BATT_CHARGING: 535 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 536 e->state = ENVSYS_SVALID; 537 e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING); 538 } 539 break; 540 case AXP_SENSOR_BATT_CHARGE_STATE: 541 if (battery_present && 542 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 543 (val & AXP_BATT_CAP_VALID) != 0) { 544 const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 545 if (batt_val <= sc->sc_shut_thres) { 546 e->state = ENVSYS_SCRITICAL; 547 e->value_cur = ENVSYS_BATTERY_CAPACITY_CRITICAL; 548 } else if (batt_val <= sc->sc_warn_thres) { 549 e->state = ENVSYS_SWARNUNDER; 550 e->value_cur = ENVSYS_BATTERY_CAPACITY_WARNING; 551 } else { 552 e->state = ENVSYS_SVALID; 553 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 554 } 555 } 556 break; 557 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 558 if (battery_present && 559 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 560 (val & AXP_BATT_CAP_VALID) != 0) { 561 e->state = ENVSYS_SVALID; 562 e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 563 } 564 break; 565 case AXP_SENSOR_BATT_VOLTAGE: 566 if (battery_present && 567 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATSENSE_HI_REG, &hi, flags) == 0 && 568 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATSENSE_LO_REG, &lo, flags) == 0) { 569 e->state = ENVSYS_SVALID; 570 e->value_cur = AXP_ADC_RAW(hi, lo) * c->batsense_step; 571 } 572 break; 573 case AXP_SENSOR_BATT_CHARGE_CURRENT: 574 if (battery_present && 575 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0 && 576 (val & AXP_POWER_SOURCE_CHARGE_DIRECTION) != 0 && 577 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTCHG_HI_REG, &hi, flags) == 0 && 578 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTCHG_LO_REG, &lo, flags) == 0) { 579 e->state = ENVSYS_SVALID; 580 e->value_cur = AXP_ADC_RAW(hi, lo) * c->charge_step; 581 } 582 break; 583 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 584 if (battery_present && 585 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0 && 586 (val & AXP_POWER_SOURCE_CHARGE_DIRECTION) == 0 && 587 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTDISCHG_HI_REG, &hi, flags) == 0 && 588 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTDISCHG_LO_REG, &lo, flags) == 0) { 589 e->state = ENVSYS_SVALID; 590 e->value_cur = AXP_ADC_RAW(hi, lo) * c->discharge_step; 591 } 592 break; 593 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 594 if (battery_present && 595 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_MAX_CAP_HI_REG, &hi, flags) == 0 && 596 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_MAX_CAP_LO_REG, &lo, flags) == 0) { 597 e->state = (hi & AXP_BATT_MAX_CAP_VALID) ? ENVSYS_SVALID : ENVSYS_SINVALID; 598 e->value_cur = AXP_COULOMB_RAW(hi, lo) * c->maxcap_step; 599 } 600 break; 601 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 602 if (battery_present && 603 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_COULOMB_HI_REG, &hi, flags) == 0 && 604 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_COULOMB_LO_REG, &lo, flags) == 0) { 605 e->state = (hi & AXP_BATT_COULOMB_VALID) ? ENVSYS_SVALID : ENVSYS_SINVALID; 606 e->value_cur = AXP_COULOMB_RAW(hi, lo) * c->coulomb_step; 607 } 608 break; 609 } 610 } 611 612 static void 613 axppmic_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *e) 614 { 615 struct axppmic_softc *sc = sme->sme_cookie; 616 const int flags = I2C_F_POLL; 617 618 switch (e->private) { 619 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 620 case AXP_SENSOR_BATT_VOLTAGE: 621 case AXP_SENSOR_BATT_CHARGE_CURRENT: 622 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 623 /* Always update battery capacity and ADCs */ 624 iic_acquire_bus(sc->sc_i2c, flags); 625 axppmic_sensor_update(sme, e); 626 iic_release_bus(sc->sc_i2c, flags); 627 break; 628 default: 629 /* Refresh if the sensor is not in valid state */ 630 if (e->state != ENVSYS_SVALID) { 631 iic_acquire_bus(sc->sc_i2c, flags); 632 axppmic_sensor_update(sme, e); 633 iic_release_bus(sc->sc_i2c, flags); 634 } 635 break; 636 } 637 } 638 639 static int 640 axppmic_intr(void *priv) 641 { 642 struct axppmic_softc *sc = priv; 643 const struct axppmic_config *c = sc->sc_conf; 644 const int flags = I2C_F_POLL; 645 uint8_t stat; 646 u_int n; 647 648 iic_acquire_bus(sc->sc_i2c, flags); 649 for (n = 1; n <= c->irq_regs; n++) { 650 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(n), &stat, flags) == 0) { 651 if (n == c->poklirq.reg && (stat & c->poklirq.mask) != 0) 652 sysmon_task_queue_sched(0, axppmic_task_shut, sc); 653 if (n == c->acinirq.reg && (stat & c->acinirq.mask) != 0) 654 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]); 655 if (n == c->vbusirq.reg && (stat & c->vbusirq.mask) != 0) 656 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]); 657 if (n == c->battirq.reg && (stat & c->battirq.mask) != 0) 658 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]); 659 if (n == c->chargeirq.reg && (stat & c->chargeirq.mask) != 0) 660 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]); 661 if (n == c->chargestirq.reg && (stat & c->chargestirq.mask) != 0) 662 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]); 663 664 if (stat != 0) 665 axppmic_write(sc->sc_i2c, sc->sc_addr, 666 AXP_IRQ_STATUS_REG(n), stat, flags); 667 } 668 } 669 iic_release_bus(sc->sc_i2c, flags); 670 671 return 1; 672 } 673 674 static void 675 axppmic_attach_acadapter(struct axppmic_softc *sc) 676 { 677 envsys_data_t *e; 678 679 e = &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]; 680 e->private = AXP_SENSOR_ACIN_PRESENT; 681 e->units = ENVSYS_INDICATOR; 682 e->state = ENVSYS_SINVALID; 683 strlcpy(e->desc, "ACIN present", sizeof(e->desc)); 684 sysmon_envsys_sensor_attach(sc->sc_sme, e); 685 686 e = &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]; 687 e->private = AXP_SENSOR_VBUS_PRESENT; 688 e->units = ENVSYS_INDICATOR; 689 e->state = ENVSYS_SINVALID; 690 strlcpy(e->desc, "VBUS present", sizeof(e->desc)); 691 sysmon_envsys_sensor_attach(sc->sc_sme, e); 692 } 693 694 static void 695 axppmic_attach_battery(struct axppmic_softc *sc) 696 { 697 const struct axppmic_config *c = sc->sc_conf; 698 envsys_data_t *e; 699 uint8_t val; 700 701 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 702 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &val, I2C_F_POLL) == 0) { 703 sc->sc_warn_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV1) + 5; 704 sc->sc_shut_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV2); 705 } 706 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 707 708 e = &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]; 709 e->private = AXP_SENSOR_BATT_PRESENT; 710 e->units = ENVSYS_INDICATOR; 711 e->state = ENVSYS_SINVALID; 712 strlcpy(e->desc, "battery present", sizeof(e->desc)); 713 sysmon_envsys_sensor_attach(sc->sc_sme, e); 714 715 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]; 716 e->private = AXP_SENSOR_BATT_CHARGING; 717 e->units = ENVSYS_BATTERY_CHARGE; 718 e->state = ENVSYS_SINVALID; 719 strlcpy(e->desc, "charging", sizeof(e->desc)); 720 sysmon_envsys_sensor_attach(sc->sc_sme, e); 721 722 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]; 723 e->private = AXP_SENSOR_BATT_CHARGE_STATE; 724 e->units = ENVSYS_BATTERY_CAPACITY; 725 e->flags = ENVSYS_FMONSTCHANGED; 726 e->state = ENVSYS_SINVALID; 727 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 728 strlcpy(e->desc, "charge state", sizeof(e->desc)); 729 sysmon_envsys_sensor_attach(sc->sc_sme, e); 730 731 if (c->batsense_step) { 732 e = &sc->sc_sensor[AXP_SENSOR_BATT_VOLTAGE]; 733 e->private = AXP_SENSOR_BATT_VOLTAGE; 734 e->units = ENVSYS_SVOLTS_DC; 735 e->state = ENVSYS_SINVALID; 736 strlcpy(e->desc, "battery voltage", sizeof(e->desc)); 737 sysmon_envsys_sensor_attach(sc->sc_sme, e); 738 } 739 740 if (c->charge_step) { 741 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_CURRENT]; 742 e->private = AXP_SENSOR_BATT_CHARGE_CURRENT; 743 e->units = ENVSYS_SAMPS; 744 e->state = ENVSYS_SINVALID; 745 strlcpy(e->desc, "battery charge current", sizeof(e->desc)); 746 sysmon_envsys_sensor_attach(sc->sc_sme, e); 747 } 748 749 if (c->discharge_step) { 750 e = &sc->sc_sensor[AXP_SENSOR_BATT_DISCHARGE_CURRENT]; 751 e->private = AXP_SENSOR_BATT_DISCHARGE_CURRENT; 752 e->units = ENVSYS_SAMPS; 753 e->state = ENVSYS_SINVALID; 754 strlcpy(e->desc, "battery discharge current", sizeof(e->desc)); 755 sysmon_envsys_sensor_attach(sc->sc_sme, e); 756 } 757 758 if (c->has_fuel_gauge) { 759 e = &sc->sc_sensor[AXP_SENSOR_BATT_CAPACITY_PERCENT]; 760 e->private = AXP_SENSOR_BATT_CAPACITY_PERCENT; 761 e->units = ENVSYS_INTEGER; 762 e->state = ENVSYS_SINVALID; 763 e->flags = ENVSYS_FPERCENT; 764 strlcpy(e->desc, "battery percent", sizeof(e->desc)); 765 sysmon_envsys_sensor_attach(sc->sc_sme, e); 766 } 767 768 if (c->maxcap_step) { 769 e = &sc->sc_sensor[AXP_SENSOR_BATT_MAXIMUM_CAPACITY]; 770 e->private = AXP_SENSOR_BATT_MAXIMUM_CAPACITY; 771 e->units = ENVSYS_SAMPHOUR; 772 e->state = ENVSYS_SINVALID; 773 strlcpy(e->desc, "battery maximum capacity", sizeof(e->desc)); 774 sysmon_envsys_sensor_attach(sc->sc_sme, e); 775 } 776 777 if (c->coulomb_step) { 778 e = &sc->sc_sensor[AXP_SENSOR_BATT_CURRENT_CAPACITY]; 779 e->private = AXP_SENSOR_BATT_CURRENT_CAPACITY; 780 e->units = ENVSYS_SAMPHOUR; 781 e->state = ENVSYS_SINVALID; 782 strlcpy(e->desc, "battery current capacity", sizeof(e->desc)); 783 sysmon_envsys_sensor_attach(sc->sc_sme, e); 784 } 785 } 786 787 static void 788 axppmic_attach_sensors(struct axppmic_softc *sc) 789 { 790 if (sc->sc_conf->has_battery) { 791 sc->sc_sme = sysmon_envsys_create(); 792 sc->sc_sme->sme_name = device_xname(sc->sc_dev); 793 sc->sc_sme->sme_cookie = sc; 794 sc->sc_sme->sme_refresh = axppmic_sensor_refresh; 795 sc->sc_sme->sme_class = SME_CLASS_BATTERY; 796 sc->sc_sme->sme_flags = SME_INIT_REFRESH; 797 798 axppmic_attach_acadapter(sc); 799 axppmic_attach_battery(sc); 800 801 sysmon_envsys_register(sc->sc_sme); 802 } 803 } 804 805 806 static int 807 axppmic_match(device_t parent, cfdata_t match, void *aux) 808 { 809 struct i2c_attach_args *ia = aux; 810 int match_result; 811 812 if (iic_use_direct_match(ia, match, compat_data, &match_result)) 813 return match_result; 814 815 /* This device is direct-config only. */ 816 817 return 0; 818 } 819 820 static void 821 axppmic_attach(device_t parent, device_t self, void *aux) 822 { 823 struct axppmic_softc *sc = device_private(self); 824 const struct device_compatible_entry *dce = NULL; 825 const struct axppmic_config *c; 826 struct axpreg_attach_args aaa; 827 struct i2c_attach_args *ia = aux; 828 int phandle, child, i; 829 uint8_t irq_mask, val; 830 int error; 831 void *ih; 832 833 (void) iic_compatible_match(ia, compat_data, &dce); 834 KASSERT(dce != NULL); 835 c = (void *)dce->data; 836 837 sc->sc_dev = self; 838 sc->sc_i2c = ia->ia_tag; 839 sc->sc_addr = ia->ia_addr; 840 sc->sc_phandle = ia->ia_cookie; 841 sc->sc_conf = c; 842 843 aprint_naive("\n"); 844 aprint_normal(": %s\n", c->name); 845 846 if (c->has_mode_set) { 847 const bool master_mode = of_hasprop(sc->sc_phandle, "x-powers,self-working-mode") || 848 of_hasprop(sc->sc_phandle, "x-powers,master-mode"); 849 850 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 851 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_ADDR_EXT_REG, 852 master_mode ? AXP_ADDR_EXT_MASTER : AXP_ADDR_EXT_SLAVE, I2C_F_POLL); 853 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 854 } 855 856 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 857 error = axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_CHIP_ID_REG, &val, I2C_F_POLL); 858 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 859 if (error != 0) { 860 aprint_error_dev(self, "couldn't read chipid\n"); 861 return; 862 } 863 aprint_debug_dev(self, "chipid %#x\n", val); 864 865 sc->sc_smpsw.smpsw_name = device_xname(self); 866 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_POWER; 867 sysmon_pswitch_register(&sc->sc_smpsw); 868 869 if (c->irq_regs > 0) { 870 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 871 for (i = 1; i <= c->irq_regs; i++) { 872 irq_mask = 0; 873 if (i == c->poklirq.reg) 874 irq_mask |= c->poklirq.mask; 875 if (i == c->acinirq.reg) 876 irq_mask |= c->acinirq.mask; 877 if (i == c->vbusirq.reg) 878 irq_mask |= c->vbusirq.mask; 879 if (i == c->battirq.reg) 880 irq_mask |= c->battirq.mask; 881 if (i == c->chargeirq.reg) 882 irq_mask |= c->chargeirq.mask; 883 if (i == c->chargestirq.reg) 884 irq_mask |= c->chargestirq.mask; 885 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_ENABLE_REG(i), irq_mask, I2C_F_POLL); 886 } 887 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 888 889 ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, FDT_INTR_MPSAFE, 890 axppmic_intr, sc); 891 if (ih == NULL) { 892 aprint_error_dev(self, "WARNING: couldn't establish interrupt handler\n"); 893 } 894 } 895 896 fdtbus_register_power_controller(sc->sc_dev, sc->sc_phandle, 897 &axppmic_power_funcs); 898 899 phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators"); 900 if (phandle > 0) { 901 aaa.reg_i2c = sc->sc_i2c; 902 aaa.reg_addr = sc->sc_addr; 903 for (i = 0; i < c->ncontrols; i++) { 904 const struct axppmic_ctrl *ctrl = &c->controls[i]; 905 child = of_find_firstchild_byname(phandle, ctrl->c_name); 906 if (child <= 0) 907 continue; 908 aaa.reg_ctrl = ctrl; 909 aaa.reg_phandle = child; 910 config_found(sc->sc_dev, &aaa, NULL); 911 } 912 } 913 914 if (c->has_battery) 915 axppmic_attach_sensors(sc); 916 } 917 918 static int 919 axpreg_acquire(device_t dev) 920 { 921 return 0; 922 } 923 924 static void 925 axpreg_release(device_t dev) 926 { 927 } 928 929 static int 930 axpreg_enable(device_t dev, bool enable) 931 { 932 struct axpreg_softc *sc = device_private(dev); 933 const struct axppmic_ctrl *c = sc->sc_ctrl; 934 const int flags = (cold ? I2C_F_POLL : 0); 935 uint8_t val; 936 int error; 937 938 if (!c->c_enable_mask) 939 return EINVAL; 940 941 iic_acquire_bus(sc->sc_i2c, flags); 942 if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) { 943 if (enable) 944 val |= c->c_enable_mask; 945 else 946 val &= ~c->c_enable_mask; 947 error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags); 948 } 949 iic_release_bus(sc->sc_i2c, flags); 950 951 return error; 952 } 953 954 static int 955 axpreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol) 956 { 957 struct axpreg_softc *sc = device_private(dev); 958 const struct axppmic_ctrl *c = sc->sc_ctrl; 959 960 return axppmic_set_voltage(sc->sc_i2c, sc->sc_addr, c, 961 min_uvol / 1000, max_uvol / 1000); 962 } 963 964 static int 965 axpreg_get_voltage(device_t dev, u_int *puvol) 966 { 967 struct axpreg_softc *sc = device_private(dev); 968 const struct axppmic_ctrl *c = sc->sc_ctrl; 969 int error; 970 u_int vol; 971 972 error = axppmic_get_voltage(sc->sc_i2c, sc->sc_addr, c, &vol); 973 if (error) 974 return error; 975 976 *puvol = vol * 1000; 977 return 0; 978 } 979 980 static struct fdtbus_regulator_controller_func axpreg_funcs = { 981 .acquire = axpreg_acquire, 982 .release = axpreg_release, 983 .enable = axpreg_enable, 984 .set_voltage = axpreg_set_voltage, 985 .get_voltage = axpreg_get_voltage, 986 }; 987 988 static int 989 axpreg_match(device_t parent, cfdata_t match, void *aux) 990 { 991 return 1; 992 } 993 994 static void 995 axpreg_attach(device_t parent, device_t self, void *aux) 996 { 997 struct axpreg_softc *sc = device_private(self); 998 struct axpreg_attach_args *aaa = aux; 999 const int phandle = aaa->reg_phandle; 1000 const char *name; 1001 1002 sc->sc_dev = self; 1003 sc->sc_i2c = aaa->reg_i2c; 1004 sc->sc_addr = aaa->reg_addr; 1005 sc->sc_ctrl = aaa->reg_ctrl; 1006 1007 fdtbus_register_regulator_controller(self, phandle, 1008 &axpreg_funcs); 1009 1010 aprint_naive("\n"); 1011 name = fdtbus_get_string(phandle, "regulator-name"); 1012 if (name) 1013 aprint_normal(": %s\n", name); 1014 else 1015 aprint_normal("\n"); 1016 } 1017 1018 CFATTACH_DECL_NEW(axppmic, sizeof(struct axppmic_softc), 1019 axppmic_match, axppmic_attach, NULL, NULL); 1020 1021 CFATTACH_DECL_NEW(axpreg, sizeof(struct axpreg_softc), 1022 axpreg_match, axpreg_attach, NULL, NULL); 1023
Indexes created Mon Sep 22 05:09:51 GMT 2025