axppmic.c revision 1.22
1 /* $NetBSD: axppmic.c,v 1.22 2019/05/28 09:52:17 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2014-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: axppmic.c,v 1.22 2019/05/28 09:52:17 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 40 #include <dev/i2c/i2cvar.h> 41 42 #include <dev/sysmon/sysmonvar.h> 43 #include <dev/sysmon/sysmon_taskq.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #define AXP_POWER_SOURCE_REG 0x00 48 #define AXP_POWER_SOURCE_ACIN_PRESENT __BIT(7) 49 #define AXP_POWER_SOURCE_VBUS_PRESENT __BIT(5) 50 #define AXP_POWER_SOURCE_CHARGE_DIRECTION __BIT(2) 51 52 #define AXP_POWER_MODE_REG 0x01 53 #define AXP_POWER_MODE_BATT_VALID __BIT(4) 54 #define AXP_POWER_MODE_BATT_PRESENT __BIT(5) 55 #define AXP_POWER_MODE_BATT_CHARGING __BIT(6) 56 57 #define AXP_CHIP_ID_REG 0x03 58 59 #define AXP_POWER_DISABLE_REG 0x32 60 #define AXP_POWER_DISABLE_CTRL __BIT(7) 61 62 #define AXP_IRQ_ENABLE_REG(n) (0x40 + (n) - 1) 63 #define AXP_IRQ1_ACIN_RAISE __BIT(6) 64 #define AXP_IRQ1_ACIN_LOWER __BIT(5) 65 #define AXP_IRQ1_VBUS_RAISE __BIT(3) 66 #define AXP_IRQ1_VBUS_LOWER __BIT(2) 67 #define AXP_IRQ_STATUS_REG(n) (0x48 + (n) - 1) 68 69 #define AXP_BATSENSE_HI_REG 0x78 70 #define AXP_BATSENSE_LO_REG 0x79 71 72 #define AXP_BATTCHG_HI_REG 0x7a 73 #define AXP_BATTCHG_LO_REG 0x7b 74 75 #define AXP_BATTDISCHG_HI_REG 0x7c 76 #define AXP_BATTDISCHG_LO_REG 0x7d 77 78 #define AXP_ADC_RAW(_hi, _lo) \ 79 (((u_int)(_hi) << 4) | ((_lo) & 0xf)) 80 81 #define AXP_FUEL_GAUGE_CTRL_REG 0xb8 82 #define AXP_FUEL_GAUGE_CTRL_EN __BIT(7) 83 84 #define AXP_BATT_CAP_REG 0xb9 85 #define AXP_BATT_CAP_VALID __BIT(7) 86 #define AXP_BATT_CAP_PERCENT __BITS(6,0) 87 88 #define AXP_BATT_MAX_CAP_HI_REG 0xe0 89 #define AXP_BATT_MAX_CAP_VALID __BIT(7) 90 #define AXP_BATT_MAX_CAP_LO_REG 0xe1 91 92 #define AXP_BATT_COULOMB_HI_REG 0xe2 93 #define AXP_BATT_COULOMB_VALID __BIT(7) 94 #define AXP_BATT_COULOMB_LO_REG 0xe3 95 96 #define AXP_COULOMB_RAW(_hi, _lo) \ 97 (((u_int)(_hi & ~__BIT(7)) << 8) | (_lo)) 98 99 #define AXP_BATT_CAP_WARN_REG 0xe6 100 #define AXP_BATT_CAP_WARN_LV1 __BITS(7,4) 101 #define AXP_BATT_CAP_WARN_LV2 __BITS(3,0) 102 103 #define AXP_ADDR_EXT_REG 0xff /* AXP806 */ 104 #define AXP_ADDR_EXT_MASTER 0 105 #define AXP_ADDR_EXT_SLAVE __BIT(4) 106 107 struct axppmic_ctrl { 108 device_t c_dev; 109 110 const char * c_name; 111 u_int c_min; 112 u_int c_max; 113 u_int c_step1; 114 u_int c_step1cnt; 115 u_int c_step2; 116 u_int c_step2cnt; 117 118 uint8_t c_enable_reg; 119 uint8_t c_enable_mask; 120 121 uint8_t c_voltage_reg; 122 uint8_t c_voltage_mask; 123 }; 124 125 #define AXP_CTRL(name, min, max, step, ereg, emask, vreg, vmask) \ 126 { .c_name = (name), .c_min = (min), .c_max = (max), \ 127 .c_step1 = (step), .c_step1cnt = (((max) - (min)) / (step)) + 1, \ 128 .c_step2 = 0, .c_step2cnt = 0, \ 129 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 130 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 131 132 #define AXP_CTRL2(name, min, max, step1, step1cnt, step2, step2cnt, ereg, emask, vreg, vmask) \ 133 { .c_name = (name), .c_min = (min), .c_max = (max), \ 134 .c_step1 = (step1), .c_step1cnt = (step1cnt), \ 135 .c_step2 = (step2), .c_step2cnt = (step2cnt), \ 136 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 137 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 138 139 static const struct axppmic_ctrl axp803_ctrls[] = { 140 AXP_CTRL("dldo1", 700, 3300, 100, 141 0x12, __BIT(3), 0x15, __BITS(4,0)), 142 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 143 0x12, __BIT(4), 0x16, __BITS(4,0)), 144 AXP_CTRL("dldo3", 700, 3300, 100, 145 0x12, __BIT(5), 0x17, __BITS(4,0)), 146 AXP_CTRL("dldo4", 700, 3300, 100, 147 0x12, __BIT(6), 0x18, __BITS(4,0)), 148 AXP_CTRL("eldo1", 700, 1900, 50, 149 0x12, __BIT(0), 0x19, __BITS(4,0)), 150 AXP_CTRL("eldo2", 700, 1900, 50, 151 0x12, __BIT(1), 0x1a, __BITS(4,0)), 152 AXP_CTRL("eldo3", 700, 1900, 50, 153 0x12, __BIT(2), 0x1b, __BITS(4,0)), 154 AXP_CTRL("fldo1", 700, 1450, 50, 155 0x13, __BIT(2), 0x1c, __BITS(3,0)), 156 AXP_CTRL("fldo2", 700, 1450, 50, 157 0x13, __BIT(3), 0x1d, __BITS(3,0)), 158 AXP_CTRL("dcdc1", 1600, 3400, 100, 159 0x10, __BIT(0), 0x20, __BITS(4,0)), 160 AXP_CTRL2("dcdc2", 500, 1300, 10, 70, 20, 5, 161 0x10, __BIT(1), 0x21, __BITS(6,0)), 162 AXP_CTRL2("dcdc3", 500, 1300, 10, 70, 20, 5, 163 0x10, __BIT(2), 0x22, __BITS(6,0)), 164 AXP_CTRL2("dcdc4", 500, 1300, 10, 70, 20, 5, 165 0x10, __BIT(3), 0x23, __BITS(6,0)), 166 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 167 0x10, __BIT(4), 0x24, __BITS(6,0)), 168 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 169 0x10, __BIT(5), 0x25, __BITS(6,0)), 170 AXP_CTRL("aldo1", 700, 3300, 100, 171 0x13, __BIT(5), 0x28, __BITS(4,0)), 172 AXP_CTRL("aldo2", 700, 3300, 100, 173 0x13, __BIT(6), 0x29, __BITS(4,0)), 174 AXP_CTRL("aldo3", 700, 3300, 100, 175 0x13, __BIT(7), 0x2a, __BITS(4,0)), 176 }; 177 178 static const struct axppmic_ctrl axp805_ctrls[] = { 179 AXP_CTRL2("dcdca", 600, 1520, 10, 51, 20, 21, 180 0x10, __BIT(0), 0x12, __BITS(6,0)), 181 AXP_CTRL("dcdcb", 1000, 2550, 50, 182 0x10, __BIT(1), 0x13, __BITS(4,0)), 183 AXP_CTRL2("dcdcc", 600, 1520, 10, 51, 20, 21, 184 0x10, __BIT(2), 0x14, __BITS(6,0)), 185 AXP_CTRL2("dcdcd", 600, 3300, 20, 46, 100, 18, 186 0x10, __BIT(3), 0x15, __BITS(5,0)), 187 AXP_CTRL("dcdce", 1100, 3400, 100, 188 0x10, __BIT(4), 0x16, __BITS(4,0)), 189 AXP_CTRL("aldo1", 700, 3300, 100, 190 0x10, __BIT(5), 0x17, __BITS(4,0)), 191 AXP_CTRL("aldo2", 700, 3400, 100, 192 0x10, __BIT(6), 0x18, __BITS(4,0)), 193 AXP_CTRL("aldo3", 700, 3300, 100, 194 0x10, __BIT(7), 0x19, __BITS(4,0)), 195 AXP_CTRL("bldo1", 700, 1900, 100, 196 0x11, __BIT(0), 0x20, __BITS(3,0)), 197 AXP_CTRL("bldo2", 700, 1900, 100, 198 0x11, __BIT(1), 0x21, __BITS(3,0)), 199 AXP_CTRL("bldo3", 700, 1900, 100, 200 0x11, __BIT(2), 0x22, __BITS(3,0)), 201 AXP_CTRL("bldo4", 700, 1900, 100, 202 0x11, __BIT(3), 0x23, __BITS(3,0)), 203 AXP_CTRL("cldo1", 700, 3300, 100, 204 0x11, __BIT(4), 0x24, __BITS(4,0)), 205 AXP_CTRL2("cldo2", 700, 4200, 100, 28, 200, 4, 206 0x11, __BIT(5), 0x25, __BITS(4,0)), 207 AXP_CTRL("cldo3", 700, 3300, 100, 208 0x11, __BIT(6), 0x26, __BITS(4,0)), 209 }; 210 211 static const struct axppmic_ctrl axp809_ctrls[] = { 212 /* TODO: This list is incomplete */ 213 AXP_CTRL("ldo_io0", 700, 3300, 100, 214 0x90, __BIT(0), 0x91, __BITS(4,0)), 215 AXP_CTRL("ldo_io1", 700, 3300, 100, 216 0x92, __BIT(0), 0x93, __BITS(4,0)), 217 }; 218 219 static const struct axppmic_ctrl axp813_ctrls[] = { 220 AXP_CTRL("dldo1", 700, 3300, 100, 221 0x12, __BIT(3), 0x15, __BITS(4,0)), 222 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 223 0x12, __BIT(4), 0x16, __BITS(4,0)), 224 AXP_CTRL("dldo3", 700, 3300, 100, 225 0x12, __BIT(5), 0x17, __BITS(4,0)), 226 AXP_CTRL("dldo4", 700, 3300, 100, 227 0x12, __BIT(6), 0x18, __BITS(4,0)), 228 AXP_CTRL("eldo1", 700, 1900, 50, 229 0x12, __BIT(0), 0x19, __BITS(4,0)), 230 AXP_CTRL("eldo2", 700, 1900, 50, 231 0x12, __BIT(1), 0x1a, __BITS(4,0)), 232 AXP_CTRL("eldo3", 700, 1900, 50, 233 0x12, __BIT(2), 0x1b, __BITS(4,0)), 234 AXP_CTRL("fldo1", 700, 1450, 50, 235 0x13, __BIT(2), 0x1c, __BITS(3,0)), 236 AXP_CTRL("fldo2", 700, 1450, 50, 237 0x13, __BIT(3), 0x1d, __BITS(3,0)), 238 AXP_CTRL("dcdc1", 1600, 3400, 100, 239 0x10, __BIT(0), 0x20, __BITS(4,0)), 240 AXP_CTRL2("dcdc2", 500, 1300, 10, 70, 20, 5, 241 0x10, __BIT(1), 0x21, __BITS(6,0)), 242 AXP_CTRL2("dcdc3", 500, 1300, 10, 70, 20, 5, 243 0x10, __BIT(2), 0x22, __BITS(6,0)), 244 AXP_CTRL2("dcdc4", 500, 1300, 10, 70, 20, 5, 245 0x10, __BIT(3), 0x23, __BITS(6,0)), 246 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 247 0x10, __BIT(4), 0x24, __BITS(6,0)), 248 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 249 0x10, __BIT(5), 0x25, __BITS(6,0)), 250 AXP_CTRL2("dcdc7", 600, 1520, 10, 51, 20, 21, 251 0x10, __BIT(6), 0x26, __BITS(6,0)), 252 AXP_CTRL("aldo1", 700, 3300, 100, 253 0x13, __BIT(5), 0x28, __BITS(4,0)), 254 AXP_CTRL("aldo2", 700, 3300, 100, 255 0x13, __BIT(6), 0x29, __BITS(4,0)), 256 AXP_CTRL("aldo3", 700, 3300, 100, 257 0x13, __BIT(7), 0x2a, __BITS(4,0)), 258 }; 259 260 struct axppmic_irq { 261 u_int reg; 262 uint8_t mask; 263 }; 264 265 #define AXPPMIC_IRQ(_reg, _mask) \ 266 { .reg = (_reg), .mask = (_mask) } 267 268 struct axppmic_config { 269 const char *name; 270 const struct axppmic_ctrl *controls; 271 u_int ncontrols; 272 u_int irq_regs; 273 bool has_battery; 274 bool has_fuel_gauge; 275 bool has_mode_set; 276 struct axppmic_irq poklirq; 277 struct axppmic_irq acinirq; 278 struct axppmic_irq vbusirq; 279 struct axppmic_irq battirq; 280 struct axppmic_irq chargeirq; 281 struct axppmic_irq chargestirq; 282 u_int batsense_step; /* uV */ 283 u_int charge_step; /* uA */ 284 u_int discharge_step; /* uA */ 285 u_int maxcap_step; /* uAh */ 286 u_int coulomb_step; /* uAh */ 287 }; 288 289 enum axppmic_sensor { 290 AXP_SENSOR_ACIN_PRESENT, 291 AXP_SENSOR_VBUS_PRESENT, 292 AXP_SENSOR_BATT_PRESENT, 293 AXP_SENSOR_BATT_CHARGING, 294 AXP_SENSOR_BATT_CHARGE_STATE, 295 AXP_SENSOR_BATT_VOLTAGE, 296 AXP_SENSOR_BATT_CHARGE_CURRENT, 297 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 298 AXP_SENSOR_BATT_CAPACITY_PERCENT, 299 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 300 AXP_SENSOR_BATT_CURRENT_CAPACITY, 301 AXP_NSENSORS 302 }; 303 304 struct axppmic_softc { 305 device_t sc_dev; 306 i2c_tag_t sc_i2c; 307 i2c_addr_t sc_addr; 308 int sc_phandle; 309 310 const struct axppmic_config *sc_conf; 311 312 struct sysmon_pswitch sc_smpsw; 313 314 struct sysmon_envsys *sc_sme; 315 316 envsys_data_t sc_sensor[AXP_NSENSORS]; 317 318 u_int sc_warn_thres; 319 u_int sc_shut_thres; 320 }; 321 322 struct axpreg_softc { 323 device_t sc_dev; 324 i2c_tag_t sc_i2c; 325 i2c_addr_t sc_addr; 326 const struct axppmic_ctrl *sc_ctrl; 327 }; 328 329 struct axpreg_attach_args { 330 const struct axppmic_ctrl *reg_ctrl; 331 int reg_phandle; 332 i2c_tag_t reg_i2c; 333 i2c_addr_t reg_addr; 334 }; 335 336 static const struct axppmic_config axp803_config = { 337 .name = "AXP803", 338 .controls = axp803_ctrls, 339 .ncontrols = __arraycount(axp803_ctrls), 340 .irq_regs = 6, 341 .has_battery = true, 342 .has_fuel_gauge = true, 343 .batsense_step = 1100, 344 .charge_step = 1000, 345 .discharge_step = 1000, 346 .maxcap_step = 1456, 347 .coulomb_step = 1456, 348 .poklirq = AXPPMIC_IRQ(5, __BIT(3)), 349 .acinirq = AXPPMIC_IRQ(1, __BITS(6,5)), 350 .vbusirq = AXPPMIC_IRQ(1, __BITS(3,2)), 351 .battirq = AXPPMIC_IRQ(2, __BITS(7,6)), 352 .chargeirq = AXPPMIC_IRQ(2, __BITS(3,2)), 353 .chargestirq = AXPPMIC_IRQ(4, __BITS(1,0)), 354 }; 355 356 static const struct axppmic_config axp805_config = { 357 .name = "AXP805", 358 .controls = axp805_ctrls, 359 .ncontrols = __arraycount(axp805_ctrls), 360 .irq_regs = 2, 361 .poklirq = AXPPMIC_IRQ(2, __BIT(0)), 362 }; 363 364 static const struct axppmic_config axp806_config = { 365 .name = "AXP806", 366 .controls = axp805_ctrls, 367 .ncontrols = __arraycount(axp805_ctrls), 368 #if notyet 369 .irq_regs = 2, 370 .poklirq = AXPPMIC_IRQ(2, __BIT(0)), 371 #endif 372 .has_mode_set = true, 373 }; 374 375 static const struct axppmic_config axp809_config = { 376 .name = "AXP809", 377 .controls = axp809_ctrls, 378 .ncontrols = __arraycount(axp809_ctrls), 379 }; 380 381 static const struct axppmic_config axp813_config = { 382 .name = "AXP813", 383 .controls = axp813_ctrls, 384 .ncontrols = __arraycount(axp813_ctrls), 385 .irq_regs = 6, 386 .has_battery = true, 387 .has_fuel_gauge = true, 388 .batsense_step = 1100, 389 .charge_step = 1000, 390 .discharge_step = 1000, 391 .maxcap_step = 1456, 392 .coulomb_step = 1456, 393 .poklirq = AXPPMIC_IRQ(5, __BIT(3)), 394 .acinirq = AXPPMIC_IRQ(1, __BITS(6,5)), 395 .vbusirq = AXPPMIC_IRQ(1, __BITS(3,2)), 396 .battirq = AXPPMIC_IRQ(2, __BITS(7,6)), 397 .chargeirq = AXPPMIC_IRQ(2, __BITS(3,2)), 398 .chargestirq = AXPPMIC_IRQ(4, __BITS(1,0)), 399 }; 400 401 static const struct device_compatible_entry compat_data[] = { 402 { "x-powers,axp803", (uintptr_t)&axp803_config }, 403 { "x-powers,axp805", (uintptr_t)&axp805_config }, 404 { "x-powers,axp806", (uintptr_t)&axp806_config }, 405 { "x-powers,axp809", (uintptr_t)&axp809_config }, 406 { "x-powers,axp813", (uintptr_t)&axp813_config }, 407 { NULL, 0 } 408 }; 409 410 static int 411 axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags) 412 { 413 return iic_smbus_read_byte(tag, addr, reg, val, flags); 414 } 415 416 static int 417 axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags) 418 { 419 return iic_smbus_write_byte(tag, addr, reg, val, flags); 420 } 421 422 static int 423 axppmic_set_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int min, u_int max) 424 { 425 const int flags = (cold ? I2C_F_POLL : 0); 426 u_int vol, reg_val; 427 int nstep, error; 428 uint8_t val; 429 430 if (!c->c_voltage_mask) 431 return EINVAL; 432 433 if (min < c->c_min || min > c->c_max) 434 return EINVAL; 435 436 reg_val = 0; 437 nstep = 1; 438 vol = c->c_min; 439 440 for (nstep = 0; nstep < c->c_step1cnt && vol < min; nstep++) { 441 ++reg_val; 442 vol += c->c_step1; 443 } 444 for (nstep = 0; nstep < c->c_step2cnt && vol < min; nstep++) { 445 ++reg_val; 446 vol += c->c_step2; 447 } 448 449 if (vol > max) 450 return EINVAL; 451 452 iic_acquire_bus(tag, flags); 453 if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags)) == 0) { 454 val &= ~c->c_voltage_mask; 455 val |= __SHIFTIN(reg_val, c->c_voltage_mask); 456 error = axppmic_write(tag, addr, c->c_voltage_reg, val, flags); 457 } 458 iic_release_bus(tag, flags); 459 460 return error; 461 } 462 463 static int 464 axppmic_get_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int *pvol) 465 { 466 const int flags = (cold ? I2C_F_POLL : 0); 467 int reg_val, error; 468 uint8_t val; 469 470 if (!c->c_voltage_mask) 471 return EINVAL; 472 473 iic_acquire_bus(tag, flags); 474 error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags); 475 iic_release_bus(tag, flags); 476 if (error) 477 return error; 478 479 reg_val = __SHIFTOUT(val, c->c_voltage_mask); 480 if (reg_val < c->c_step1cnt) { 481 *pvol = c->c_min + reg_val * c->c_step1; 482 } else { 483 *pvol = c->c_min + (c->c_step1cnt * c->c_step1) + 484 ((reg_val - c->c_step1cnt) * c->c_step2); 485 } 486 487 return 0; 488 } 489 490 static void 491 axppmic_power_poweroff(device_t dev) 492 { 493 struct axppmic_softc *sc = device_private(dev); 494 495 delay(1000000); 496 497 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 498 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_POWER_DISABLE_REG, AXP_POWER_DISABLE_CTRL, I2C_F_POLL); 499 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 500 } 501 502 static struct fdtbus_power_controller_func axppmic_power_funcs = { 503 .poweroff = axppmic_power_poweroff, 504 }; 505 506 static void 507 axppmic_task_shut(void *priv) 508 { 509 struct axppmic_softc *sc = priv; 510 511 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 512 } 513 514 static void 515 axppmic_sensor_update(struct sysmon_envsys *sme, envsys_data_t *e) 516 { 517 struct axppmic_softc *sc = sme->sme_cookie; 518 const struct axppmic_config *c = sc->sc_conf; 519 const int flags = I2C_F_POLL; 520 uint8_t val, lo, hi; 521 522 e->state = ENVSYS_SINVALID; 523 524 const bool battery_present = 525 sc->sc_sensor[AXP_SENSOR_BATT_PRESENT].state == ENVSYS_SVALID && 526 sc->sc_sensor[AXP_SENSOR_BATT_PRESENT].value_cur == 1; 527 528 switch (e->private) { 529 case AXP_SENSOR_ACIN_PRESENT: 530 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 531 e->state = ENVSYS_SVALID; 532 e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT); 533 } 534 break; 535 case AXP_SENSOR_VBUS_PRESENT: 536 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 537 e->state = ENVSYS_SVALID; 538 e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT); 539 } 540 break; 541 case AXP_SENSOR_BATT_PRESENT: 542 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 543 if (val & AXP_POWER_MODE_BATT_VALID) { 544 e->state = ENVSYS_SVALID; 545 e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT); 546 } 547 } 548 break; 549 case AXP_SENSOR_BATT_CHARGING: 550 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 551 e->state = ENVSYS_SVALID; 552 e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING); 553 } 554 break; 555 case AXP_SENSOR_BATT_CHARGE_STATE: 556 if (battery_present && 557 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 558 (val & AXP_BATT_CAP_VALID) != 0) { 559 const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 560 if (batt_val <= sc->sc_shut_thres) { 561 e->state = ENVSYS_SCRITICAL; 562 e->value_cur = ENVSYS_BATTERY_CAPACITY_CRITICAL; 563 } else if (batt_val <= sc->sc_warn_thres) { 564 e->state = ENVSYS_SWARNUNDER; 565 e->value_cur = ENVSYS_BATTERY_CAPACITY_WARNING; 566 } else { 567 e->state = ENVSYS_SVALID; 568 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 569 } 570 } 571 break; 572 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 573 if (battery_present && 574 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 575 (val & AXP_BATT_CAP_VALID) != 0) { 576 e->state = ENVSYS_SVALID; 577 e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 578 } 579 break; 580 case AXP_SENSOR_BATT_VOLTAGE: 581 if (battery_present && 582 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATSENSE_HI_REG, &hi, flags) == 0 && 583 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATSENSE_LO_REG, &lo, flags) == 0) { 584 e->state = ENVSYS_SVALID; 585 e->value_cur = AXP_ADC_RAW(hi, lo) * c->batsense_step; 586 } 587 break; 588 case AXP_SENSOR_BATT_CHARGE_CURRENT: 589 if (battery_present && 590 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0 && 591 (val & AXP_POWER_SOURCE_CHARGE_DIRECTION) != 0 && 592 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTCHG_HI_REG, &hi, flags) == 0 && 593 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTCHG_LO_REG, &lo, flags) == 0) { 594 e->state = ENVSYS_SVALID; 595 e->value_cur = AXP_ADC_RAW(hi, lo) * c->charge_step; 596 } 597 break; 598 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 599 if (battery_present && 600 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0 && 601 (val & AXP_POWER_SOURCE_CHARGE_DIRECTION) == 0 && 602 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTDISCHG_HI_REG, &hi, flags) == 0 && 603 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATTDISCHG_LO_REG, &lo, flags) == 0) { 604 e->state = ENVSYS_SVALID; 605 e->value_cur = AXP_ADC_RAW(hi, lo) * c->discharge_step; 606 } 607 break; 608 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 609 if (battery_present && 610 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_MAX_CAP_HI_REG, &hi, flags) == 0 && 611 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_MAX_CAP_LO_REG, &lo, flags) == 0) { 612 e->state = (hi & AXP_BATT_MAX_CAP_VALID) ? ENVSYS_SVALID : ENVSYS_SINVALID; 613 e->value_cur = AXP_COULOMB_RAW(hi, lo) * c->maxcap_step; 614 } 615 break; 616 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 617 if (battery_present && 618 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_COULOMB_HI_REG, &hi, flags) == 0 && 619 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_COULOMB_LO_REG, &lo, flags) == 0) { 620 e->state = (hi & AXP_BATT_COULOMB_VALID) ? ENVSYS_SVALID : ENVSYS_SINVALID; 621 e->value_cur = AXP_COULOMB_RAW(hi, lo) * c->coulomb_step; 622 } 623 break; 624 } 625 } 626 627 static void 628 axppmic_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *e) 629 { 630 struct axppmic_softc *sc = sme->sme_cookie; 631 const int flags = I2C_F_POLL; 632 633 switch (e->private) { 634 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 635 case AXP_SENSOR_BATT_VOLTAGE: 636 case AXP_SENSOR_BATT_CHARGE_CURRENT: 637 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 638 /* Always update battery capacity and ADCs */ 639 iic_acquire_bus(sc->sc_i2c, flags); 640 axppmic_sensor_update(sme, e); 641 iic_release_bus(sc->sc_i2c, flags); 642 break; 643 default: 644 /* Refresh if the sensor is not in valid state */ 645 if (e->state != ENVSYS_SVALID) { 646 iic_acquire_bus(sc->sc_i2c, flags); 647 axppmic_sensor_update(sme, e); 648 iic_release_bus(sc->sc_i2c, flags); 649 } 650 break; 651 } 652 } 653 654 static int 655 axppmic_intr(void *priv) 656 { 657 struct axppmic_softc *sc = priv; 658 const struct axppmic_config *c = sc->sc_conf; 659 const int flags = I2C_F_POLL; 660 uint8_t stat; 661 u_int n; 662 663 iic_acquire_bus(sc->sc_i2c, flags); 664 for (n = 1; n <= c->irq_regs; n++) { 665 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(n), &stat, flags) == 0) { 666 if (n == c->poklirq.reg && (stat & c->poklirq.mask) != 0) 667 sysmon_task_queue_sched(0, axppmic_task_shut, sc); 668 if (n == c->acinirq.reg && (stat & c->acinirq.mask) != 0) 669 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]); 670 if (n == c->vbusirq.reg && (stat & c->vbusirq.mask) != 0) 671 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]); 672 if (n == c->battirq.reg && (stat & c->battirq.mask) != 0) 673 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]); 674 if (n == c->chargeirq.reg && (stat & c->chargeirq.mask) != 0) 675 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]); 676 if (n == c->chargestirq.reg && (stat & c->chargestirq.mask) != 0) 677 axppmic_sensor_update(sc->sc_sme, &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]); 678 679 if (stat != 0) 680 axppmic_write(sc->sc_i2c, sc->sc_addr, 681 AXP_IRQ_STATUS_REG(n), stat, flags); 682 } 683 } 684 iic_release_bus(sc->sc_i2c, flags); 685 686 return 1; 687 } 688 689 static void 690 axppmic_attach_acadapter(struct axppmic_softc *sc) 691 { 692 envsys_data_t *e; 693 694 e = &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]; 695 e->private = AXP_SENSOR_ACIN_PRESENT; 696 e->units = ENVSYS_INDICATOR; 697 e->state = ENVSYS_SINVALID; 698 strlcpy(e->desc, "ACIN present", sizeof(e->desc)); 699 sysmon_envsys_sensor_attach(sc->sc_sme, e); 700 701 e = &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]; 702 e->private = AXP_SENSOR_VBUS_PRESENT; 703 e->units = ENVSYS_INDICATOR; 704 e->state = ENVSYS_SINVALID; 705 strlcpy(e->desc, "VBUS present", sizeof(e->desc)); 706 sysmon_envsys_sensor_attach(sc->sc_sme, e); 707 } 708 709 static void 710 axppmic_attach_battery(struct axppmic_softc *sc) 711 { 712 const struct axppmic_config *c = sc->sc_conf; 713 envsys_data_t *e; 714 uint8_t val; 715 716 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 717 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &val, I2C_F_POLL) == 0) { 718 sc->sc_warn_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV1) + 5; 719 sc->sc_shut_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV2); 720 } 721 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 722 723 e = &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]; 724 e->private = AXP_SENSOR_BATT_PRESENT; 725 e->units = ENVSYS_INDICATOR; 726 e->state = ENVSYS_SINVALID; 727 strlcpy(e->desc, "battery present", sizeof(e->desc)); 728 sysmon_envsys_sensor_attach(sc->sc_sme, e); 729 730 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]; 731 e->private = AXP_SENSOR_BATT_CHARGING; 732 e->units = ENVSYS_BATTERY_CHARGE; 733 e->state = ENVSYS_SINVALID; 734 strlcpy(e->desc, "charging", sizeof(e->desc)); 735 sysmon_envsys_sensor_attach(sc->sc_sme, e); 736 737 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]; 738 e->private = AXP_SENSOR_BATT_CHARGE_STATE; 739 e->units = ENVSYS_BATTERY_CAPACITY; 740 e->flags = ENVSYS_FMONSTCHANGED; 741 e->state = ENVSYS_SINVALID; 742 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 743 strlcpy(e->desc, "charge state", sizeof(e->desc)); 744 sysmon_envsys_sensor_attach(sc->sc_sme, e); 745 746 if (c->batsense_step) { 747 e = &sc->sc_sensor[AXP_SENSOR_BATT_VOLTAGE]; 748 e->private = AXP_SENSOR_BATT_VOLTAGE; 749 e->units = ENVSYS_SVOLTS_DC; 750 e->state = ENVSYS_SINVALID; 751 strlcpy(e->desc, "battery voltage", sizeof(e->desc)); 752 sysmon_envsys_sensor_attach(sc->sc_sme, e); 753 } 754 755 if (c->charge_step) { 756 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_CURRENT]; 757 e->private = AXP_SENSOR_BATT_CHARGE_CURRENT; 758 e->units = ENVSYS_SAMPS; 759 e->state = ENVSYS_SINVALID; 760 strlcpy(e->desc, "battery charge current", sizeof(e->desc)); 761 sysmon_envsys_sensor_attach(sc->sc_sme, e); 762 } 763 764 if (c->discharge_step) { 765 e = &sc->sc_sensor[AXP_SENSOR_BATT_DISCHARGE_CURRENT]; 766 e->private = AXP_SENSOR_BATT_DISCHARGE_CURRENT; 767 e->units = ENVSYS_SAMPS; 768 e->state = ENVSYS_SINVALID; 769 strlcpy(e->desc, "battery discharge current", sizeof(e->desc)); 770 sysmon_envsys_sensor_attach(sc->sc_sme, e); 771 } 772 773 if (c->has_fuel_gauge) { 774 e = &sc->sc_sensor[AXP_SENSOR_BATT_CAPACITY_PERCENT]; 775 e->private = AXP_SENSOR_BATT_CAPACITY_PERCENT; 776 e->units = ENVSYS_INTEGER; 777 e->state = ENVSYS_SINVALID; 778 e->flags = ENVSYS_FPERCENT; 779 strlcpy(e->desc, "battery percent", sizeof(e->desc)); 780 sysmon_envsys_sensor_attach(sc->sc_sme, e); 781 } 782 783 if (c->maxcap_step) { 784 e = &sc->sc_sensor[AXP_SENSOR_BATT_MAXIMUM_CAPACITY]; 785 e->private = AXP_SENSOR_BATT_MAXIMUM_CAPACITY; 786 e->units = ENVSYS_SAMPHOUR; 787 e->state = ENVSYS_SINVALID; 788 strlcpy(e->desc, "battery maximum capacity", sizeof(e->desc)); 789 sysmon_envsys_sensor_attach(sc->sc_sme, e); 790 } 791 792 if (c->coulomb_step) { 793 e = &sc->sc_sensor[AXP_SENSOR_BATT_CURRENT_CAPACITY]; 794 e->private = AXP_SENSOR_BATT_CURRENT_CAPACITY; 795 e->units = ENVSYS_SAMPHOUR; 796 e->state = ENVSYS_SINVALID; 797 strlcpy(e->desc, "battery current capacity", sizeof(e->desc)); 798 sysmon_envsys_sensor_attach(sc->sc_sme, e); 799 } 800 } 801 802 static void 803 axppmic_attach_sensors(struct axppmic_softc *sc) 804 { 805 if (sc->sc_conf->has_battery) { 806 sc->sc_sme = sysmon_envsys_create(); 807 sc->sc_sme->sme_name = device_xname(sc->sc_dev); 808 sc->sc_sme->sme_cookie = sc; 809 sc->sc_sme->sme_refresh = axppmic_sensor_refresh; 810 sc->sc_sme->sme_class = SME_CLASS_BATTERY; 811 sc->sc_sme->sme_flags = SME_INIT_REFRESH; 812 813 axppmic_attach_acadapter(sc); 814 axppmic_attach_battery(sc); 815 816 sysmon_envsys_register(sc->sc_sme); 817 } 818 } 819 820 821 static int 822 axppmic_match(device_t parent, cfdata_t match, void *aux) 823 { 824 struct i2c_attach_args *ia = aux; 825 int match_result; 826 827 if (iic_use_direct_match(ia, match, compat_data, &match_result)) 828 return match_result; 829 830 /* This device is direct-config only. */ 831 832 return 0; 833 } 834 835 static void 836 axppmic_attach(device_t parent, device_t self, void *aux) 837 { 838 struct axppmic_softc *sc = device_private(self); 839 const struct device_compatible_entry *dce = NULL; 840 const struct axppmic_config *c; 841 struct axpreg_attach_args aaa; 842 struct i2c_attach_args *ia = aux; 843 int phandle, child, i; 844 uint8_t irq_mask, val; 845 int error; 846 void *ih; 847 848 (void) iic_compatible_match(ia, compat_data, &dce); 849 KASSERT(dce != NULL); 850 c = (void *)dce->data; 851 852 sc->sc_dev = self; 853 sc->sc_i2c = ia->ia_tag; 854 sc->sc_addr = ia->ia_addr; 855 sc->sc_phandle = ia->ia_cookie; 856 sc->sc_conf = c; 857 858 aprint_naive("\n"); 859 aprint_normal(": %s\n", c->name); 860 861 if (c->has_mode_set) { 862 const bool master_mode = of_hasprop(sc->sc_phandle, "x-powers,self-working-mode") || 863 of_hasprop(sc->sc_phandle, "x-powers,master-mode"); 864 865 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 866 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_ADDR_EXT_REG, 867 master_mode ? AXP_ADDR_EXT_MASTER : AXP_ADDR_EXT_SLAVE, I2C_F_POLL); 868 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 869 } 870 871 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 872 error = axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_CHIP_ID_REG, &val, I2C_F_POLL); 873 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 874 if (error != 0) { 875 aprint_error_dev(self, "couldn't read chipid\n"); 876 return; 877 } 878 aprint_debug_dev(self, "chipid %#x\n", val); 879 880 sc->sc_smpsw.smpsw_name = device_xname(self); 881 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_POWER; 882 sysmon_pswitch_register(&sc->sc_smpsw); 883 884 if (c->irq_regs > 0) { 885 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 886 for (i = 1; i <= c->irq_regs; i++) { 887 irq_mask = 0; 888 if (i == c->poklirq.reg) 889 irq_mask |= c->poklirq.mask; 890 if (i == c->acinirq.reg) 891 irq_mask |= c->acinirq.mask; 892 if (i == c->vbusirq.reg) 893 irq_mask |= c->vbusirq.mask; 894 if (i == c->battirq.reg) 895 irq_mask |= c->battirq.mask; 896 if (i == c->chargeirq.reg) 897 irq_mask |= c->chargeirq.mask; 898 if (i == c->chargestirq.reg) 899 irq_mask |= c->chargestirq.mask; 900 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_ENABLE_REG(i), irq_mask, I2C_F_POLL); 901 } 902 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 903 904 ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, FDT_INTR_MPSAFE, 905 axppmic_intr, sc); 906 if (ih == NULL) { 907 aprint_error_dev(self, "WARNING: couldn't establish interrupt handler\n"); 908 } 909 } 910 911 fdtbus_register_power_controller(sc->sc_dev, sc->sc_phandle, 912 &axppmic_power_funcs); 913 914 phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators"); 915 if (phandle > 0) { 916 aaa.reg_i2c = sc->sc_i2c; 917 aaa.reg_addr = sc->sc_addr; 918 for (i = 0; i < c->ncontrols; i++) { 919 const struct axppmic_ctrl *ctrl = &c->controls[i]; 920 child = of_find_firstchild_byname(phandle, ctrl->c_name); 921 if (child <= 0) 922 continue; 923 aaa.reg_ctrl = ctrl; 924 aaa.reg_phandle = child; 925 config_found(sc->sc_dev, &aaa, NULL); 926 } 927 } 928 929 /* Notify pinctrl drivers that regulators are available. */ 930 fdtbus_pinctrl_configure(); 931 932 if (c->has_battery) 933 axppmic_attach_sensors(sc); 934 } 935 936 static int 937 axpreg_acquire(device_t dev) 938 { 939 return 0; 940 } 941 942 static void 943 axpreg_release(device_t dev) 944 { 945 } 946 947 static int 948 axpreg_enable(device_t dev, bool enable) 949 { 950 struct axpreg_softc *sc = device_private(dev); 951 const struct axppmic_ctrl *c = sc->sc_ctrl; 952 const int flags = (cold ? I2C_F_POLL : 0); 953 uint8_t val; 954 int error; 955 956 if (!c->c_enable_mask) 957 return EINVAL; 958 959 iic_acquire_bus(sc->sc_i2c, flags); 960 if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) { 961 if (enable) 962 val |= c->c_enable_mask; 963 else 964 val &= ~c->c_enable_mask; 965 error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags); 966 } 967 iic_release_bus(sc->sc_i2c, flags); 968 969 return error; 970 } 971 972 static int 973 axpreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol) 974 { 975 struct axpreg_softc *sc = device_private(dev); 976 const struct axppmic_ctrl *c = sc->sc_ctrl; 977 978 return axppmic_set_voltage(sc->sc_i2c, sc->sc_addr, c, 979 min_uvol / 1000, max_uvol / 1000); 980 } 981 982 static int 983 axpreg_get_voltage(device_t dev, u_int *puvol) 984 { 985 struct axpreg_softc *sc = device_private(dev); 986 const struct axppmic_ctrl *c = sc->sc_ctrl; 987 int error; 988 u_int vol; 989 990 error = axppmic_get_voltage(sc->sc_i2c, sc->sc_addr, c, &vol); 991 if (error) 992 return error; 993 994 *puvol = vol * 1000; 995 return 0; 996 } 997 998 static struct fdtbus_regulator_controller_func axpreg_funcs = { 999 .acquire = axpreg_acquire, 1000 .release = axpreg_release, 1001 .enable = axpreg_enable, 1002 .set_voltage = axpreg_set_voltage, 1003 .get_voltage = axpreg_get_voltage, 1004 }; 1005 1006 static int 1007 axpreg_match(device_t parent, cfdata_t match, void *aux) 1008 { 1009 return 1; 1010 } 1011 1012 static void 1013 axpreg_attach(device_t parent, device_t self, void *aux) 1014 { 1015 struct axpreg_softc *sc = device_private(self); 1016 struct axpreg_attach_args *aaa = aux; 1017 const int phandle = aaa->reg_phandle; 1018 const char *name; 1019 u_int uvol, min_uvol, max_uvol; 1020 1021 sc->sc_dev = self; 1022 sc->sc_i2c = aaa->reg_i2c; 1023 sc->sc_addr = aaa->reg_addr; 1024 sc->sc_ctrl = aaa->reg_ctrl; 1025 1026 fdtbus_register_regulator_controller(self, phandle, 1027 &axpreg_funcs); 1028 1029 aprint_naive("\n"); 1030 name = fdtbus_get_string(phandle, "regulator-name"); 1031 if (name) 1032 aprint_normal(": %s\n", name); 1033 else 1034 aprint_normal("\n"); 1035 1036 axpreg_get_voltage(self, &uvol); 1037 if (of_getprop_uint32(phandle, "regulator-min-microvolt", &min_uvol) == 0 && 1038 of_getprop_uint32(phandle, "regulator-max-microvolt", &max_uvol) == 0) { 1039 if (uvol < min_uvol || uvol > max_uvol) { 1040 aprint_debug_dev(self, "fix voltage %u uV -> %u/%u uV\n", 1041 uvol, min_uvol, max_uvol); 1042 axpreg_set_voltage(self, min_uvol, max_uvol); 1043 } 1044 } 1045 1046 if (of_hasprop(phandle, "regulator-always-on") || 1047 of_hasprop(phandle, "regulator-boot-on")) { 1048 axpreg_enable(self, true); 1049 } 1050 } 1051 1052 CFATTACH_DECL_NEW(axppmic, sizeof(struct axppmic_softc), 1053 axppmic_match, axppmic_attach, NULL, NULL); 1054 1055 CFATTACH_DECL_NEW(axpreg, sizeof(struct axpreg_softc), 1056 axpreg_match, axpreg_attach, NULL, NULL); 1057
Indexes created Fri Oct 03 02:09:57 GMT 2025