axppmic.c revision 1.3
1 /* $NetBSD: axppmic.c,v 1.3 2018/05/05 10:25:59 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2014-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: axppmic.c,v 1.3 2018/05/05 10:25:59 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 40 #include <dev/i2c/i2cvar.h> 41 42 #include <dev/sysmon/sysmonvar.h> 43 #include <dev/sysmon/sysmon_taskq.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #define AXP_POWER_SOURCE_REG 0x00 48 #define AXP_POWER_SOURCE_ACIN_PRESENT __BIT(7) 49 #define AXP_POWER_SOURCE_VBUS_PRESENT __BIT(5) 50 51 #define AXP_POWER_MODE_REG 0x01 52 #define AXP_POWER_MODE_BATT_VALID __BIT(4) 53 #define AXP_POWER_MODE_BATT_PRESENT __BIT(5) 54 #define AXP_POWER_MODE_BATT_CHARGING __BIT(6) 55 56 #define AXP_POWER_DISABLE_REG 0x32 57 #define AXP_POWER_DISABLE_CTRL __BIT(7) 58 59 #define AXP_IRQ_ENABLE_REG(n) (0x40 + (n) - 1) 60 #define AXP_IRQ2_POKSIRQ __BIT(1) 61 #define AXP_IRQ_STATUS_REG(n) (0x48 + (n) - 1) 62 63 #define AXP_FUEL_GAUGE_CTRL_REG 0xb8 64 #define AXP_FUEL_GAUGE_CTRL_EN __BIT(7) 65 #define AXP_BATT_CAP_REG 0xb9 66 #define AXP_BATT_CAP_VALID __BIT(7) 67 #define AXP_BATT_CAP_PERCENT __BITS(6,0) 68 69 #define AXP_BATT_CAP_WARN_REG 0xe6 70 #define AXP_BATT_CAP_WARN_LV1 __BITS(7,4) 71 #define AXP_BATT_CAP_WARN_LV2 __BITS(3,0) 72 73 struct axppmic_ctrl { 74 device_t c_dev; 75 76 const char * c_name; 77 u_int c_min; 78 u_int c_max; 79 u_int c_step1; 80 u_int c_step1cnt; 81 u_int c_step2; 82 u_int c_step2cnt; 83 84 uint8_t c_enable_reg; 85 uint8_t c_enable_mask; 86 87 uint8_t c_voltage_reg; 88 uint8_t c_voltage_mask; 89 }; 90 91 #define AXP_CTRL(name, min, max, step, ereg, emask, vreg, vmask) \ 92 { .c_name = (name), .c_min = (min), .c_max = (max), \ 93 .c_step1 = (step), .c_step1cnt = (((max) - (min)) / (step)) + 1, \ 94 .c_step2 = 0, .c_step2cnt = 0, \ 95 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 96 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 97 98 #define AXP_CTRL2(name, min, max, step1, step1cnt, step2, step2cnt, ereg, emask, vreg, vmask) \ 99 { .c_name = (name), .c_min = (min), .c_max = (max), \ 100 .c_step1 = (step1), .c_step1cnt = (step1cnt), \ 101 .c_step2 = (step2), .c_step2cnt = (step2cnt), \ 102 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 103 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 104 105 static const struct axppmic_ctrl axp803_ctrls[] = { 106 AXP_CTRL("dldo1", 700, 3300, 100, 107 0x12, __BIT(3), 0x15, __BITS(4,0)), 108 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 109 0x12, __BIT(4), 0x16, __BITS(4,0)), 110 AXP_CTRL("dldo3", 700, 3300, 100, 111 0x12, __BIT(5), 0x17, __BITS(4,0)), 112 AXP_CTRL("dldo4", 700, 3300, 100, 113 0x12, __BIT(6), 0x18, __BITS(4,0)), 114 AXP_CTRL("eldo1", 700, 1900, 50, 115 0x12, __BIT(0), 0x19, __BITS(4,0)), 116 AXP_CTRL("eldo2", 700, 1900, 50, 117 0x12, __BIT(1), 0x1a, __BITS(4,0)), 118 AXP_CTRL("eldo3", 700, 1900, 50, 119 0x12, __BIT(2), 0x1b, __BITS(4,0)), 120 AXP_CTRL("fldo1", 700, 1450, 50, 121 0x13, __BIT(2), 0x1c, __BITS(3,0)), 122 AXP_CTRL("fldo2", 700, 1450, 50, 123 0x13, __BIT(3), 0x1d, __BITS(3,0)), 124 AXP_CTRL("dcdc1", 1600, 3400, 100, 125 0x10, __BIT(0), 0x20, __BITS(4,0)), 126 AXP_CTRL2("dcdc2", 500, 1300, 10, 71, 20, 5, 127 0x10, __BIT(1), 0x21, __BITS(6,0)), 128 AXP_CTRL2("dcdc3", 500, 1300, 10, 71, 20, 5, 129 0x10, __BIT(2), 0x22, __BITS(6,0)), 130 AXP_CTRL2("dcdc4", 500, 1300, 10, 71, 20, 5, 131 0x10, __BIT(3), 0x23, __BITS(6,0)), 132 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 133 0x10, __BIT(4), 0x24, __BITS(6,0)), 134 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 135 0x10, __BIT(5), 0x25, __BITS(6,0)), 136 AXP_CTRL("aldo1", 700, 3300, 100, 137 0x13, __BIT(5), 0x28, __BITS(4,0)), 138 AXP_CTRL("aldo2", 700, 3300, 100, 139 0x13, __BIT(6), 0x29, __BITS(4,0)), 140 AXP_CTRL("aldo3", 700, 3300, 100, 141 0x13, __BIT(7), 0x2a, __BITS(4,0)), 142 }; 143 144 static const struct axppmic_ctrl axp805_ctrls[] = { 145 AXP_CTRL2("dcdca", 600, 1520, 10, 51, 20, 21, 146 0x10, __BIT(0), 0x12, __BITS(6,0)), 147 AXP_CTRL("dcdcb", 1000, 2550, 50, 148 0x10, __BIT(1), 0x13, __BITS(4,0)), 149 AXP_CTRL2("dcdcc", 600, 1520, 10, 51, 20, 21, 150 0x10, __BIT(2), 0x14, __BITS(6,0)), 151 AXP_CTRL2("dcdcd", 600, 3300, 20, 46, 100, 18, 152 0x10, __BIT(3), 0x15, __BITS(5,0)), 153 AXP_CTRL("dcdce", 1100, 3400, 100, 154 0x10, __BIT(4), 0x16, __BITS(4,0)), 155 AXP_CTRL("aldo1", 700, 3300, 100, 156 0x10, __BIT(5), 0x17, __BITS(4,0)), 157 AXP_CTRL("aldo2", 700, 3400, 100, 158 0x10, __BIT(6), 0x18, __BITS(4,0)), 159 AXP_CTRL("aldo3", 700, 3300, 100, 160 0x10, __BIT(7), 0x19, __BITS(4,0)), 161 AXP_CTRL("bldo1", 700, 1900, 100, 162 0x11, __BIT(0), 0x20, __BITS(3,0)), 163 AXP_CTRL("bldo2", 700, 1900, 100, 164 0x11, __BIT(1), 0x21, __BITS(3,0)), 165 AXP_CTRL("bldo3", 700, 1900, 100, 166 0x11, __BIT(2), 0x22, __BITS(3,0)), 167 AXP_CTRL("bldo4", 700, 1900, 100, 168 0x11, __BIT(3), 0x23, __BITS(3,0)), 169 AXP_CTRL("cldo1", 700, 3300, 100, 170 0x11, __BIT(4), 0x24, __BITS(4,0)), 171 AXP_CTRL2("cldo2", 700, 4200, 100, 28, 200, 4, 172 0x11, __BIT(5), 0x25, __BITS(4,0)), 173 AXP_CTRL("cldo3", 700, 3300, 100, 174 0x11, __BIT(6), 0x26, __BITS(4,0)), 175 }; 176 177 struct axppmic_config { 178 const char *name; 179 const struct axppmic_ctrl *controls; 180 u_int ncontrols; 181 u_int irq_regs; 182 bool has_battery; 183 bool has_fuel_gauge; 184 }; 185 186 enum axppmic_sensor { 187 AXP_SENSOR_ACIN_PRESENT, 188 AXP_SENSOR_VBUS_PRESENT, 189 AXP_SENSOR_BATT_PRESENT, 190 AXP_SENSOR_BATT_CHARGING, 191 AXP_SENSOR_BATT_CHARGE_STATE, 192 AXP_SENSOR_BATT_CAPACITY, 193 AXP_NSENSORS 194 }; 195 196 struct axppmic_softc { 197 device_t sc_dev; 198 i2c_tag_t sc_i2c; 199 i2c_addr_t sc_addr; 200 int sc_phandle; 201 202 bool sc_has_battery; 203 bool sc_has_fuel_gauge; 204 205 struct sysmon_pswitch sc_smpsw; 206 207 struct sysmon_envsys *sc_sme; 208 209 envsys_data_t sc_sensor[AXP_NSENSORS]; 210 }; 211 212 struct axpreg_softc { 213 device_t sc_dev; 214 i2c_tag_t sc_i2c; 215 i2c_addr_t sc_addr; 216 const struct axppmic_ctrl *sc_ctrl; 217 }; 218 219 struct axpreg_attach_args { 220 const struct axppmic_ctrl *reg_ctrl; 221 int reg_phandle; 222 i2c_tag_t reg_i2c; 223 i2c_addr_t reg_addr; 224 }; 225 226 static const struct axppmic_config axp803_config = { 227 .name = "AXP803", 228 .controls = axp803_ctrls, 229 .ncontrols = __arraycount(axp803_ctrls), 230 .irq_regs = 6, 231 .has_battery = true, 232 .has_fuel_gauge = true, 233 }; 234 235 static const struct axppmic_config axp805_config = { 236 .name = "AXP805/806", 237 .controls = axp805_ctrls, 238 .ncontrols = __arraycount(axp805_ctrls), 239 .irq_regs = 2, 240 }; 241 242 static const struct of_compat_data compat_data[] = { 243 { "x-powers,axp803", (uintptr_t)&axp803_config }, 244 { "x-powers,axp805", (uintptr_t)&axp805_config }, 245 { "x-powers,axp806", (uintptr_t)&axp805_config }, 246 { NULL } 247 }; 248 249 static int 250 axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags) 251 { 252 return iic_smbus_read_byte(tag, addr, reg, val, flags); 253 } 254 255 static int 256 axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags) 257 { 258 return iic_smbus_write_byte(tag, addr, reg, val, flags); 259 } 260 261 static int 262 axppmic_set_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int min, u_int max) 263 { 264 const int flags = (cold ? I2C_F_POLL : 0); 265 u_int vol, reg_val; 266 int nstep, error; 267 uint8_t val; 268 269 if (!c->c_voltage_mask) 270 return EINVAL; 271 272 if (min < c->c_min || min > c->c_max) 273 return EINVAL; 274 275 reg_val = 0; 276 nstep = 1; 277 vol = c->c_min; 278 279 for (nstep = 0; nstep < c->c_step1cnt && vol < min; nstep++) { 280 ++reg_val; 281 vol += c->c_step1; 282 } 283 for (nstep = 0; nstep < c->c_step2cnt && vol < min; nstep++) { 284 ++reg_val; 285 vol += c->c_step2; 286 } 287 288 if (vol > max) 289 return EINVAL; 290 291 iic_acquire_bus(tag, flags); 292 if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags)) == 0) { 293 val &= ~c->c_voltage_mask; 294 val |= __SHIFTIN(reg_val, c->c_voltage_mask); 295 error = axppmic_write(tag, addr, c->c_voltage_reg, val, flags); 296 } 297 iic_release_bus(tag, flags); 298 299 return error; 300 } 301 302 static int 303 axppmic_get_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int *pvol) 304 { 305 const int flags = (cold ? I2C_F_POLL : 0); 306 int reg_val, error; 307 uint8_t val; 308 309 if (!c->c_voltage_mask) 310 return EINVAL; 311 312 iic_acquire_bus(tag, flags); 313 error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags); 314 iic_release_bus(tag, flags); 315 if (error) 316 return error; 317 318 reg_val = __SHIFTOUT(val, c->c_voltage_mask); 319 if (reg_val < c->c_step1cnt) { 320 *pvol = c->c_min + reg_val * c->c_step1; 321 } else { 322 *pvol = c->c_min + (c->c_step1cnt * c->c_step1) + 323 ((reg_val - c->c_step1cnt) * c->c_step2); 324 } 325 326 return 0; 327 } 328 329 static void 330 axppmic_power_poweroff(device_t dev) 331 { 332 struct axppmic_softc *sc = device_private(dev); 333 334 delay(1000000); 335 336 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 337 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_POWER_DISABLE_REG, AXP_POWER_DISABLE_CTRL, I2C_F_POLL); 338 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 339 } 340 341 static struct fdtbus_power_controller_func axppmic_power_funcs = { 342 .poweroff = axppmic_power_poweroff, 343 }; 344 345 static void 346 axppmic_task_shut(void *priv) 347 { 348 struct axppmic_softc *sc = priv; 349 350 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 351 } 352 353 static int 354 axppmic_intr(void *priv) 355 { 356 struct axppmic_softc *sc = priv; 357 const int flags = I2C_F_POLL; 358 uint8_t stat; 359 360 iic_acquire_bus(sc->sc_i2c, flags); 361 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(2), &stat, flags) == 0) { 362 if (stat & AXP_IRQ2_POKSIRQ) 363 sysmon_task_queue_sched(0, axppmic_task_shut, sc); 364 365 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(2), stat, flags); 366 } 367 iic_release_bus(sc->sc_i2c, flags); 368 369 return 1; 370 } 371 372 static void 373 axppmic_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *e) 374 { 375 struct axppmic_softc *sc = sme->sme_cookie; 376 const int flags = I2C_F_POLL; 377 uint8_t val, warn_val; 378 379 e->state = ENVSYS_SINVALID; 380 381 iic_acquire_bus(sc->sc_i2c, flags); 382 switch (e->private) { 383 case AXP_SENSOR_ACIN_PRESENT: 384 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 385 e->state = ENVSYS_SVALID; 386 e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT); 387 } 388 break; 389 case AXP_SENSOR_VBUS_PRESENT: 390 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 391 e->state = ENVSYS_SVALID; 392 e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT); 393 } 394 break; 395 case AXP_SENSOR_BATT_PRESENT: 396 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 397 if (val & AXP_POWER_MODE_BATT_VALID) { 398 e->state = ENVSYS_SVALID; 399 e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT); 400 } 401 } 402 break; 403 case AXP_SENSOR_BATT_CHARGING: 404 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 405 e->state = ENVSYS_SVALID; 406 e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING); 407 } 408 break; 409 case AXP_SENSOR_BATT_CHARGE_STATE: 410 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 && 411 (val & AXP_POWER_MODE_BATT_VALID) != 0 && 412 (val & AXP_POWER_MODE_BATT_PRESENT) != 0 && 413 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 414 (val & AXP_BATT_CAP_VALID) != 0 && 415 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &warn_val, flags) == 0) { 416 const u_int warn_thres = __SHIFTOUT(warn_val, AXP_BATT_CAP_WARN_LV1) + 5; 417 const u_int shut_thres = __SHIFTOUT(warn_val, AXP_BATT_CAP_WARN_LV2); 418 419 const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 420 if (batt_val <= shut_thres) { 421 e->state = ENVSYS_SCRITICAL; 422 e->value_cur = ENVSYS_BATTERY_CAPACITY_CRITICAL; 423 } else if (batt_val <= warn_thres) { 424 e->state = ENVSYS_SWARNUNDER; 425 e->value_cur = ENVSYS_BATTERY_CAPACITY_WARNING; 426 } else { 427 e->state = ENVSYS_SVALID; 428 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 429 } 430 } 431 break; 432 case AXP_SENSOR_BATT_CAPACITY: 433 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 && 434 (val & AXP_POWER_MODE_BATT_VALID) != 0 && 435 (val & AXP_POWER_MODE_BATT_PRESENT) != 0 && 436 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 437 (val & AXP_BATT_CAP_VALID) != 0) { 438 e->state = ENVSYS_SVALID; 439 e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 440 } 441 break; 442 } 443 iic_release_bus(sc->sc_i2c, flags); 444 } 445 446 static void 447 axppmic_attach_acadapter(struct axppmic_softc *sc) 448 { 449 envsys_data_t *e; 450 451 e = &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]; 452 e->private = AXP_SENSOR_ACIN_PRESENT; 453 e->units = ENVSYS_INDICATOR; 454 e->state = ENVSYS_SINVALID; 455 strlcpy(e->desc, "ACIN present", sizeof(e->desc)); 456 sysmon_envsys_sensor_attach(sc->sc_sme, e); 457 458 e = &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]; 459 e->private = AXP_SENSOR_VBUS_PRESENT; 460 e->units = ENVSYS_INDICATOR; 461 e->state = ENVSYS_SINVALID; 462 strlcpy(e->desc, "VBUS present", sizeof(e->desc)); 463 sysmon_envsys_sensor_attach(sc->sc_sme, e); 464 } 465 466 static void 467 axppmic_attach_battery(struct axppmic_softc *sc) 468 { 469 envsys_data_t *e; 470 471 e = &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]; 472 e->private = AXP_SENSOR_BATT_PRESENT; 473 e->units = ENVSYS_INDICATOR; 474 e->state = ENVSYS_SINVALID; 475 strlcpy(e->desc, "battery present", sizeof(e->desc)); 476 sysmon_envsys_sensor_attach(sc->sc_sme, e); 477 478 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]; 479 e->private = AXP_SENSOR_BATT_CHARGING; 480 e->units = ENVSYS_BATTERY_CHARGE; 481 e->state = ENVSYS_SINVALID; 482 strlcpy(e->desc, "charging", sizeof(e->desc)); 483 sysmon_envsys_sensor_attach(sc->sc_sme, e); 484 485 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]; 486 e->private = AXP_SENSOR_BATT_CHARGE_STATE; 487 e->units = ENVSYS_BATTERY_CAPACITY; 488 e->flags = ENVSYS_FMONSTCHANGED; 489 e->state = ENVSYS_SVALID; 490 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 491 strlcpy(e->desc, "charge state", sizeof(e->desc)); 492 sysmon_envsys_sensor_attach(sc->sc_sme, e); 493 494 if (sc->sc_has_fuel_gauge) { 495 e = &sc->sc_sensor[AXP_SENSOR_BATT_CAPACITY]; 496 e->private = AXP_SENSOR_BATT_CAPACITY; 497 e->units = ENVSYS_INTEGER; 498 e->state = ENVSYS_SINVALID; 499 e->flags = ENVSYS_FPERCENT; 500 strlcpy(e->desc, "battery percent", sizeof(e->desc)); 501 sysmon_envsys_sensor_attach(sc->sc_sme, e); 502 } 503 } 504 505 static void 506 axppmic_attach_sensors(struct axppmic_softc *sc) 507 { 508 if (sc->sc_has_battery) { 509 sc->sc_sme = sysmon_envsys_create(); 510 sc->sc_sme->sme_name = device_xname(sc->sc_dev); 511 sc->sc_sme->sme_cookie = sc; 512 sc->sc_sme->sme_refresh = axppmic_sensor_refresh; 513 sc->sc_sme->sme_class = SME_CLASS_BATTERY; 514 sc->sc_sme->sme_flags = SME_POLL_ONLY | SME_INIT_REFRESH; 515 516 axppmic_attach_acadapter(sc); 517 axppmic_attach_battery(sc); 518 519 sysmon_envsys_register(sc->sc_sme); 520 } 521 } 522 523 524 static int 525 axppmic_match(device_t parent, cfdata_t match, void *aux) 526 { 527 struct i2c_attach_args *ia = aux; 528 529 if (ia->ia_name != NULL) { 530 if (ia->ia_cookie) 531 return of_match_compat_data(ia->ia_cookie, compat_data); 532 else 533 return 0; 534 } 535 536 return 1; 537 } 538 539 static void 540 axppmic_attach(device_t parent, device_t self, void *aux) 541 { 542 struct axppmic_softc *sc = device_private(self); 543 const struct axppmic_config *c; 544 struct axpreg_attach_args aaa; 545 struct i2c_attach_args *ia = aux; 546 int phandle, child, i; 547 uint32_t irq_mask; 548 void *ih; 549 550 c = (void *)of_search_compatible(ia->ia_cookie, compat_data)->data; 551 552 sc->sc_dev = self; 553 sc->sc_i2c = ia->ia_tag; 554 sc->sc_addr = ia->ia_addr; 555 sc->sc_phandle = ia->ia_cookie; 556 sc->sc_has_battery = c->has_battery; 557 sc->sc_has_fuel_gauge = c->has_fuel_gauge; 558 559 aprint_naive("\n"); 560 aprint_normal(": %s\n", c->name); 561 562 sc->sc_smpsw.smpsw_name = device_xname(self); 563 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_POWER; 564 sysmon_pswitch_register(&sc->sc_smpsw); 565 566 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 567 for (i = 1; i <= c->irq_regs; i++) { 568 irq_mask = 0; 569 if (i == 2) 570 irq_mask |= AXP_IRQ2_POKSIRQ; 571 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_ENABLE_REG(i), irq_mask, I2C_F_POLL); 572 } 573 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 574 575 ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, FDT_INTR_MPSAFE, 576 axppmic_intr, sc); 577 if (ih == NULL) { 578 aprint_error_dev(self, "WARNING: couldn't establish interrupt handler\n"); 579 } 580 581 fdtbus_register_power_controller(sc->sc_dev, sc->sc_phandle, 582 &axppmic_power_funcs); 583 584 phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators"); 585 if (phandle > 0) { 586 aaa.reg_i2c = sc->sc_i2c; 587 aaa.reg_addr = sc->sc_addr; 588 for (i = 0; i < c->ncontrols; i++) { 589 const struct axppmic_ctrl *ctrl = &c->controls[i]; 590 child = of_find_firstchild_byname(phandle, ctrl->c_name); 591 if (child <= 0) 592 continue; 593 aaa.reg_ctrl = ctrl; 594 aaa.reg_phandle = child; 595 config_found(sc->sc_dev, &aaa, NULL); 596 } 597 } 598 599 if (c->has_battery) 600 axppmic_attach_sensors(sc); 601 } 602 603 static int 604 axpreg_acquire(device_t dev) 605 { 606 return 0; 607 } 608 609 static void 610 axpreg_release(device_t dev) 611 { 612 } 613 614 static int 615 axpreg_enable(device_t dev, bool enable) 616 { 617 struct axpreg_softc *sc = device_private(dev); 618 const struct axppmic_ctrl *c = sc->sc_ctrl; 619 const int flags = (cold ? I2C_F_POLL : 0); 620 uint8_t val; 621 int error; 622 623 if (!c->c_enable_mask) 624 return EINVAL; 625 626 iic_acquire_bus(sc->sc_i2c, flags); 627 if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) { 628 if (enable) 629 val |= c->c_enable_mask; 630 else 631 val &= ~c->c_enable_mask; 632 error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags); 633 } 634 iic_release_bus(sc->sc_i2c, flags); 635 636 return error; 637 } 638 639 static int 640 axpreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol) 641 { 642 struct axpreg_softc *sc = device_private(dev); 643 const struct axppmic_ctrl *c = sc->sc_ctrl; 644 645 return axppmic_set_voltage(sc->sc_i2c, sc->sc_addr, c, 646 min_uvol / 1000, max_uvol / 1000); 647 } 648 649 static int 650 axpreg_get_voltage(device_t dev, u_int *puvol) 651 { 652 struct axpreg_softc *sc = device_private(dev); 653 const struct axppmic_ctrl *c = sc->sc_ctrl; 654 int error; 655 u_int vol; 656 657 error = axppmic_get_voltage(sc->sc_i2c, sc->sc_addr, c, &vol); 658 if (error) 659 return error; 660 661 *puvol = vol * 1000; 662 return 0; 663 } 664 665 static struct fdtbus_regulator_controller_func axpreg_funcs = { 666 .acquire = axpreg_acquire, 667 .release = axpreg_release, 668 .enable = axpreg_enable, 669 .set_voltage = axpreg_set_voltage, 670 .get_voltage = axpreg_get_voltage, 671 }; 672 673 static int 674 axpreg_match(device_t parent, cfdata_t match, void *aux) 675 { 676 return 1; 677 } 678 679 static void 680 axpreg_attach(device_t parent, device_t self, void *aux) 681 { 682 struct axpreg_softc *sc = device_private(self); 683 struct axpreg_attach_args *aaa = aux; 684 const int phandle = aaa->reg_phandle; 685 const char *name; 686 687 sc->sc_dev = self; 688 sc->sc_i2c = aaa->reg_i2c; 689 sc->sc_addr = aaa->reg_addr; 690 sc->sc_ctrl = aaa->reg_ctrl; 691 692 fdtbus_register_regulator_controller(self, phandle, 693 &axpreg_funcs); 694 695 aprint_naive("\n"); 696 name = fdtbus_get_string(phandle, "regulator-name"); 697 if (name) 698 aprint_normal(": %s\n", name); 699 else 700 aprint_normal("\n"); 701 } 702 703 CFATTACH_DECL_NEW(axppmic, sizeof(struct axppmic_softc), 704 axppmic_match, axppmic_attach, NULL, NULL); 705 706 CFATTACH_DECL_NEW(axpreg, sizeof(struct axpreg_softc), 707 axpreg_match, axpreg_attach, NULL, NULL); 708
Indexes created Fri Oct 03 02:09:57 GMT 2025