axppmic.c revision 1.4
1 /* $NetBSD: axppmic.c,v 1.4 2018/05/05 10:56:40 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2014-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: axppmic.c,v 1.4 2018/05/05 10:56:40 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 40 #include <dev/i2c/i2cvar.h> 41 42 #include <dev/sysmon/sysmonvar.h> 43 #include <dev/sysmon/sysmon_taskq.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #define AXP_POWER_SOURCE_REG 0x00 48 #define AXP_POWER_SOURCE_ACIN_PRESENT __BIT(7) 49 #define AXP_POWER_SOURCE_VBUS_PRESENT __BIT(5) 50 51 #define AXP_POWER_MODE_REG 0x01 52 #define AXP_POWER_MODE_BATT_VALID __BIT(4) 53 #define AXP_POWER_MODE_BATT_PRESENT __BIT(5) 54 #define AXP_POWER_MODE_BATT_CHARGING __BIT(6) 55 56 #define AXP_POWER_DISABLE_REG 0x32 57 #define AXP_POWER_DISABLE_CTRL __BIT(7) 58 59 #define AXP_IRQ_ENABLE_REG(n) (0x40 + (n) - 1) 60 #define AXP_IRQ2_POKSIRQ __BIT(1) 61 #define AXP_IRQ_STATUS_REG(n) (0x48 + (n) - 1) 62 63 #define AXP_FUEL_GAUGE_CTRL_REG 0xb8 64 #define AXP_FUEL_GAUGE_CTRL_EN __BIT(7) 65 #define AXP_BATT_CAP_REG 0xb9 66 #define AXP_BATT_CAP_VALID __BIT(7) 67 #define AXP_BATT_CAP_PERCENT __BITS(6,0) 68 69 #define AXP_BATT_CAP_WARN_REG 0xe6 70 #define AXP_BATT_CAP_WARN_LV1 __BITS(7,4) 71 #define AXP_BATT_CAP_WARN_LV2 __BITS(3,0) 72 73 struct axppmic_ctrl { 74 device_t c_dev; 75 76 const char * c_name; 77 u_int c_min; 78 u_int c_max; 79 u_int c_step1; 80 u_int c_step1cnt; 81 u_int c_step2; 82 u_int c_step2cnt; 83 84 uint8_t c_enable_reg; 85 uint8_t c_enable_mask; 86 87 uint8_t c_voltage_reg; 88 uint8_t c_voltage_mask; 89 }; 90 91 #define AXP_CTRL(name, min, max, step, ereg, emask, vreg, vmask) \ 92 { .c_name = (name), .c_min = (min), .c_max = (max), \ 93 .c_step1 = (step), .c_step1cnt = (((max) - (min)) / (step)) + 1, \ 94 .c_step2 = 0, .c_step2cnt = 0, \ 95 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 96 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 97 98 #define AXP_CTRL2(name, min, max, step1, step1cnt, step2, step2cnt, ereg, emask, vreg, vmask) \ 99 { .c_name = (name), .c_min = (min), .c_max = (max), \ 100 .c_step1 = (step1), .c_step1cnt = (step1cnt), \ 101 .c_step2 = (step2), .c_step2cnt = (step2cnt), \ 102 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 103 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 104 105 static const struct axppmic_ctrl axp803_ctrls[] = { 106 AXP_CTRL("dldo1", 700, 3300, 100, 107 0x12, __BIT(3), 0x15, __BITS(4,0)), 108 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 109 0x12, __BIT(4), 0x16, __BITS(4,0)), 110 AXP_CTRL("dldo3", 700, 3300, 100, 111 0x12, __BIT(5), 0x17, __BITS(4,0)), 112 AXP_CTRL("dldo4", 700, 3300, 100, 113 0x12, __BIT(6), 0x18, __BITS(4,0)), 114 AXP_CTRL("eldo1", 700, 1900, 50, 115 0x12, __BIT(0), 0x19, __BITS(4,0)), 116 AXP_CTRL("eldo2", 700, 1900, 50, 117 0x12, __BIT(1), 0x1a, __BITS(4,0)), 118 AXP_CTRL("eldo3", 700, 1900, 50, 119 0x12, __BIT(2), 0x1b, __BITS(4,0)), 120 AXP_CTRL("fldo1", 700, 1450, 50, 121 0x13, __BIT(2), 0x1c, __BITS(3,0)), 122 AXP_CTRL("fldo2", 700, 1450, 50, 123 0x13, __BIT(3), 0x1d, __BITS(3,0)), 124 AXP_CTRL("dcdc1", 1600, 3400, 100, 125 0x10, __BIT(0), 0x20, __BITS(4,0)), 126 AXP_CTRL2("dcdc2", 500, 1300, 10, 71, 20, 5, 127 0x10, __BIT(1), 0x21, __BITS(6,0)), 128 AXP_CTRL2("dcdc3", 500, 1300, 10, 71, 20, 5, 129 0x10, __BIT(2), 0x22, __BITS(6,0)), 130 AXP_CTRL2("dcdc4", 500, 1300, 10, 71, 20, 5, 131 0x10, __BIT(3), 0x23, __BITS(6,0)), 132 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 133 0x10, __BIT(4), 0x24, __BITS(6,0)), 134 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 135 0x10, __BIT(5), 0x25, __BITS(6,0)), 136 AXP_CTRL("aldo1", 700, 3300, 100, 137 0x13, __BIT(5), 0x28, __BITS(4,0)), 138 AXP_CTRL("aldo2", 700, 3300, 100, 139 0x13, __BIT(6), 0x29, __BITS(4,0)), 140 AXP_CTRL("aldo3", 700, 3300, 100, 141 0x13, __BIT(7), 0x2a, __BITS(4,0)), 142 }; 143 144 static const struct axppmic_ctrl axp805_ctrls[] = { 145 AXP_CTRL2("dcdca", 600, 1520, 10, 51, 20, 21, 146 0x10, __BIT(0), 0x12, __BITS(6,0)), 147 AXP_CTRL("dcdcb", 1000, 2550, 50, 148 0x10, __BIT(1), 0x13, __BITS(4,0)), 149 AXP_CTRL2("dcdcc", 600, 1520, 10, 51, 20, 21, 150 0x10, __BIT(2), 0x14, __BITS(6,0)), 151 AXP_CTRL2("dcdcd", 600, 3300, 20, 46, 100, 18, 152 0x10, __BIT(3), 0x15, __BITS(5,0)), 153 AXP_CTRL("dcdce", 1100, 3400, 100, 154 0x10, __BIT(4), 0x16, __BITS(4,0)), 155 AXP_CTRL("aldo1", 700, 3300, 100, 156 0x10, __BIT(5), 0x17, __BITS(4,0)), 157 AXP_CTRL("aldo2", 700, 3400, 100, 158 0x10, __BIT(6), 0x18, __BITS(4,0)), 159 AXP_CTRL("aldo3", 700, 3300, 100, 160 0x10, __BIT(7), 0x19, __BITS(4,0)), 161 AXP_CTRL("bldo1", 700, 1900, 100, 162 0x11, __BIT(0), 0x20, __BITS(3,0)), 163 AXP_CTRL("bldo2", 700, 1900, 100, 164 0x11, __BIT(1), 0x21, __BITS(3,0)), 165 AXP_CTRL("bldo3", 700, 1900, 100, 166 0x11, __BIT(2), 0x22, __BITS(3,0)), 167 AXP_CTRL("bldo4", 700, 1900, 100, 168 0x11, __BIT(3), 0x23, __BITS(3,0)), 169 AXP_CTRL("cldo1", 700, 3300, 100, 170 0x11, __BIT(4), 0x24, __BITS(4,0)), 171 AXP_CTRL2("cldo2", 700, 4200, 100, 28, 200, 4, 172 0x11, __BIT(5), 0x25, __BITS(4,0)), 173 AXP_CTRL("cldo3", 700, 3300, 100, 174 0x11, __BIT(6), 0x26, __BITS(4,0)), 175 }; 176 177 struct axppmic_config { 178 const char *name; 179 const struct axppmic_ctrl *controls; 180 u_int ncontrols; 181 u_int irq_regs; 182 bool has_battery; 183 bool has_fuel_gauge; 184 }; 185 186 enum axppmic_sensor { 187 AXP_SENSOR_ACIN_PRESENT, 188 AXP_SENSOR_VBUS_PRESENT, 189 AXP_SENSOR_BATT_PRESENT, 190 AXP_SENSOR_BATT_CHARGING, 191 AXP_SENSOR_BATT_CHARGE_STATE, 192 AXP_SENSOR_BATT_CAPACITY, 193 AXP_NSENSORS 194 }; 195 196 struct axppmic_softc { 197 device_t sc_dev; 198 i2c_tag_t sc_i2c; 199 i2c_addr_t sc_addr; 200 int sc_phandle; 201 202 bool sc_has_battery; 203 bool sc_has_fuel_gauge; 204 205 struct sysmon_pswitch sc_smpsw; 206 207 struct sysmon_envsys *sc_sme; 208 209 envsys_data_t sc_sensor[AXP_NSENSORS]; 210 211 u_int sc_warn_thres; 212 u_int sc_shut_thres; 213 }; 214 215 struct axpreg_softc { 216 device_t sc_dev; 217 i2c_tag_t sc_i2c; 218 i2c_addr_t sc_addr; 219 const struct axppmic_ctrl *sc_ctrl; 220 }; 221 222 struct axpreg_attach_args { 223 const struct axppmic_ctrl *reg_ctrl; 224 int reg_phandle; 225 i2c_tag_t reg_i2c; 226 i2c_addr_t reg_addr; 227 }; 228 229 static const struct axppmic_config axp803_config = { 230 .name = "AXP803", 231 .controls = axp803_ctrls, 232 .ncontrols = __arraycount(axp803_ctrls), 233 .irq_regs = 6, 234 .has_battery = true, 235 .has_fuel_gauge = true, 236 }; 237 238 static const struct axppmic_config axp805_config = { 239 .name = "AXP805/806", 240 .controls = axp805_ctrls, 241 .ncontrols = __arraycount(axp805_ctrls), 242 .irq_regs = 2, 243 }; 244 245 static const struct of_compat_data compat_data[] = { 246 { "x-powers,axp803", (uintptr_t)&axp803_config }, 247 { "x-powers,axp805", (uintptr_t)&axp805_config }, 248 { "x-powers,axp806", (uintptr_t)&axp805_config }, 249 { NULL } 250 }; 251 252 static int 253 axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags) 254 { 255 return iic_smbus_read_byte(tag, addr, reg, val, flags); 256 } 257 258 static int 259 axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags) 260 { 261 return iic_smbus_write_byte(tag, addr, reg, val, flags); 262 } 263 264 static int 265 axppmic_set_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int min, u_int max) 266 { 267 const int flags = (cold ? I2C_F_POLL : 0); 268 u_int vol, reg_val; 269 int nstep, error; 270 uint8_t val; 271 272 if (!c->c_voltage_mask) 273 return EINVAL; 274 275 if (min < c->c_min || min > c->c_max) 276 return EINVAL; 277 278 reg_val = 0; 279 nstep = 1; 280 vol = c->c_min; 281 282 for (nstep = 0; nstep < c->c_step1cnt && vol < min; nstep++) { 283 ++reg_val; 284 vol += c->c_step1; 285 } 286 for (nstep = 0; nstep < c->c_step2cnt && vol < min; nstep++) { 287 ++reg_val; 288 vol += c->c_step2; 289 } 290 291 if (vol > max) 292 return EINVAL; 293 294 iic_acquire_bus(tag, flags); 295 if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags)) == 0) { 296 val &= ~c->c_voltage_mask; 297 val |= __SHIFTIN(reg_val, c->c_voltage_mask); 298 error = axppmic_write(tag, addr, c->c_voltage_reg, val, flags); 299 } 300 iic_release_bus(tag, flags); 301 302 return error; 303 } 304 305 static int 306 axppmic_get_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int *pvol) 307 { 308 const int flags = (cold ? I2C_F_POLL : 0); 309 int reg_val, error; 310 uint8_t val; 311 312 if (!c->c_voltage_mask) 313 return EINVAL; 314 315 iic_acquire_bus(tag, flags); 316 error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags); 317 iic_release_bus(tag, flags); 318 if (error) 319 return error; 320 321 reg_val = __SHIFTOUT(val, c->c_voltage_mask); 322 if (reg_val < c->c_step1cnt) { 323 *pvol = c->c_min + reg_val * c->c_step1; 324 } else { 325 *pvol = c->c_min + (c->c_step1cnt * c->c_step1) + 326 ((reg_val - c->c_step1cnt) * c->c_step2); 327 } 328 329 return 0; 330 } 331 332 static void 333 axppmic_power_poweroff(device_t dev) 334 { 335 struct axppmic_softc *sc = device_private(dev); 336 337 delay(1000000); 338 339 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 340 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_POWER_DISABLE_REG, AXP_POWER_DISABLE_CTRL, I2C_F_POLL); 341 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 342 } 343 344 static struct fdtbus_power_controller_func axppmic_power_funcs = { 345 .poweroff = axppmic_power_poweroff, 346 }; 347 348 static void 349 axppmic_task_shut(void *priv) 350 { 351 struct axppmic_softc *sc = priv; 352 353 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 354 } 355 356 static int 357 axppmic_intr(void *priv) 358 { 359 struct axppmic_softc *sc = priv; 360 const int flags = I2C_F_POLL; 361 uint8_t stat; 362 363 iic_acquire_bus(sc->sc_i2c, flags); 364 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(2), &stat, flags) == 0) { 365 if (stat & AXP_IRQ2_POKSIRQ) 366 sysmon_task_queue_sched(0, axppmic_task_shut, sc); 367 368 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(2), stat, flags); 369 } 370 iic_release_bus(sc->sc_i2c, flags); 371 372 return 1; 373 } 374 375 static void 376 axppmic_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *e) 377 { 378 struct axppmic_softc *sc = sme->sme_cookie; 379 const int flags = I2C_F_POLL; 380 uint8_t val; 381 382 e->state = ENVSYS_SINVALID; 383 384 iic_acquire_bus(sc->sc_i2c, flags); 385 switch (e->private) { 386 case AXP_SENSOR_ACIN_PRESENT: 387 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 388 e->state = ENVSYS_SVALID; 389 e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT); 390 } 391 break; 392 case AXP_SENSOR_VBUS_PRESENT: 393 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 394 e->state = ENVSYS_SVALID; 395 e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT); 396 } 397 break; 398 case AXP_SENSOR_BATT_PRESENT: 399 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 400 if (val & AXP_POWER_MODE_BATT_VALID) { 401 e->state = ENVSYS_SVALID; 402 e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT); 403 } 404 } 405 break; 406 case AXP_SENSOR_BATT_CHARGING: 407 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 408 e->state = ENVSYS_SVALID; 409 e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING); 410 } 411 break; 412 case AXP_SENSOR_BATT_CHARGE_STATE: 413 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 && 414 (val & AXP_POWER_MODE_BATT_VALID) != 0 && 415 (val & AXP_POWER_MODE_BATT_PRESENT) != 0 && 416 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 417 (val & AXP_BATT_CAP_VALID) != 0) { 418 const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 419 if (batt_val <= sc->sc_shut_thres) { 420 e->state = ENVSYS_SCRITICAL; 421 e->value_cur = ENVSYS_BATTERY_CAPACITY_CRITICAL; 422 } else if (batt_val <= sc->sc_warn_thres) { 423 e->state = ENVSYS_SWARNUNDER; 424 e->value_cur = ENVSYS_BATTERY_CAPACITY_WARNING; 425 } else { 426 e->state = ENVSYS_SVALID; 427 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 428 } 429 } 430 break; 431 case AXP_SENSOR_BATT_CAPACITY: 432 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 && 433 (val & AXP_POWER_MODE_BATT_VALID) != 0 && 434 (val & AXP_POWER_MODE_BATT_PRESENT) != 0 && 435 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 436 (val & AXP_BATT_CAP_VALID) != 0) { 437 e->state = ENVSYS_SVALID; 438 e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 439 } 440 break; 441 } 442 iic_release_bus(sc->sc_i2c, flags); 443 } 444 445 static void 446 axppmic_attach_acadapter(struct axppmic_softc *sc) 447 { 448 envsys_data_t *e; 449 450 e = &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]; 451 e->private = AXP_SENSOR_ACIN_PRESENT; 452 e->units = ENVSYS_INDICATOR; 453 e->state = ENVSYS_SINVALID; 454 strlcpy(e->desc, "ACIN present", sizeof(e->desc)); 455 sysmon_envsys_sensor_attach(sc->sc_sme, e); 456 457 e = &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]; 458 e->private = AXP_SENSOR_VBUS_PRESENT; 459 e->units = ENVSYS_INDICATOR; 460 e->state = ENVSYS_SINVALID; 461 strlcpy(e->desc, "VBUS present", sizeof(e->desc)); 462 sysmon_envsys_sensor_attach(sc->sc_sme, e); 463 } 464 465 static void 466 axppmic_attach_battery(struct axppmic_softc *sc) 467 { 468 envsys_data_t *e; 469 uint8_t val; 470 471 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 472 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &val, I2C_F_POLL) == 0) { 473 sc->sc_warn_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV1) + 5; 474 sc->sc_shut_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV2); 475 } 476 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 477 478 e = &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]; 479 e->private = AXP_SENSOR_BATT_PRESENT; 480 e->units = ENVSYS_INDICATOR; 481 e->state = ENVSYS_SINVALID; 482 strlcpy(e->desc, "battery present", sizeof(e->desc)); 483 sysmon_envsys_sensor_attach(sc->sc_sme, e); 484 485 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]; 486 e->private = AXP_SENSOR_BATT_CHARGING; 487 e->units = ENVSYS_BATTERY_CHARGE; 488 e->state = ENVSYS_SINVALID; 489 strlcpy(e->desc, "charging", sizeof(e->desc)); 490 sysmon_envsys_sensor_attach(sc->sc_sme, e); 491 492 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]; 493 e->private = AXP_SENSOR_BATT_CHARGE_STATE; 494 e->units = ENVSYS_BATTERY_CAPACITY; 495 e->flags = ENVSYS_FMONSTCHANGED; 496 e->state = ENVSYS_SVALID; 497 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 498 strlcpy(e->desc, "charge state", sizeof(e->desc)); 499 sysmon_envsys_sensor_attach(sc->sc_sme, e); 500 501 if (sc->sc_has_fuel_gauge) { 502 e = &sc->sc_sensor[AXP_SENSOR_BATT_CAPACITY]; 503 e->private = AXP_SENSOR_BATT_CAPACITY; 504 e->units = ENVSYS_INTEGER; 505 e->state = ENVSYS_SINVALID; 506 e->flags = ENVSYS_FPERCENT; 507 strlcpy(e->desc, "battery percent", sizeof(e->desc)); 508 sysmon_envsys_sensor_attach(sc->sc_sme, e); 509 } 510 } 511 512 static void 513 axppmic_attach_sensors(struct axppmic_softc *sc) 514 { 515 if (sc->sc_has_battery) { 516 sc->sc_sme = sysmon_envsys_create(); 517 sc->sc_sme->sme_name = device_xname(sc->sc_dev); 518 sc->sc_sme->sme_cookie = sc; 519 sc->sc_sme->sme_refresh = axppmic_sensor_refresh; 520 sc->sc_sme->sme_class = SME_CLASS_BATTERY; 521 sc->sc_sme->sme_flags = SME_POLL_ONLY | SME_INIT_REFRESH; 522 523 axppmic_attach_acadapter(sc); 524 axppmic_attach_battery(sc); 525 526 sysmon_envsys_register(sc->sc_sme); 527 } 528 } 529 530 531 static int 532 axppmic_match(device_t parent, cfdata_t match, void *aux) 533 { 534 struct i2c_attach_args *ia = aux; 535 536 if (ia->ia_name != NULL) { 537 if (ia->ia_cookie) 538 return of_match_compat_data(ia->ia_cookie, compat_data); 539 else 540 return 0; 541 } 542 543 return 1; 544 } 545 546 static void 547 axppmic_attach(device_t parent, device_t self, void *aux) 548 { 549 struct axppmic_softc *sc = device_private(self); 550 const struct axppmic_config *c; 551 struct axpreg_attach_args aaa; 552 struct i2c_attach_args *ia = aux; 553 int phandle, child, i; 554 uint32_t irq_mask; 555 void *ih; 556 557 c = (void *)of_search_compatible(ia->ia_cookie, compat_data)->data; 558 559 sc->sc_dev = self; 560 sc->sc_i2c = ia->ia_tag; 561 sc->sc_addr = ia->ia_addr; 562 sc->sc_phandle = ia->ia_cookie; 563 sc->sc_has_battery = c->has_battery; 564 sc->sc_has_fuel_gauge = c->has_fuel_gauge; 565 566 aprint_naive("\n"); 567 aprint_normal(": %s\n", c->name); 568 569 sc->sc_smpsw.smpsw_name = device_xname(self); 570 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_POWER; 571 sysmon_pswitch_register(&sc->sc_smpsw); 572 573 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 574 for (i = 1; i <= c->irq_regs; i++) { 575 irq_mask = 0; 576 if (i == 2) 577 irq_mask |= AXP_IRQ2_POKSIRQ; 578 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_ENABLE_REG(i), irq_mask, I2C_F_POLL); 579 } 580 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 581 582 ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, FDT_INTR_MPSAFE, 583 axppmic_intr, sc); 584 if (ih == NULL) { 585 aprint_error_dev(self, "WARNING: couldn't establish interrupt handler\n"); 586 } 587 588 fdtbus_register_power_controller(sc->sc_dev, sc->sc_phandle, 589 &axppmic_power_funcs); 590 591 phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators"); 592 if (phandle > 0) { 593 aaa.reg_i2c = sc->sc_i2c; 594 aaa.reg_addr = sc->sc_addr; 595 for (i = 0; i < c->ncontrols; i++) { 596 const struct axppmic_ctrl *ctrl = &c->controls[i]; 597 child = of_find_firstchild_byname(phandle, ctrl->c_name); 598 if (child <= 0) 599 continue; 600 aaa.reg_ctrl = ctrl; 601 aaa.reg_phandle = child; 602 config_found(sc->sc_dev, &aaa, NULL); 603 } 604 } 605 606 if (c->has_battery) 607 axppmic_attach_sensors(sc); 608 } 609 610 static int 611 axpreg_acquire(device_t dev) 612 { 613 return 0; 614 } 615 616 static void 617 axpreg_release(device_t dev) 618 { 619 } 620 621 static int 622 axpreg_enable(device_t dev, bool enable) 623 { 624 struct axpreg_softc *sc = device_private(dev); 625 const struct axppmic_ctrl *c = sc->sc_ctrl; 626 const int flags = (cold ? I2C_F_POLL : 0); 627 uint8_t val; 628 int error; 629 630 if (!c->c_enable_mask) 631 return EINVAL; 632 633 iic_acquire_bus(sc->sc_i2c, flags); 634 if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) { 635 if (enable) 636 val |= c->c_enable_mask; 637 else 638 val &= ~c->c_enable_mask; 639 error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags); 640 } 641 iic_release_bus(sc->sc_i2c, flags); 642 643 return error; 644 } 645 646 static int 647 axpreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol) 648 { 649 struct axpreg_softc *sc = device_private(dev); 650 const struct axppmic_ctrl *c = sc->sc_ctrl; 651 652 return axppmic_set_voltage(sc->sc_i2c, sc->sc_addr, c, 653 min_uvol / 1000, max_uvol / 1000); 654 } 655 656 static int 657 axpreg_get_voltage(device_t dev, u_int *puvol) 658 { 659 struct axpreg_softc *sc = device_private(dev); 660 const struct axppmic_ctrl *c = sc->sc_ctrl; 661 int error; 662 u_int vol; 663 664 error = axppmic_get_voltage(sc->sc_i2c, sc->sc_addr, c, &vol); 665 if (error) 666 return error; 667 668 *puvol = vol * 1000; 669 return 0; 670 } 671 672 static struct fdtbus_regulator_controller_func axpreg_funcs = { 673 .acquire = axpreg_acquire, 674 .release = axpreg_release, 675 .enable = axpreg_enable, 676 .set_voltage = axpreg_set_voltage, 677 .get_voltage = axpreg_get_voltage, 678 }; 679 680 static int 681 axpreg_match(device_t parent, cfdata_t match, void *aux) 682 { 683 return 1; 684 } 685 686 static void 687 axpreg_attach(device_t parent, device_t self, void *aux) 688 { 689 struct axpreg_softc *sc = device_private(self); 690 struct axpreg_attach_args *aaa = aux; 691 const int phandle = aaa->reg_phandle; 692 const char *name; 693 694 sc->sc_dev = self; 695 sc->sc_i2c = aaa->reg_i2c; 696 sc->sc_addr = aaa->reg_addr; 697 sc->sc_ctrl = aaa->reg_ctrl; 698 699 fdtbus_register_regulator_controller(self, phandle, 700 &axpreg_funcs); 701 702 aprint_naive("\n"); 703 name = fdtbus_get_string(phandle, "regulator-name"); 704 if (name) 705 aprint_normal(": %s\n", name); 706 else 707 aprint_normal("\n"); 708 } 709 710 CFATTACH_DECL_NEW(axppmic, sizeof(struct axppmic_softc), 711 axppmic_match, axppmic_attach, NULL, NULL); 712 713 CFATTACH_DECL_NEW(axpreg, sizeof(struct axpreg_softc), 714 axpreg_match, axpreg_attach, NULL, NULL); 715
Indexes created Tue Sep 23 02:09:52 GMT 2025