axppmic.c revision 1.5
1 /* $NetBSD: axppmic.c,v 1.5 2018/05/06 14:25:48 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2014-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: axppmic.c,v 1.5 2018/05/06 14:25:48 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 40 #include <dev/i2c/i2cvar.h> 41 42 #include <dev/sysmon/sysmonvar.h> 43 #include <dev/sysmon/sysmon_taskq.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #define AXP_POWER_SOURCE_REG 0x00 48 #define AXP_POWER_SOURCE_ACIN_PRESENT __BIT(7) 49 #define AXP_POWER_SOURCE_VBUS_PRESENT __BIT(5) 50 51 #define AXP_POWER_MODE_REG 0x01 52 #define AXP_POWER_MODE_BATT_VALID __BIT(4) 53 #define AXP_POWER_MODE_BATT_PRESENT __BIT(5) 54 #define AXP_POWER_MODE_BATT_CHARGING __BIT(6) 55 56 #define AXP_POWER_DISABLE_REG 0x32 57 #define AXP_POWER_DISABLE_CTRL __BIT(7) 58 59 #define AXP_IRQ_ENABLE_REG(n) (0x40 + (n) - 1) 60 #define AXP_IRQ1_ACIN_RAISE __BIT(6) 61 #define AXP_IRQ1_ACIN_LOWER __BIT(5) 62 #define AXP_IRQ1_VBUS_RAISE __BIT(3) 63 #define AXP_IRQ1_VBUS_LOWER __BIT(2) 64 #define AXP_IRQ2_POKSIRQ __BIT(1) 65 #define AXP_IRQ2_ 66 #define AXP_IRQ_STATUS_REG(n) (0x48 + (n) - 1) 67 68 #define AXP_FUEL_GAUGE_CTRL_REG 0xb8 69 #define AXP_FUEL_GAUGE_CTRL_EN __BIT(7) 70 #define AXP_BATT_CAP_REG 0xb9 71 #define AXP_BATT_CAP_VALID __BIT(7) 72 #define AXP_BATT_CAP_PERCENT __BITS(6,0) 73 74 #define AXP_BATT_CAP_WARN_REG 0xe6 75 #define AXP_BATT_CAP_WARN_LV1 __BITS(7,4) 76 #define AXP_BATT_CAP_WARN_LV2 __BITS(3,0) 77 78 struct axppmic_ctrl { 79 device_t c_dev; 80 81 const char * c_name; 82 u_int c_min; 83 u_int c_max; 84 u_int c_step1; 85 u_int c_step1cnt; 86 u_int c_step2; 87 u_int c_step2cnt; 88 89 uint8_t c_enable_reg; 90 uint8_t c_enable_mask; 91 92 uint8_t c_voltage_reg; 93 uint8_t c_voltage_mask; 94 }; 95 96 #define AXP_CTRL(name, min, max, step, ereg, emask, vreg, vmask) \ 97 { .c_name = (name), .c_min = (min), .c_max = (max), \ 98 .c_step1 = (step), .c_step1cnt = (((max) - (min)) / (step)) + 1, \ 99 .c_step2 = 0, .c_step2cnt = 0, \ 100 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 101 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 102 103 #define AXP_CTRL2(name, min, max, step1, step1cnt, step2, step2cnt, ereg, emask, vreg, vmask) \ 104 { .c_name = (name), .c_min = (min), .c_max = (max), \ 105 .c_step1 = (step1), .c_step1cnt = (step1cnt), \ 106 .c_step2 = (step2), .c_step2cnt = (step2cnt), \ 107 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 108 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 109 110 static const struct axppmic_ctrl axp803_ctrls[] = { 111 AXP_CTRL("dldo1", 700, 3300, 100, 112 0x12, __BIT(3), 0x15, __BITS(4,0)), 113 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 114 0x12, __BIT(4), 0x16, __BITS(4,0)), 115 AXP_CTRL("dldo3", 700, 3300, 100, 116 0x12, __BIT(5), 0x17, __BITS(4,0)), 117 AXP_CTRL("dldo4", 700, 3300, 100, 118 0x12, __BIT(6), 0x18, __BITS(4,0)), 119 AXP_CTRL("eldo1", 700, 1900, 50, 120 0x12, __BIT(0), 0x19, __BITS(4,0)), 121 AXP_CTRL("eldo2", 700, 1900, 50, 122 0x12, __BIT(1), 0x1a, __BITS(4,0)), 123 AXP_CTRL("eldo3", 700, 1900, 50, 124 0x12, __BIT(2), 0x1b, __BITS(4,0)), 125 AXP_CTRL("fldo1", 700, 1450, 50, 126 0x13, __BIT(2), 0x1c, __BITS(3,0)), 127 AXP_CTRL("fldo2", 700, 1450, 50, 128 0x13, __BIT(3), 0x1d, __BITS(3,0)), 129 AXP_CTRL("dcdc1", 1600, 3400, 100, 130 0x10, __BIT(0), 0x20, __BITS(4,0)), 131 AXP_CTRL2("dcdc2", 500, 1300, 10, 71, 20, 5, 132 0x10, __BIT(1), 0x21, __BITS(6,0)), 133 AXP_CTRL2("dcdc3", 500, 1300, 10, 71, 20, 5, 134 0x10, __BIT(2), 0x22, __BITS(6,0)), 135 AXP_CTRL2("dcdc4", 500, 1300, 10, 71, 20, 5, 136 0x10, __BIT(3), 0x23, __BITS(6,0)), 137 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 138 0x10, __BIT(4), 0x24, __BITS(6,0)), 139 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 140 0x10, __BIT(5), 0x25, __BITS(6,0)), 141 AXP_CTRL("aldo1", 700, 3300, 100, 142 0x13, __BIT(5), 0x28, __BITS(4,0)), 143 AXP_CTRL("aldo2", 700, 3300, 100, 144 0x13, __BIT(6), 0x29, __BITS(4,0)), 145 AXP_CTRL("aldo3", 700, 3300, 100, 146 0x13, __BIT(7), 0x2a, __BITS(4,0)), 147 }; 148 149 static const struct axppmic_ctrl axp805_ctrls[] = { 150 AXP_CTRL2("dcdca", 600, 1520, 10, 51, 20, 21, 151 0x10, __BIT(0), 0x12, __BITS(6,0)), 152 AXP_CTRL("dcdcb", 1000, 2550, 50, 153 0x10, __BIT(1), 0x13, __BITS(4,0)), 154 AXP_CTRL2("dcdcc", 600, 1520, 10, 51, 20, 21, 155 0x10, __BIT(2), 0x14, __BITS(6,0)), 156 AXP_CTRL2("dcdcd", 600, 3300, 20, 46, 100, 18, 157 0x10, __BIT(3), 0x15, __BITS(5,0)), 158 AXP_CTRL("dcdce", 1100, 3400, 100, 159 0x10, __BIT(4), 0x16, __BITS(4,0)), 160 AXP_CTRL("aldo1", 700, 3300, 100, 161 0x10, __BIT(5), 0x17, __BITS(4,0)), 162 AXP_CTRL("aldo2", 700, 3400, 100, 163 0x10, __BIT(6), 0x18, __BITS(4,0)), 164 AXP_CTRL("aldo3", 700, 3300, 100, 165 0x10, __BIT(7), 0x19, __BITS(4,0)), 166 AXP_CTRL("bldo1", 700, 1900, 100, 167 0x11, __BIT(0), 0x20, __BITS(3,0)), 168 AXP_CTRL("bldo2", 700, 1900, 100, 169 0x11, __BIT(1), 0x21, __BITS(3,0)), 170 AXP_CTRL("bldo3", 700, 1900, 100, 171 0x11, __BIT(2), 0x22, __BITS(3,0)), 172 AXP_CTRL("bldo4", 700, 1900, 100, 173 0x11, __BIT(3), 0x23, __BITS(3,0)), 174 AXP_CTRL("cldo1", 700, 3300, 100, 175 0x11, __BIT(4), 0x24, __BITS(4,0)), 176 AXP_CTRL2("cldo2", 700, 4200, 100, 28, 200, 4, 177 0x11, __BIT(5), 0x25, __BITS(4,0)), 178 AXP_CTRL("cldo3", 700, 3300, 100, 179 0x11, __BIT(6), 0x26, __BITS(4,0)), 180 }; 181 182 struct axppmic_config { 183 const char *name; 184 const struct axppmic_ctrl *controls; 185 u_int ncontrols; 186 u_int irq_regs; 187 bool has_battery; 188 bool has_fuel_gauge; 189 u_int poksirq_reg; 190 uint8_t poksirq_mask; 191 }; 192 193 enum axppmic_sensor { 194 AXP_SENSOR_ACIN_PRESENT, 195 AXP_SENSOR_VBUS_PRESENT, 196 AXP_SENSOR_BATT_PRESENT, 197 AXP_SENSOR_BATT_CHARGING, 198 AXP_SENSOR_BATT_CHARGE_STATE, 199 AXP_SENSOR_BATT_CAPACITY, 200 AXP_NSENSORS 201 }; 202 203 struct axppmic_softc { 204 device_t sc_dev; 205 i2c_tag_t sc_i2c; 206 i2c_addr_t sc_addr; 207 int sc_phandle; 208 209 bool sc_has_battery; 210 bool sc_has_fuel_gauge; 211 u_int sc_poksirq_reg; 212 uint8_t sc_poksirq_mask; 213 214 u_int sc_irq_regs; 215 216 struct sysmon_pswitch sc_smpsw; 217 218 struct sysmon_envsys *sc_sme; 219 220 envsys_data_t sc_sensor[AXP_NSENSORS]; 221 222 u_int sc_warn_thres; 223 u_int sc_shut_thres; 224 }; 225 226 struct axpreg_softc { 227 device_t sc_dev; 228 i2c_tag_t sc_i2c; 229 i2c_addr_t sc_addr; 230 const struct axppmic_ctrl *sc_ctrl; 231 }; 232 233 struct axpreg_attach_args { 234 const struct axppmic_ctrl *reg_ctrl; 235 int reg_phandle; 236 i2c_tag_t reg_i2c; 237 i2c_addr_t reg_addr; 238 }; 239 240 static const struct axppmic_config axp803_config = { 241 .name = "AXP803", 242 .controls = axp803_ctrls, 243 .ncontrols = __arraycount(axp803_ctrls), 244 .irq_regs = 6, 245 .has_battery = true, 246 .has_fuel_gauge = true, 247 .poksirq_reg = 5, 248 .poksirq_mask = __BIT(4), 249 }; 250 251 static const struct axppmic_config axp805_config = { 252 .name = "AXP805/806", 253 .controls = axp805_ctrls, 254 .ncontrols = __arraycount(axp805_ctrls), 255 .irq_regs = 2, 256 .poksirq_reg = 2, 257 .poksirq_mask = __BIT(1), 258 }; 259 260 static const struct of_compat_data compat_data[] = { 261 { "x-powers,axp803", (uintptr_t)&axp803_config }, 262 { "x-powers,axp805", (uintptr_t)&axp805_config }, 263 { "x-powers,axp806", (uintptr_t)&axp805_config }, 264 { NULL } 265 }; 266 267 static int 268 axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags) 269 { 270 return iic_smbus_read_byte(tag, addr, reg, val, flags); 271 } 272 273 static int 274 axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags) 275 { 276 return iic_smbus_write_byte(tag, addr, reg, val, flags); 277 } 278 279 static int 280 axppmic_set_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int min, u_int max) 281 { 282 const int flags = (cold ? I2C_F_POLL : 0); 283 u_int vol, reg_val; 284 int nstep, error; 285 uint8_t val; 286 287 if (!c->c_voltage_mask) 288 return EINVAL; 289 290 if (min < c->c_min || min > c->c_max) 291 return EINVAL; 292 293 reg_val = 0; 294 nstep = 1; 295 vol = c->c_min; 296 297 for (nstep = 0; nstep < c->c_step1cnt && vol < min; nstep++) { 298 ++reg_val; 299 vol += c->c_step1; 300 } 301 for (nstep = 0; nstep < c->c_step2cnt && vol < min; nstep++) { 302 ++reg_val; 303 vol += c->c_step2; 304 } 305 306 if (vol > max) 307 return EINVAL; 308 309 iic_acquire_bus(tag, flags); 310 if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags)) == 0) { 311 val &= ~c->c_voltage_mask; 312 val |= __SHIFTIN(reg_val, c->c_voltage_mask); 313 error = axppmic_write(tag, addr, c->c_voltage_reg, val, flags); 314 } 315 iic_release_bus(tag, flags); 316 317 return error; 318 } 319 320 static int 321 axppmic_get_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int *pvol) 322 { 323 const int flags = (cold ? I2C_F_POLL : 0); 324 int reg_val, error; 325 uint8_t val; 326 327 if (!c->c_voltage_mask) 328 return EINVAL; 329 330 iic_acquire_bus(tag, flags); 331 error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags); 332 iic_release_bus(tag, flags); 333 if (error) 334 return error; 335 336 reg_val = __SHIFTOUT(val, c->c_voltage_mask); 337 if (reg_val < c->c_step1cnt) { 338 *pvol = c->c_min + reg_val * c->c_step1; 339 } else { 340 *pvol = c->c_min + (c->c_step1cnt * c->c_step1) + 341 ((reg_val - c->c_step1cnt) * c->c_step2); 342 } 343 344 return 0; 345 } 346 347 static void 348 axppmic_power_poweroff(device_t dev) 349 { 350 struct axppmic_softc *sc = device_private(dev); 351 352 delay(1000000); 353 354 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 355 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_POWER_DISABLE_REG, AXP_POWER_DISABLE_CTRL, I2C_F_POLL); 356 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 357 } 358 359 static struct fdtbus_power_controller_func axppmic_power_funcs = { 360 .poweroff = axppmic_power_poweroff, 361 }; 362 363 static void 364 axppmic_task_shut(void *priv) 365 { 366 struct axppmic_softc *sc = priv; 367 368 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 369 } 370 371 static int 372 axppmic_intr(void *priv) 373 { 374 struct axppmic_softc *sc = priv; 375 const int flags = I2C_F_POLL; 376 u_int n; 377 uint8_t stat; 378 379 iic_acquire_bus(sc->sc_i2c, flags); 380 for (n = 1; n <= sc->sc_irq_regs; n++) { 381 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(n), &stat, flags) == 0) { 382 if (n == sc->sc_poksirq_reg && (stat & sc->sc_poksirq_mask) != 0) 383 sysmon_task_queue_sched(0, axppmic_task_shut, sc); 384 385 axppmic_write(sc->sc_i2c, sc->sc_addr, 386 AXP_IRQ_STATUS_REG(sc->sc_poksirq_reg), stat, flags); 387 } 388 } 389 iic_release_bus(sc->sc_i2c, flags); 390 391 return 1; 392 } 393 394 static void 395 axppmic_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *e) 396 { 397 struct axppmic_softc *sc = sme->sme_cookie; 398 const int flags = I2C_F_POLL; 399 uint8_t val; 400 401 e->state = ENVSYS_SINVALID; 402 403 iic_acquire_bus(sc->sc_i2c, flags); 404 switch (e->private) { 405 case AXP_SENSOR_ACIN_PRESENT: 406 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 407 e->state = ENVSYS_SVALID; 408 e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT); 409 } 410 break; 411 case AXP_SENSOR_VBUS_PRESENT: 412 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 413 e->state = ENVSYS_SVALID; 414 e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT); 415 } 416 break; 417 case AXP_SENSOR_BATT_PRESENT: 418 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 419 if (val & AXP_POWER_MODE_BATT_VALID) { 420 e->state = ENVSYS_SVALID; 421 e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT); 422 } 423 } 424 break; 425 case AXP_SENSOR_BATT_CHARGING: 426 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 427 e->state = ENVSYS_SVALID; 428 e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING); 429 } 430 break; 431 case AXP_SENSOR_BATT_CHARGE_STATE: 432 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 && 433 (val & AXP_POWER_MODE_BATT_VALID) != 0 && 434 (val & AXP_POWER_MODE_BATT_PRESENT) != 0 && 435 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 436 (val & AXP_BATT_CAP_VALID) != 0) { 437 const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 438 if (batt_val <= sc->sc_shut_thres) { 439 e->state = ENVSYS_SCRITICAL; 440 e->value_cur = ENVSYS_BATTERY_CAPACITY_CRITICAL; 441 } else if (batt_val <= sc->sc_warn_thres) { 442 e->state = ENVSYS_SWARNUNDER; 443 e->value_cur = ENVSYS_BATTERY_CAPACITY_WARNING; 444 } else { 445 e->state = ENVSYS_SVALID; 446 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 447 } 448 } 449 break; 450 case AXP_SENSOR_BATT_CAPACITY: 451 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 && 452 (val & AXP_POWER_MODE_BATT_VALID) != 0 && 453 (val & AXP_POWER_MODE_BATT_PRESENT) != 0 && 454 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 455 (val & AXP_BATT_CAP_VALID) != 0) { 456 e->state = ENVSYS_SVALID; 457 e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 458 } 459 break; 460 } 461 iic_release_bus(sc->sc_i2c, flags); 462 } 463 464 static void 465 axppmic_attach_acadapter(struct axppmic_softc *sc) 466 { 467 envsys_data_t *e; 468 469 e = &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]; 470 e->private = AXP_SENSOR_ACIN_PRESENT; 471 e->units = ENVSYS_INDICATOR; 472 e->state = ENVSYS_SINVALID; 473 strlcpy(e->desc, "ACIN present", sizeof(e->desc)); 474 sysmon_envsys_sensor_attach(sc->sc_sme, e); 475 476 e = &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]; 477 e->private = AXP_SENSOR_VBUS_PRESENT; 478 e->units = ENVSYS_INDICATOR; 479 e->state = ENVSYS_SINVALID; 480 strlcpy(e->desc, "VBUS present", sizeof(e->desc)); 481 sysmon_envsys_sensor_attach(sc->sc_sme, e); 482 } 483 484 static void 485 axppmic_attach_battery(struct axppmic_softc *sc) 486 { 487 envsys_data_t *e; 488 uint8_t val; 489 490 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 491 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &val, I2C_F_POLL) == 0) { 492 sc->sc_warn_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV1) + 5; 493 sc->sc_shut_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV2); 494 } 495 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 496 497 e = &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]; 498 e->private = AXP_SENSOR_BATT_PRESENT; 499 e->units = ENVSYS_INDICATOR; 500 e->state = ENVSYS_SINVALID; 501 strlcpy(e->desc, "battery present", sizeof(e->desc)); 502 sysmon_envsys_sensor_attach(sc->sc_sme, e); 503 504 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]; 505 e->private = AXP_SENSOR_BATT_CHARGING; 506 e->units = ENVSYS_BATTERY_CHARGE; 507 e->state = ENVSYS_SINVALID; 508 strlcpy(e->desc, "charging", sizeof(e->desc)); 509 sysmon_envsys_sensor_attach(sc->sc_sme, e); 510 511 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]; 512 e->private = AXP_SENSOR_BATT_CHARGE_STATE; 513 e->units = ENVSYS_BATTERY_CAPACITY; 514 e->flags = ENVSYS_FMONSTCHANGED; 515 e->state = ENVSYS_SVALID; 516 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 517 strlcpy(e->desc, "charge state", sizeof(e->desc)); 518 sysmon_envsys_sensor_attach(sc->sc_sme, e); 519 520 if (sc->sc_has_fuel_gauge) { 521 e = &sc->sc_sensor[AXP_SENSOR_BATT_CAPACITY]; 522 e->private = AXP_SENSOR_BATT_CAPACITY; 523 e->units = ENVSYS_INTEGER; 524 e->state = ENVSYS_SINVALID; 525 e->flags = ENVSYS_FPERCENT; 526 strlcpy(e->desc, "battery percent", sizeof(e->desc)); 527 sysmon_envsys_sensor_attach(sc->sc_sme, e); 528 } 529 } 530 531 static void 532 axppmic_attach_sensors(struct axppmic_softc *sc) 533 { 534 if (sc->sc_has_battery) { 535 sc->sc_sme = sysmon_envsys_create(); 536 sc->sc_sme->sme_name = device_xname(sc->sc_dev); 537 sc->sc_sme->sme_cookie = sc; 538 sc->sc_sme->sme_refresh = axppmic_sensor_refresh; 539 sc->sc_sme->sme_class = SME_CLASS_BATTERY; 540 sc->sc_sme->sme_flags = SME_INIT_REFRESH; 541 542 axppmic_attach_acadapter(sc); 543 axppmic_attach_battery(sc); 544 545 sysmon_envsys_register(sc->sc_sme); 546 } 547 } 548 549 550 static int 551 axppmic_match(device_t parent, cfdata_t match, void *aux) 552 { 553 struct i2c_attach_args *ia = aux; 554 555 if (ia->ia_name != NULL) { 556 if (ia->ia_cookie) 557 return of_match_compat_data(ia->ia_cookie, compat_data); 558 else 559 return 0; 560 } 561 562 return 1; 563 } 564 565 static void 566 axppmic_attach(device_t parent, device_t self, void *aux) 567 { 568 struct axppmic_softc *sc = device_private(self); 569 const struct axppmic_config *c; 570 struct axpreg_attach_args aaa; 571 struct i2c_attach_args *ia = aux; 572 int phandle, child, i; 573 uint32_t irq_mask; 574 void *ih; 575 576 c = (void *)of_search_compatible(ia->ia_cookie, compat_data)->data; 577 578 sc->sc_dev = self; 579 sc->sc_i2c = ia->ia_tag; 580 sc->sc_addr = ia->ia_addr; 581 sc->sc_phandle = ia->ia_cookie; 582 sc->sc_has_battery = c->has_battery; 583 sc->sc_has_fuel_gauge = c->has_fuel_gauge; 584 sc->sc_irq_regs = c->irq_regs; 585 sc->sc_poksirq_reg = c->poksirq_reg; 586 sc->sc_poksirq_mask = c->poksirq_mask; 587 588 aprint_naive("\n"); 589 aprint_normal(": %s\n", c->name); 590 591 sc->sc_smpsw.smpsw_name = device_xname(self); 592 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_POWER; 593 sysmon_pswitch_register(&sc->sc_smpsw); 594 595 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 596 for (i = 1; i <= c->irq_regs; i++) { 597 irq_mask = 0; 598 if (i == c->poksirq_reg) 599 irq_mask |= c->poksirq_mask; 600 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_ENABLE_REG(i), irq_mask, I2C_F_POLL); 601 } 602 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 603 604 ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, FDT_INTR_MPSAFE, 605 axppmic_intr, sc); 606 if (ih == NULL) { 607 aprint_error_dev(self, "WARNING: couldn't establish interrupt handler\n"); 608 } 609 610 fdtbus_register_power_controller(sc->sc_dev, sc->sc_phandle, 611 &axppmic_power_funcs); 612 613 phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators"); 614 if (phandle > 0) { 615 aaa.reg_i2c = sc->sc_i2c; 616 aaa.reg_addr = sc->sc_addr; 617 for (i = 0; i < c->ncontrols; i++) { 618 const struct axppmic_ctrl *ctrl = &c->controls[i]; 619 child = of_find_firstchild_byname(phandle, ctrl->c_name); 620 if (child <= 0) 621 continue; 622 aaa.reg_ctrl = ctrl; 623 aaa.reg_phandle = child; 624 config_found(sc->sc_dev, &aaa, NULL); 625 } 626 } 627 628 if (c->has_battery) 629 axppmic_attach_sensors(sc); 630 } 631 632 static int 633 axpreg_acquire(device_t dev) 634 { 635 return 0; 636 } 637 638 static void 639 axpreg_release(device_t dev) 640 { 641 } 642 643 static int 644 axpreg_enable(device_t dev, bool enable) 645 { 646 struct axpreg_softc *sc = device_private(dev); 647 const struct axppmic_ctrl *c = sc->sc_ctrl; 648 const int flags = (cold ? I2C_F_POLL : 0); 649 uint8_t val; 650 int error; 651 652 if (!c->c_enable_mask) 653 return EINVAL; 654 655 iic_acquire_bus(sc->sc_i2c, flags); 656 if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) { 657 if (enable) 658 val |= c->c_enable_mask; 659 else 660 val &= ~c->c_enable_mask; 661 error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags); 662 } 663 iic_release_bus(sc->sc_i2c, flags); 664 665 return error; 666 } 667 668 static int 669 axpreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol) 670 { 671 struct axpreg_softc *sc = device_private(dev); 672 const struct axppmic_ctrl *c = sc->sc_ctrl; 673 674 return axppmic_set_voltage(sc->sc_i2c, sc->sc_addr, c, 675 min_uvol / 1000, max_uvol / 1000); 676 } 677 678 static int 679 axpreg_get_voltage(device_t dev, u_int *puvol) 680 { 681 struct axpreg_softc *sc = device_private(dev); 682 const struct axppmic_ctrl *c = sc->sc_ctrl; 683 int error; 684 u_int vol; 685 686 error = axppmic_get_voltage(sc->sc_i2c, sc->sc_addr, c, &vol); 687 if (error) 688 return error; 689 690 *puvol = vol * 1000; 691 return 0; 692 } 693 694 static struct fdtbus_regulator_controller_func axpreg_funcs = { 695 .acquire = axpreg_acquire, 696 .release = axpreg_release, 697 .enable = axpreg_enable, 698 .set_voltage = axpreg_set_voltage, 699 .get_voltage = axpreg_get_voltage, 700 }; 701 702 static int 703 axpreg_match(device_t parent, cfdata_t match, void *aux) 704 { 705 return 1; 706 } 707 708 static void 709 axpreg_attach(device_t parent, device_t self, void *aux) 710 { 711 struct axpreg_softc *sc = device_private(self); 712 struct axpreg_attach_args *aaa = aux; 713 const int phandle = aaa->reg_phandle; 714 const char *name; 715 716 sc->sc_dev = self; 717 sc->sc_i2c = aaa->reg_i2c; 718 sc->sc_addr = aaa->reg_addr; 719 sc->sc_ctrl = aaa->reg_ctrl; 720 721 fdtbus_register_regulator_controller(self, phandle, 722 &axpreg_funcs); 723 724 aprint_naive("\n"); 725 name = fdtbus_get_string(phandle, "regulator-name"); 726 if (name) 727 aprint_normal(": %s\n", name); 728 else 729 aprint_normal("\n"); 730 } 731 732 CFATTACH_DECL_NEW(axppmic, sizeof(struct axppmic_softc), 733 axppmic_match, axppmic_attach, NULL, NULL); 734 735 CFATTACH_DECL_NEW(axpreg, sizeof(struct axpreg_softc), 736 axpreg_match, axpreg_attach, NULL, NULL); 737
Indexes created Fri Oct 03 02:09:57 GMT 2025