axppmic.c revision 1.7
1 /* $NetBSD: axppmic.c,v 1.7 2018/05/12 01:31:07 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2014-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: axppmic.c,v 1.7 2018/05/12 01:31:07 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 40 #include <dev/i2c/i2cvar.h> 41 42 #include <dev/sysmon/sysmonvar.h> 43 #include <dev/sysmon/sysmon_taskq.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #define AXP_POWER_SOURCE_REG 0x00 48 #define AXP_POWER_SOURCE_ACIN_PRESENT __BIT(7) 49 #define AXP_POWER_SOURCE_VBUS_PRESENT __BIT(5) 50 51 #define AXP_POWER_MODE_REG 0x01 52 #define AXP_POWER_MODE_BATT_VALID __BIT(4) 53 #define AXP_POWER_MODE_BATT_PRESENT __BIT(5) 54 #define AXP_POWER_MODE_BATT_CHARGING __BIT(6) 55 56 #define AXP_POWER_DISABLE_REG 0x32 57 #define AXP_POWER_DISABLE_CTRL __BIT(7) 58 59 #define AXP_IRQ_ENABLE_REG(n) (0x40 + (n) - 1) 60 #define AXP_IRQ1_ACIN_RAISE __BIT(6) 61 #define AXP_IRQ1_ACIN_LOWER __BIT(5) 62 #define AXP_IRQ1_VBUS_RAISE __BIT(3) 63 #define AXP_IRQ1_VBUS_LOWER __BIT(2) 64 #define AXP_IRQ_STATUS_REG(n) (0x48 + (n) - 1) 65 66 #define AXP_FUEL_GAUGE_CTRL_REG 0xb8 67 #define AXP_FUEL_GAUGE_CTRL_EN __BIT(7) 68 #define AXP_BATT_CAP_REG 0xb9 69 #define AXP_BATT_CAP_VALID __BIT(7) 70 #define AXP_BATT_CAP_PERCENT __BITS(6,0) 71 72 #define AXP_BATT_CAP_WARN_REG 0xe6 73 #define AXP_BATT_CAP_WARN_LV1 __BITS(7,4) 74 #define AXP_BATT_CAP_WARN_LV2 __BITS(3,0) 75 76 struct axppmic_ctrl { 77 device_t c_dev; 78 79 const char * c_name; 80 u_int c_min; 81 u_int c_max; 82 u_int c_step1; 83 u_int c_step1cnt; 84 u_int c_step2; 85 u_int c_step2cnt; 86 87 uint8_t c_enable_reg; 88 uint8_t c_enable_mask; 89 90 uint8_t c_voltage_reg; 91 uint8_t c_voltage_mask; 92 }; 93 94 #define AXP_CTRL(name, min, max, step, ereg, emask, vreg, vmask) \ 95 { .c_name = (name), .c_min = (min), .c_max = (max), \ 96 .c_step1 = (step), .c_step1cnt = (((max) - (min)) / (step)) + 1, \ 97 .c_step2 = 0, .c_step2cnt = 0, \ 98 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 99 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 100 101 #define AXP_CTRL2(name, min, max, step1, step1cnt, step2, step2cnt, ereg, emask, vreg, vmask) \ 102 { .c_name = (name), .c_min = (min), .c_max = (max), \ 103 .c_step1 = (step1), .c_step1cnt = (step1cnt), \ 104 .c_step2 = (step2), .c_step2cnt = (step2cnt), \ 105 .c_enable_reg = (ereg), .c_enable_mask = (emask), \ 106 .c_voltage_reg = (vreg), .c_voltage_mask = (vmask) } 107 108 static const struct axppmic_ctrl axp803_ctrls[] = { 109 AXP_CTRL("dldo1", 700, 3300, 100, 110 0x12, __BIT(3), 0x15, __BITS(4,0)), 111 AXP_CTRL2("dldo2", 700, 4200, 100, 28, 200, 4, 112 0x12, __BIT(4), 0x16, __BITS(4,0)), 113 AXP_CTRL("dldo3", 700, 3300, 100, 114 0x12, __BIT(5), 0x17, __BITS(4,0)), 115 AXP_CTRL("dldo4", 700, 3300, 100, 116 0x12, __BIT(6), 0x18, __BITS(4,0)), 117 AXP_CTRL("eldo1", 700, 1900, 50, 118 0x12, __BIT(0), 0x19, __BITS(4,0)), 119 AXP_CTRL("eldo2", 700, 1900, 50, 120 0x12, __BIT(1), 0x1a, __BITS(4,0)), 121 AXP_CTRL("eldo3", 700, 1900, 50, 122 0x12, __BIT(2), 0x1b, __BITS(4,0)), 123 AXP_CTRL("fldo1", 700, 1450, 50, 124 0x13, __BIT(2), 0x1c, __BITS(3,0)), 125 AXP_CTRL("fldo2", 700, 1450, 50, 126 0x13, __BIT(3), 0x1d, __BITS(3,0)), 127 AXP_CTRL("dcdc1", 1600, 3400, 100, 128 0x10, __BIT(0), 0x20, __BITS(4,0)), 129 AXP_CTRL2("dcdc2", 500, 1300, 10, 70, 20, 5, 130 0x10, __BIT(1), 0x21, __BITS(6,0)), 131 AXP_CTRL2("dcdc3", 500, 1300, 10, 70, 20, 5, 132 0x10, __BIT(2), 0x22, __BITS(6,0)), 133 AXP_CTRL2("dcdc4", 500, 1300, 10, 70, 20, 5, 134 0x10, __BIT(3), 0x23, __BITS(6,0)), 135 AXP_CTRL2("dcdc5", 800, 1840, 10, 33, 20, 36, 136 0x10, __BIT(4), 0x24, __BITS(6,0)), 137 AXP_CTRL2("dcdc6", 600, 1520, 10, 51, 20, 21, 138 0x10, __BIT(5), 0x25, __BITS(6,0)), 139 AXP_CTRL("aldo1", 700, 3300, 100, 140 0x13, __BIT(5), 0x28, __BITS(4,0)), 141 AXP_CTRL("aldo2", 700, 3300, 100, 142 0x13, __BIT(6), 0x29, __BITS(4,0)), 143 AXP_CTRL("aldo3", 700, 3300, 100, 144 0x13, __BIT(7), 0x2a, __BITS(4,0)), 145 }; 146 147 static const struct axppmic_ctrl axp805_ctrls[] = { 148 AXP_CTRL2("dcdca", 600, 1520, 10, 51, 20, 21, 149 0x10, __BIT(0), 0x12, __BITS(6,0)), 150 AXP_CTRL("dcdcb", 1000, 2550, 50, 151 0x10, __BIT(1), 0x13, __BITS(4,0)), 152 AXP_CTRL2("dcdcc", 600, 1520, 10, 51, 20, 21, 153 0x10, __BIT(2), 0x14, __BITS(6,0)), 154 AXP_CTRL2("dcdcd", 600, 3300, 20, 46, 100, 18, 155 0x10, __BIT(3), 0x15, __BITS(5,0)), 156 AXP_CTRL("dcdce", 1100, 3400, 100, 157 0x10, __BIT(4), 0x16, __BITS(4,0)), 158 AXP_CTRL("aldo1", 700, 3300, 100, 159 0x10, __BIT(5), 0x17, __BITS(4,0)), 160 AXP_CTRL("aldo2", 700, 3400, 100, 161 0x10, __BIT(6), 0x18, __BITS(4,0)), 162 AXP_CTRL("aldo3", 700, 3300, 100, 163 0x10, __BIT(7), 0x19, __BITS(4,0)), 164 AXP_CTRL("bldo1", 700, 1900, 100, 165 0x11, __BIT(0), 0x20, __BITS(3,0)), 166 AXP_CTRL("bldo2", 700, 1900, 100, 167 0x11, __BIT(1), 0x21, __BITS(3,0)), 168 AXP_CTRL("bldo3", 700, 1900, 100, 169 0x11, __BIT(2), 0x22, __BITS(3,0)), 170 AXP_CTRL("bldo4", 700, 1900, 100, 171 0x11, __BIT(3), 0x23, __BITS(3,0)), 172 AXP_CTRL("cldo1", 700, 3300, 100, 173 0x11, __BIT(4), 0x24, __BITS(4,0)), 174 AXP_CTRL2("cldo2", 700, 4200, 100, 28, 200, 4, 175 0x11, __BIT(5), 0x25, __BITS(4,0)), 176 AXP_CTRL("cldo3", 700, 3300, 100, 177 0x11, __BIT(6), 0x26, __BITS(4,0)), 178 }; 179 180 struct axppmic_config { 181 const char *name; 182 const struct axppmic_ctrl *controls; 183 u_int ncontrols; 184 u_int irq_regs; 185 bool has_battery; 186 bool has_fuel_gauge; 187 u_int poklirq_reg; 188 uint8_t poklirq_mask; 189 }; 190 191 enum axppmic_sensor { 192 AXP_SENSOR_ACIN_PRESENT, 193 AXP_SENSOR_VBUS_PRESENT, 194 AXP_SENSOR_BATT_PRESENT, 195 AXP_SENSOR_BATT_CHARGING, 196 AXP_SENSOR_BATT_CHARGE_STATE, 197 AXP_SENSOR_BATT_CAPACITY, 198 AXP_NSENSORS 199 }; 200 201 struct axppmic_softc { 202 device_t sc_dev; 203 i2c_tag_t sc_i2c; 204 i2c_addr_t sc_addr; 205 int sc_phandle; 206 207 bool sc_has_battery; 208 bool sc_has_fuel_gauge; 209 u_int sc_poklirq_reg; 210 uint8_t sc_poklirq_mask; 211 212 u_int sc_irq_regs; 213 214 struct sysmon_pswitch sc_smpsw; 215 216 struct sysmon_envsys *sc_sme; 217 218 envsys_data_t sc_sensor[AXP_NSENSORS]; 219 220 u_int sc_warn_thres; 221 u_int sc_shut_thres; 222 }; 223 224 struct axpreg_softc { 225 device_t sc_dev; 226 i2c_tag_t sc_i2c; 227 i2c_addr_t sc_addr; 228 const struct axppmic_ctrl *sc_ctrl; 229 }; 230 231 struct axpreg_attach_args { 232 const struct axppmic_ctrl *reg_ctrl; 233 int reg_phandle; 234 i2c_tag_t reg_i2c; 235 i2c_addr_t reg_addr; 236 }; 237 238 static const struct axppmic_config axp803_config = { 239 .name = "AXP803", 240 .controls = axp803_ctrls, 241 .ncontrols = __arraycount(axp803_ctrls), 242 .irq_regs = 6, 243 .has_battery = true, 244 .has_fuel_gauge = true, 245 .poklirq_reg = 5, 246 .poklirq_mask = __BIT(3), 247 }; 248 249 static const struct axppmic_config axp805_config = { 250 .name = "AXP805/806", 251 .controls = axp805_ctrls, 252 .ncontrols = __arraycount(axp805_ctrls), 253 .irq_regs = 2, 254 .poklirq_reg = 2, 255 .poklirq_mask = __BIT(0), 256 }; 257 258 static const struct of_compat_data compat_data[] = { 259 { "x-powers,axp803", (uintptr_t)&axp803_config }, 260 { "x-powers,axp805", (uintptr_t)&axp805_config }, 261 { "x-powers,axp806", (uintptr_t)&axp805_config }, 262 { NULL } 263 }; 264 265 static int 266 axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags) 267 { 268 return iic_smbus_read_byte(tag, addr, reg, val, flags); 269 } 270 271 static int 272 axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags) 273 { 274 return iic_smbus_write_byte(tag, addr, reg, val, flags); 275 } 276 277 static int 278 axppmic_set_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int min, u_int max) 279 { 280 const int flags = (cold ? I2C_F_POLL : 0); 281 u_int vol, reg_val; 282 int nstep, error; 283 uint8_t val; 284 285 if (!c->c_voltage_mask) 286 return EINVAL; 287 288 if (min < c->c_min || min > c->c_max) 289 return EINVAL; 290 291 reg_val = 0; 292 nstep = 1; 293 vol = c->c_min; 294 295 for (nstep = 0; nstep < c->c_step1cnt && vol < min; nstep++) { 296 ++reg_val; 297 vol += c->c_step1; 298 } 299 for (nstep = 0; nstep < c->c_step2cnt && vol < min; nstep++) { 300 ++reg_val; 301 vol += c->c_step2; 302 } 303 304 if (vol > max) 305 return EINVAL; 306 307 iic_acquire_bus(tag, flags); 308 if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags)) == 0) { 309 val &= ~c->c_voltage_mask; 310 val |= __SHIFTIN(reg_val, c->c_voltage_mask); 311 error = axppmic_write(tag, addr, c->c_voltage_reg, val, flags); 312 } 313 iic_release_bus(tag, flags); 314 315 return error; 316 } 317 318 static int 319 axppmic_get_voltage(i2c_tag_t tag, i2c_addr_t addr, const struct axppmic_ctrl *c, u_int *pvol) 320 { 321 const int flags = (cold ? I2C_F_POLL : 0); 322 int reg_val, error; 323 uint8_t val; 324 325 if (!c->c_voltage_mask) 326 return EINVAL; 327 328 iic_acquire_bus(tag, flags); 329 error = axppmic_read(tag, addr, c->c_voltage_reg, &val, flags); 330 iic_release_bus(tag, flags); 331 if (error) 332 return error; 333 334 reg_val = __SHIFTOUT(val, c->c_voltage_mask); 335 if (reg_val < c->c_step1cnt) { 336 *pvol = c->c_min + reg_val * c->c_step1; 337 } else { 338 *pvol = c->c_min + (c->c_step1cnt * c->c_step1) + 339 ((reg_val - c->c_step1cnt) * c->c_step2); 340 } 341 342 return 0; 343 } 344 345 static void 346 axppmic_power_poweroff(device_t dev) 347 { 348 struct axppmic_softc *sc = device_private(dev); 349 350 delay(1000000); 351 352 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 353 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_POWER_DISABLE_REG, AXP_POWER_DISABLE_CTRL, I2C_F_POLL); 354 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 355 } 356 357 static struct fdtbus_power_controller_func axppmic_power_funcs = { 358 .poweroff = axppmic_power_poweroff, 359 }; 360 361 static void 362 axppmic_task_shut(void *priv) 363 { 364 struct axppmic_softc *sc = priv; 365 366 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 367 } 368 369 static int 370 axppmic_intr(void *priv) 371 { 372 struct axppmic_softc *sc = priv; 373 const int flags = I2C_F_POLL; 374 u_int n; 375 uint8_t stat; 376 377 iic_acquire_bus(sc->sc_i2c, flags); 378 for (n = 1; n <= sc->sc_irq_regs; n++) { 379 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_IRQ_STATUS_REG(n), &stat, flags) == 0) { 380 if (n == sc->sc_poklirq_reg && (stat & sc->sc_poklirq_mask) != 0) 381 sysmon_task_queue_sched(0, axppmic_task_shut, sc); 382 383 axppmic_write(sc->sc_i2c, sc->sc_addr, 384 AXP_IRQ_STATUS_REG(sc->sc_poklirq_reg), stat, flags); 385 } 386 } 387 iic_release_bus(sc->sc_i2c, flags); 388 389 return 1; 390 } 391 392 static void 393 axppmic_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *e) 394 { 395 struct axppmic_softc *sc = sme->sme_cookie; 396 const int flags = I2C_F_POLL; 397 uint8_t val; 398 399 e->state = ENVSYS_SINVALID; 400 401 iic_acquire_bus(sc->sc_i2c, flags); 402 switch (e->private) { 403 case AXP_SENSOR_ACIN_PRESENT: 404 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 405 e->state = ENVSYS_SVALID; 406 e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT); 407 } 408 break; 409 case AXP_SENSOR_VBUS_PRESENT: 410 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, flags) == 0) { 411 e->state = ENVSYS_SVALID; 412 e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT); 413 } 414 break; 415 case AXP_SENSOR_BATT_PRESENT: 416 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 417 if (val & AXP_POWER_MODE_BATT_VALID) { 418 e->state = ENVSYS_SVALID; 419 e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT); 420 } 421 } 422 break; 423 case AXP_SENSOR_BATT_CHARGING: 424 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0) { 425 e->state = ENVSYS_SVALID; 426 e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING); 427 } 428 break; 429 case AXP_SENSOR_BATT_CHARGE_STATE: 430 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 && 431 (val & AXP_POWER_MODE_BATT_VALID) != 0 && 432 (val & AXP_POWER_MODE_BATT_PRESENT) != 0 && 433 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 434 (val & AXP_BATT_CAP_VALID) != 0) { 435 const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 436 if (batt_val <= sc->sc_shut_thres) { 437 e->state = ENVSYS_SCRITICAL; 438 e->value_cur = ENVSYS_BATTERY_CAPACITY_CRITICAL; 439 } else if (batt_val <= sc->sc_warn_thres) { 440 e->state = ENVSYS_SWARNUNDER; 441 e->value_cur = ENVSYS_BATTERY_CAPACITY_WARNING; 442 } else { 443 e->state = ENVSYS_SVALID; 444 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 445 } 446 } 447 break; 448 case AXP_SENSOR_BATT_CAPACITY: 449 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, flags) == 0 && 450 (val & AXP_POWER_MODE_BATT_VALID) != 0 && 451 (val & AXP_POWER_MODE_BATT_PRESENT) != 0 && 452 axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, flags) == 0 && 453 (val & AXP_BATT_CAP_VALID) != 0) { 454 e->state = ENVSYS_SVALID; 455 e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT); 456 } 457 break; 458 } 459 iic_release_bus(sc->sc_i2c, flags); 460 } 461 462 static void 463 axppmic_attach_acadapter(struct axppmic_softc *sc) 464 { 465 envsys_data_t *e; 466 467 e = &sc->sc_sensor[AXP_SENSOR_ACIN_PRESENT]; 468 e->private = AXP_SENSOR_ACIN_PRESENT; 469 e->units = ENVSYS_INDICATOR; 470 e->state = ENVSYS_SINVALID; 471 strlcpy(e->desc, "ACIN present", sizeof(e->desc)); 472 sysmon_envsys_sensor_attach(sc->sc_sme, e); 473 474 e = &sc->sc_sensor[AXP_SENSOR_VBUS_PRESENT]; 475 e->private = AXP_SENSOR_VBUS_PRESENT; 476 e->units = ENVSYS_INDICATOR; 477 e->state = ENVSYS_SINVALID; 478 strlcpy(e->desc, "VBUS present", sizeof(e->desc)); 479 sysmon_envsys_sensor_attach(sc->sc_sme, e); 480 } 481 482 static void 483 axppmic_attach_battery(struct axppmic_softc *sc) 484 { 485 envsys_data_t *e; 486 uint8_t val; 487 488 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 489 if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &val, I2C_F_POLL) == 0) { 490 sc->sc_warn_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV1) + 5; 491 sc->sc_shut_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV2); 492 } 493 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 494 495 e = &sc->sc_sensor[AXP_SENSOR_BATT_PRESENT]; 496 e->private = AXP_SENSOR_BATT_PRESENT; 497 e->units = ENVSYS_INDICATOR; 498 e->state = ENVSYS_SINVALID; 499 strlcpy(e->desc, "battery present", sizeof(e->desc)); 500 sysmon_envsys_sensor_attach(sc->sc_sme, e); 501 502 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGING]; 503 e->private = AXP_SENSOR_BATT_CHARGING; 504 e->units = ENVSYS_BATTERY_CHARGE; 505 e->state = ENVSYS_SINVALID; 506 strlcpy(e->desc, "charging", sizeof(e->desc)); 507 sysmon_envsys_sensor_attach(sc->sc_sme, e); 508 509 e = &sc->sc_sensor[AXP_SENSOR_BATT_CHARGE_STATE]; 510 e->private = AXP_SENSOR_BATT_CHARGE_STATE; 511 e->units = ENVSYS_BATTERY_CAPACITY; 512 e->flags = ENVSYS_FMONSTCHANGED; 513 e->state = ENVSYS_SVALID; 514 e->value_cur = ENVSYS_BATTERY_CAPACITY_NORMAL; 515 strlcpy(e->desc, "charge state", sizeof(e->desc)); 516 sysmon_envsys_sensor_attach(sc->sc_sme, e); 517 518 if (sc->sc_has_fuel_gauge) { 519 e = &sc->sc_sensor[AXP_SENSOR_BATT_CAPACITY]; 520 e->private = AXP_SENSOR_BATT_CAPACITY; 521 e->units = ENVSYS_INTEGER; 522 e->state = ENVSYS_SINVALID; 523 e->flags = ENVSYS_FPERCENT; 524 strlcpy(e->desc, "battery percent", sizeof(e->desc)); 525 sysmon_envsys_sensor_attach(sc->sc_sme, e); 526 } 527 } 528 529 static void 530 axppmic_attach_sensors(struct axppmic_softc *sc) 531 { 532 if (sc->sc_has_battery) { 533 sc->sc_sme = sysmon_envsys_create(); 534 sc->sc_sme->sme_name = device_xname(sc->sc_dev); 535 sc->sc_sme->sme_cookie = sc; 536 sc->sc_sme->sme_refresh = axppmic_sensor_refresh; 537 sc->sc_sme->sme_class = SME_CLASS_BATTERY; 538 sc->sc_sme->sme_flags = SME_INIT_REFRESH; 539 540 axppmic_attach_acadapter(sc); 541 axppmic_attach_battery(sc); 542 543 sysmon_envsys_register(sc->sc_sme); 544 } 545 } 546 547 548 static int 549 axppmic_match(device_t parent, cfdata_t match, void *aux) 550 { 551 struct i2c_attach_args *ia = aux; 552 553 if (ia->ia_name != NULL) { 554 if (ia->ia_cookie) 555 return of_match_compat_data(ia->ia_cookie, compat_data); 556 else 557 return 0; 558 } 559 560 return 1; 561 } 562 563 static void 564 axppmic_attach(device_t parent, device_t self, void *aux) 565 { 566 struct axppmic_softc *sc = device_private(self); 567 const struct axppmic_config *c; 568 struct axpreg_attach_args aaa; 569 struct i2c_attach_args *ia = aux; 570 int phandle, child, i; 571 uint32_t irq_mask; 572 void *ih; 573 574 c = (void *)of_search_compatible(ia->ia_cookie, compat_data)->data; 575 576 sc->sc_dev = self; 577 sc->sc_i2c = ia->ia_tag; 578 sc->sc_addr = ia->ia_addr; 579 sc->sc_phandle = ia->ia_cookie; 580 sc->sc_has_battery = c->has_battery; 581 sc->sc_has_fuel_gauge = c->has_fuel_gauge; 582 sc->sc_irq_regs = c->irq_regs; 583 sc->sc_poklirq_reg = c->poklirq_reg; 584 sc->sc_poklirq_mask = c->poklirq_mask; 585 586 aprint_naive("\n"); 587 aprint_normal(": %s\n", c->name); 588 589 sc->sc_smpsw.smpsw_name = device_xname(self); 590 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_POWER; 591 sysmon_pswitch_register(&sc->sc_smpsw); 592 593 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL); 594 for (i = 1; i <= c->irq_regs; i++) { 595 irq_mask = 0; 596 if (i == c->poklirq_reg) 597 irq_mask |= c->poklirq_mask; 598 axppmic_write(sc->sc_i2c, sc->sc_addr, AXP_IRQ_ENABLE_REG(i), irq_mask, I2C_F_POLL); 599 } 600 iic_release_bus(sc->sc_i2c, I2C_F_POLL); 601 602 ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, FDT_INTR_MPSAFE, 603 axppmic_intr, sc); 604 if (ih == NULL) { 605 aprint_error_dev(self, "WARNING: couldn't establish interrupt handler\n"); 606 } 607 608 fdtbus_register_power_controller(sc->sc_dev, sc->sc_phandle, 609 &axppmic_power_funcs); 610 611 phandle = of_find_firstchild_byname(sc->sc_phandle, "regulators"); 612 if (phandle > 0) { 613 aaa.reg_i2c = sc->sc_i2c; 614 aaa.reg_addr = sc->sc_addr; 615 for (i = 0; i < c->ncontrols; i++) { 616 const struct axppmic_ctrl *ctrl = &c->controls[i]; 617 child = of_find_firstchild_byname(phandle, ctrl->c_name); 618 if (child <= 0) 619 continue; 620 aaa.reg_ctrl = ctrl; 621 aaa.reg_phandle = child; 622 config_found(sc->sc_dev, &aaa, NULL); 623 } 624 } 625 626 if (c->has_battery) 627 axppmic_attach_sensors(sc); 628 } 629 630 static int 631 axpreg_acquire(device_t dev) 632 { 633 return 0; 634 } 635 636 static void 637 axpreg_release(device_t dev) 638 { 639 } 640 641 static int 642 axpreg_enable(device_t dev, bool enable) 643 { 644 struct axpreg_softc *sc = device_private(dev); 645 const struct axppmic_ctrl *c = sc->sc_ctrl; 646 const int flags = (cold ? I2C_F_POLL : 0); 647 uint8_t val; 648 int error; 649 650 if (!c->c_enable_mask) 651 return EINVAL; 652 653 iic_acquire_bus(sc->sc_i2c, flags); 654 if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) { 655 if (enable) 656 val |= c->c_enable_mask; 657 else 658 val &= ~c->c_enable_mask; 659 error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags); 660 } 661 iic_release_bus(sc->sc_i2c, flags); 662 663 return error; 664 } 665 666 static int 667 axpreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol) 668 { 669 struct axpreg_softc *sc = device_private(dev); 670 const struct axppmic_ctrl *c = sc->sc_ctrl; 671 672 return axppmic_set_voltage(sc->sc_i2c, sc->sc_addr, c, 673 min_uvol / 1000, max_uvol / 1000); 674 } 675 676 static int 677 axpreg_get_voltage(device_t dev, u_int *puvol) 678 { 679 struct axpreg_softc *sc = device_private(dev); 680 const struct axppmic_ctrl *c = sc->sc_ctrl; 681 int error; 682 u_int vol; 683 684 error = axppmic_get_voltage(sc->sc_i2c, sc->sc_addr, c, &vol); 685 if (error) 686 return error; 687 688 *puvol = vol * 1000; 689 return 0; 690 } 691 692 static struct fdtbus_regulator_controller_func axpreg_funcs = { 693 .acquire = axpreg_acquire, 694 .release = axpreg_release, 695 .enable = axpreg_enable, 696 .set_voltage = axpreg_set_voltage, 697 .get_voltage = axpreg_get_voltage, 698 }; 699 700 static int 701 axpreg_match(device_t parent, cfdata_t match, void *aux) 702 { 703 return 1; 704 } 705 706 static void 707 axpreg_attach(device_t parent, device_t self, void *aux) 708 { 709 struct axpreg_softc *sc = device_private(self); 710 struct axpreg_attach_args *aaa = aux; 711 const int phandle = aaa->reg_phandle; 712 const char *name; 713 714 sc->sc_dev = self; 715 sc->sc_i2c = aaa->reg_i2c; 716 sc->sc_addr = aaa->reg_addr; 717 sc->sc_ctrl = aaa->reg_ctrl; 718 719 fdtbus_register_regulator_controller(self, phandle, 720 &axpreg_funcs); 721 722 aprint_naive("\n"); 723 name = fdtbus_get_string(phandle, "regulator-name"); 724 if (name) 725 aprint_normal(": %s\n", name); 726 else 727 aprint_normal("\n"); 728 } 729 730 CFATTACH_DECL_NEW(axppmic, sizeof(struct axppmic_softc), 731 axppmic_match, axppmic_attach, NULL, NULL); 732 733 CFATTACH_DECL_NEW(axpreg, sizeof(struct axpreg_softc), 734 axpreg_match, axpreg_attach, NULL, NULL); 735
Indexes created Fri Oct 03 02:09:57 GMT 2025