Home | History | Annotate | Line # | Download | only in i2c
gttwsi_core.c revision 1.12
      1 /*	$NetBSD: gttwsi_core.c,v 1.12 2020/01/12 17:48:42 thorpej Exp $	*/
      2 /*
      3  * Copyright (c) 2008 Eiji Kawauchi.
      4  * All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *      This product includes software developed for the NetBSD Project by
     17  *      Eiji Kawauchi.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 /*
     33  * Copyright (c) 2005 Brocade Communcations, inc.
     34  * All rights reserved.
     35  *
     36  * Written by Matt Thomas for Brocade Communcations, Inc.
     37  *
     38  * Redistribution and use in source and binary forms, with or without
     39  * modification, are permitted provided that the following conditions
     40  * are met:
     41  * 1. Redistributions of source code must retain the above copyright
     42  *    notice, this list of conditions and the following disclaimer.
     43  * 2. Redistributions in binary form must reproduce the above copyright
     44  *    notice, this list of conditions and the following disclaimer in the
     45  *    documentation and/or other materials provided with the distribution.
     46  * 3. The name of Brocade Communications, Inc. may not be used to endorse
     47  *    or promote products derived from this software without specific prior
     48  *    written permission.
     49  *
     50  * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND
     51  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     52  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     53  * ARE DISCLAIMED.  IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE
     54  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     55  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     56  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     57  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     58  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     59  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
     60  * OF THE POSSIBILITY OF SUCH DAMAGE.
     61  */
     62 //#define TWSI_DEBUG
     63 
     64 /*
     65  * Marvell Two-Wire Serial Interface (aka I2C) master driver
     66  */
     67 
     68 #include <sys/cdefs.h>
     69 __KERNEL_RCSID(0, "$NetBSD: gttwsi_core.c,v 1.12 2020/01/12 17:48:42 thorpej Exp $");
     70 #include "locators.h"
     71 
     72 #include <sys/param.h>
     73 #include <sys/bus.h>
     74 #include <sys/condvar.h>
     75 #include <sys/device.h>
     76 #include <sys/errno.h>
     77 #include <sys/kernel.h>
     78 #include <sys/mutex.h>
     79 #include <sys/systm.h>
     80 
     81 #include <dev/i2c/i2cvar.h>
     82 
     83 #include <dev/i2c/gttwsireg.h>
     84 #include <dev/i2c/gttwsivar.h>
     85 
     86 static int	gttwsi_send_start(void *v, int flags);
     87 static int	gttwsi_send_stop(void *v, int flags);
     88 static int	gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags);
     89 static int	gttwsi_read_byte(void *v, uint8_t *valp, int flags);
     90 static int	gttwsi_write_byte(void *v, uint8_t val, int flags);
     91 
     92 static int	gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t,
     93 			    uint32_t, int);
     94 
     95 uint32_t
     96 gttwsi_read_4(struct gttwsi_softc *sc, uint32_t reg)
     97 {
     98 	const uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush,
     99 					      sc->sc_regmap[reg]);
    100 #ifdef TWSI_DEBUG
    101 	printf("I2C:R:[%u]%02x:%02x\n", reg, sc->sc_regmap[reg], val);
    102 #else
    103 	DELAY(TWSI_READ_DELAY);
    104 #endif
    105 	return val;
    106 }
    107 
    108 void
    109 gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val)
    110 {
    111 
    112 	bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);
    113 #ifdef TWSI_DEBUG
    114 	printf("I2C:W:[%u]%02x:%02x\n", reg, sc->sc_regmap[reg], val);
    115 #else
    116 	DELAY(TWSI_WRITE_DELAY);
    117 #endif
    118 }
    119 
    120 /* ARGSUSED */
    121 void
    122 gttwsi_attach_subr(device_t self, bus_space_tag_t iot, bus_space_handle_t ioh,
    123 		   const bus_size_t *regmap)
    124 {
    125 	struct gttwsi_softc * const sc = device_private(self);
    126 	prop_dictionary_t cfg = device_properties(self);
    127 
    128 	aprint_naive("\n");
    129 	aprint_normal(": Marvell TWSI controller\n");
    130 
    131 	sc->sc_dev = self;
    132 	sc->sc_bust = iot;
    133 	sc->sc_bush = ioh;
    134 	sc->sc_regmap = regmap;
    135 
    136 	mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO);
    137 	cv_init(&sc->sc_cv, device_xname(self));
    138 
    139 	prop_dictionary_get_bool(cfg, "iflg-rwc", &sc->sc_iflg_rwc);
    140 
    141 	sc->sc_started = false;
    142 	iic_tag_init(&sc->sc_i2c);
    143 	sc->sc_i2c.ic_cookie = sc;
    144 	sc->sc_i2c.ic_send_start = gttwsi_send_start;
    145 	sc->sc_i2c.ic_send_stop = gttwsi_send_stop;
    146 	sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer;
    147 	sc->sc_i2c.ic_read_byte = gttwsi_read_byte;
    148 	sc->sc_i2c.ic_write_byte = gttwsi_write_byte;
    149 
    150 	/*
    151 	 * Put the controller into Soft Reset.
    152 	 */
    153 	/* reset */
    154 	gttwsi_write_4(sc, TWSI_SOFTRESET, SOFTRESET_VAL);
    155 }
    156 
    157 void
    158 gttwsi_config_children(device_t self)
    159 {
    160 	struct gttwsi_softc * const sc = device_private(self);
    161 	struct i2cbus_attach_args iba;
    162 
    163 	memset(&iba, 0, sizeof(iba));
    164 	iba.iba_tag = &sc->sc_i2c;
    165 
    166 	(void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
    167 }
    168 
    169 int
    170 gttwsi_intr(void *arg)
    171 {
    172 	struct gttwsi_softc *sc = arg;
    173 	uint32_t val;
    174 
    175 	mutex_enter(&sc->sc_mtx);
    176 	val = gttwsi_read_4(sc, TWSI_CONTROL);
    177 	if (val & CONTROL_IFLG) {
    178 		gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN);
    179 		cv_broadcast(&sc->sc_cv);
    180 		mutex_exit(&sc->sc_mtx);
    181 		return 1;	/* handled */
    182 	}
    183 	mutex_exit(&sc->sc_mtx);
    184 	return 0;
    185 }
    186 
    187 static int
    188 gttwsi_send_start(void *v, int flags)
    189 {
    190 	struct gttwsi_softc *sc = v;
    191 	int expect;
    192 
    193 	if (sc->sc_started)
    194 		expect = STAT_RSCT;
    195 	else
    196 		expect = STAT_SCT;
    197 	sc->sc_started = true;
    198 	return gttwsi_wait(sc, CONTROL_START, expect, 0, flags);
    199 }
    200 
    201 static int
    202 gttwsi_send_stop(void *v, int flags)
    203 {
    204 	struct gttwsi_softc *sc = v;
    205 	int retry = TWSI_RETRY_COUNT;
    206 	uint32_t control;
    207 
    208 	sc->sc_started = false;
    209 
    210 	/* Interrupt is not generated for STAT_NRS. */
    211 	control = CONTROL_STOP | CONTROL_TWSIEN;
    212 	if (sc->sc_iflg_rwc)
    213 		control |= CONTROL_IFLG;
    214 	gttwsi_write_4(sc, TWSI_CONTROL, control);
    215 	while (retry > 0) {
    216 		if (gttwsi_read_4(sc, TWSI_STATUS) == STAT_NRS)
    217 			return 0;
    218 		retry--;
    219 		DELAY(TWSI_STAT_DELAY);
    220 	}
    221 
    222 	aprint_error_dev(sc->sc_dev, "send STOP failed\n");
    223 	return -1;
    224 }
    225 
    226 static int
    227 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags)
    228 {
    229 	struct gttwsi_softc *sc = v;
    230 	uint32_t data, expect, alt;
    231 	int error, read;
    232 
    233 	error = gttwsi_send_start(v, flags);
    234 	if (error)
    235 		return error;
    236 
    237 	read = (flags & I2C_F_READ) != 0;
    238 	if (read) {
    239 		expect = STAT_ARBT_AR;
    240 		alt    = STAT_ARBT_ANR;
    241 	} else {
    242 		expect = STAT_AWBT_AR;
    243 		alt    = STAT_AWBT_ANR;
    244 	}
    245 
    246 	/*
    247 	 * First byte contains whether this xfer is a read or write.
    248 	 */
    249 	data = read;
    250 	if (addr > 0x7f) {
    251 		/*
    252 		 * If this is a 10bit request, the first address byte is
    253 		 * 0b11110<b9><b8><r/w>.
    254 		 */
    255 		data |= 0xf0 | ((addr & 0x300) >> 7);
    256 		gttwsi_write_4(sc, TWSI_DATA, data);
    257 		error = gttwsi_wait(sc, 0, expect, alt, flags);
    258 		if (error)
    259 			return error;
    260 		/*
    261 		 * The first address byte has been sent, now to send
    262 		 * the second one.
    263 		 */
    264 		if (read) {
    265 			expect = STAT_SARBT_AR;
    266 			alt    = STAT_SARBT_ANR;
    267 		} else {
    268 			expect = STAT_SAWBT_AR;
    269 			alt    = STAT_SAWBT_ANR;
    270 		}
    271 		data = (uint8_t)addr;
    272 	} else
    273 		data |= (addr << 1);
    274 
    275 	gttwsi_write_4(sc, TWSI_DATA, data);
    276 	return gttwsi_wait(sc, 0, expect, alt, flags);
    277 }
    278 
    279 static int
    280 gttwsi_read_byte(void *v, uint8_t *valp, int flags)
    281 {
    282 	struct gttwsi_softc *sc = v;
    283 	int error;
    284 
    285 	if (flags & I2C_F_LAST)
    286 		error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, 0, flags);
    287 	else
    288 		error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, 0, flags);
    289 	if (!error)
    290 		*valp = gttwsi_read_4(sc, TWSI_DATA);
    291 	if ((flags & (I2C_F_LAST | I2C_F_STOP)) == (I2C_F_LAST | I2C_F_STOP))
    292 		error = gttwsi_send_stop(sc, flags);
    293 	return error;
    294 }
    295 
    296 static int
    297 gttwsi_write_byte(void *v, uint8_t val, int flags)
    298 {
    299 	struct gttwsi_softc *sc = v;
    300 	int error;
    301 
    302 	gttwsi_write_4(sc, TWSI_DATA, val);
    303 	error = gttwsi_wait(sc, 0, STAT_MTDB_AR, 0, flags);
    304 	if (flags & I2C_F_STOP)
    305 		gttwsi_send_stop(sc, flags);
    306 	return error;
    307 }
    308 
    309 static int
    310 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect,
    311 	    uint32_t alt, int flags)
    312 {
    313 	uint32_t status;
    314 	int timo, error = 0;
    315 
    316 	DELAY(5);
    317 	if (!(flags & I2C_F_POLL))
    318 		control |= CONTROL_INTEN;
    319 	if (sc->sc_iflg_rwc)
    320 		control |= CONTROL_IFLG;
    321 	mutex_enter(&sc->sc_mtx);
    322 	gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN);
    323 
    324 	timo = 0;
    325 	for (;;) {
    326 		control = gttwsi_read_4(sc, TWSI_CONTROL);
    327 		if (control & CONTROL_IFLG)
    328 			break;
    329 		if (!(flags & I2C_F_POLL)) {
    330 			error = cv_timedwait(&sc->sc_cv, &sc->sc_mtx, hz);
    331 			if (error)
    332 				break;
    333 		} else {
    334 			DELAY(TWSI_RETRY_DELAY);
    335 			if (timo++ > 1000000)	/* 1sec */
    336 				break;
    337 		}
    338 	}
    339 	if ((control & CONTROL_IFLG) == 0) {
    340 		aprint_error_dev(sc->sc_dev,
    341 		    "gttwsi_wait(): timeout, control=0x%x\n", control);
    342 		error = EWOULDBLOCK;
    343 		goto end;
    344 	}
    345 	status = gttwsi_read_4(sc, TWSI_STATUS);
    346 	if (status != expect) {
    347 		/*
    348 		 * In the case of probing for a device, we are expecting
    349 		 * 2 different status codes: the ACK case (device exists),
    350 		 * or the NACK case (device does not exist).  We don't
    351 		 * need to report an error in the later case.
    352 		 */
    353 		if (alt != 0 && status != alt)
    354 			aprint_error_dev(sc->sc_dev,
    355 			    "unexpected status 0x%x: expect 0x%x\n", status,
    356 			    expect);
    357 		error = EIO;
    358 	}
    359 end:
    360 	mutex_exit(&sc->sc_mtx);
    361 	return error;
    362 }
    363