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gttwsi_core.c revision 1.17
      1 /*	$NetBSD: gttwsi_core.c,v 1.17 2021/04/24 23:36:54 thorpej Exp $	*/
      2 /*
      3  * Copyright (c) 2008 Eiji Kawauchi.
      4  * All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *      This product includes software developed for the NetBSD Project by
     17  *      Eiji Kawauchi.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 /*
     33  * Copyright (c) 2005 Brocade Communcations, inc.
     34  * All rights reserved.
     35  *
     36  * Written by Matt Thomas for Brocade Communcations, Inc.
     37  *
     38  * Redistribution and use in source and binary forms, with or without
     39  * modification, are permitted provided that the following conditions
     40  * are met:
     41  * 1. Redistributions of source code must retain the above copyright
     42  *    notice, this list of conditions and the following disclaimer.
     43  * 2. Redistributions in binary form must reproduce the above copyright
     44  *    notice, this list of conditions and the following disclaimer in the
     45  *    documentation and/or other materials provided with the distribution.
     46  * 3. The name of Brocade Communications, Inc. may not be used to endorse
     47  *    or promote products derived from this software without specific prior
     48  *    written permission.
     49  *
     50  * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND
     51  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     52  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     53  * ARE DISCLAIMED.  IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE
     54  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     55  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     56  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     57  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     58  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     59  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
     60  * OF THE POSSIBILITY OF SUCH DAMAGE.
     61  */
     62 //#define TWSI_DEBUG
     63 
     64 /*
     65  * Marvell Two-Wire Serial Interface (aka I2C) master driver
     66  */
     67 
     68 #include <sys/cdefs.h>
     69 __KERNEL_RCSID(0, "$NetBSD: gttwsi_core.c,v 1.17 2021/04/24 23:36:54 thorpej Exp $");
     70 #include "locators.h"
     71 
     72 #include <sys/param.h>
     73 #include <sys/bus.h>
     74 #include <sys/condvar.h>
     75 #include <sys/device.h>
     76 #include <sys/errno.h>
     77 #include <sys/kernel.h>
     78 #include <sys/mutex.h>
     79 #include <sys/systm.h>
     80 
     81 #include <dev/i2c/i2cvar.h>
     82 
     83 #include <dev/i2c/gttwsireg.h>
     84 #include <dev/i2c/gttwsivar.h>
     85 
     86 static int	gttwsi_send_start(void *v, int flags);
     87 static int	gttwsi_send_stop(void *v, int flags);
     88 static int	gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags);
     89 static int	gttwsi_read_byte(void *v, uint8_t *valp, int flags);
     90 static int	gttwsi_write_byte(void *v, uint8_t val, int flags);
     91 
     92 static int	gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t,
     93 			    uint32_t, int, const char *);
     94 
     95 uint32_t
     96 gttwsi_read_4(struct gttwsi_softc *sc, uint32_t reg)
     97 {
     98 	const uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush,
     99 					      sc->sc_regmap[reg]);
    100 #ifdef TWSI_DEBUG
    101 	printf("I2C:R:[%" PRIu32 "]%02" PRIxBUSSIZE ":%02" PRIx32 "\n", reg, sc->sc_regmap[reg], val);
    102 #else
    103 	DELAY(TWSI_READ_DELAY);
    104 #endif
    105 	return val;
    106 }
    107 
    108 void
    109 gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val)
    110 {
    111 
    112 	bus_space_write_4(sc->sc_bust, sc->sc_bush, sc->sc_regmap[reg], val);
    113 #ifdef TWSI_DEBUG
    114 	printf("I2C:W:[%" PRIu32 "]%02" PRIxBUSSIZE ":%02" PRIx32 "\n", reg, sc->sc_regmap[reg], val);
    115 #else
    116 	DELAY(TWSI_WRITE_DELAY);
    117 #endif
    118 }
    119 
    120 /* ARGSUSED */
    121 void
    122 gttwsi_attach_subr(device_t self, bus_space_tag_t iot, bus_space_handle_t ioh,
    123 		   const bus_size_t *regmap)
    124 {
    125 	struct gttwsi_softc * const sc = device_private(self);
    126 	prop_dictionary_t cfg = device_properties(self);
    127 
    128 	aprint_naive("\n");
    129 	aprint_normal(": Marvell TWSI controller\n");
    130 
    131 	sc->sc_dev = self;
    132 	sc->sc_bust = iot;
    133 	sc->sc_bush = ioh;
    134 	sc->sc_regmap = regmap;
    135 
    136 	mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO);
    137 	cv_init(&sc->sc_cv, device_xname(self));
    138 
    139 	prop_dictionary_get_bool(cfg, "iflg-rwc", &sc->sc_iflg_rwc);
    140 
    141 	sc->sc_started = false;
    142 	iic_tag_init(&sc->sc_i2c);
    143 	sc->sc_i2c.ic_cookie = sc;
    144 	sc->sc_i2c.ic_send_start = gttwsi_send_start;
    145 	sc->sc_i2c.ic_send_stop = gttwsi_send_stop;
    146 	sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer;
    147 	sc->sc_i2c.ic_read_byte = gttwsi_read_byte;
    148 	sc->sc_i2c.ic_write_byte = gttwsi_write_byte;
    149 
    150 	/*
    151 	 * Put the controller into Soft Reset.
    152 	 */
    153 	/* reset */
    154 	gttwsi_write_4(sc, TWSI_SOFTRESET, SOFTRESET_VAL);
    155 }
    156 
    157 void
    158 gttwsi_config_children(device_t self)
    159 {
    160 	struct gttwsi_softc * const sc = device_private(self);
    161 	struct i2cbus_attach_args iba;
    162 
    163 	memset(&iba, 0, sizeof(iba));
    164 	iba.iba_tag = &sc->sc_i2c;
    165 
    166 	config_found(sc->sc_dev, &iba, iicbus_print,
    167 	    CFARG_IATTR, "i2cbus",
    168 	    CFARG_EOL);
    169 }
    170 
    171 int
    172 gttwsi_intr(void *arg)
    173 {
    174 	struct gttwsi_softc *sc = arg;
    175 	uint32_t val;
    176 
    177 	mutex_enter(&sc->sc_mtx);
    178 	val = gttwsi_read_4(sc, TWSI_CONTROL);
    179 	if (val & CONTROL_IFLG) {
    180 		gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN);
    181 		cv_broadcast(&sc->sc_cv);
    182 		mutex_exit(&sc->sc_mtx);
    183 		return 1;	/* handled */
    184 	}
    185 	mutex_exit(&sc->sc_mtx);
    186 	return 0;
    187 }
    188 
    189 static int
    190 gttwsi_send_start(void *v, int flags)
    191 {
    192 	struct gttwsi_softc *sc = v;
    193 	int expect;
    194 
    195 	if (sc->sc_started)
    196 		expect = STAT_RSCT;
    197 	else
    198 		expect = STAT_SCT;
    199 	sc->sc_started = true;
    200 	return gttwsi_wait(sc, CONTROL_START, expect, 0, flags, "send-start");
    201 }
    202 
    203 static int
    204 gttwsi_send_stop(void *v, int flags)
    205 {
    206 	struct gttwsi_softc *sc = v;
    207 	int retry = TWSI_RETRY_COUNT;
    208 	uint32_t control, status;
    209 
    210 	sc->sc_started = false;
    211 
    212 	/* Interrupt is not generated for STAT_NRS. */
    213 	control = CONTROL_STOP | CONTROL_TWSIEN;
    214 	if (sc->sc_iflg_rwc)
    215 		control |= CONTROL_IFLG;
    216 	gttwsi_write_4(sc, TWSI_CONTROL, control);
    217 	while (retry > 0) {
    218 		if ((status = gttwsi_read_4(sc, TWSI_STATUS)) == STAT_NRS)
    219 			return 0;
    220 		retry--;
    221 		DELAY(TWSI_STAT_DELAY);
    222 	}
    223 
    224 	aprint_error_dev(sc->sc_dev, "send STOP failed, status=0x%02x\n",
    225 			 status);
    226 	return EWOULDBLOCK;
    227 }
    228 
    229 static int
    230 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags)
    231 {
    232 	struct gttwsi_softc *sc = v;
    233 	uint32_t data, expect, alt;
    234 	int error, read;
    235 
    236 	error = gttwsi_send_start(v, flags);
    237 	if (error)
    238 		return error;
    239 
    240 	read = (flags & I2C_F_READ) != 0;
    241 	if (read) {
    242 		expect = STAT_ARBT_AR;
    243 		alt    = STAT_ARBT_ANR;
    244 	} else {
    245 		expect = STAT_AWBT_AR;
    246 		alt    = STAT_AWBT_ANR;
    247 	}
    248 
    249 	/*
    250 	 * First byte contains whether this xfer is a read or write.
    251 	 */
    252 	data = read;
    253 	if (addr > 0x7f) {
    254 		/*
    255 		 * If this is a 10bit request, the first address byte is
    256 		 * 0b11110<b9><b8><r/w>.
    257 		 */
    258 		data |= 0xf0 | ((addr & 0x300) >> 7);
    259 		gttwsi_write_4(sc, TWSI_DATA, data);
    260 		error = gttwsi_wait(sc, 0, expect, alt, flags, "send-addr-10");
    261 		if (error)
    262 			return error;
    263 		/*
    264 		 * The first address byte has been sent, now to send
    265 		 * the second one.
    266 		 */
    267 		if (read) {
    268 			expect = STAT_SARBT_AR;
    269 			alt    = STAT_SARBT_ANR;
    270 		} else {
    271 			expect = STAT_SAWBT_AR;
    272 			alt    = STAT_SAWBT_ANR;
    273 		}
    274 		data = (uint8_t)addr;
    275 	} else
    276 		data |= (addr << 1);
    277 
    278 	gttwsi_write_4(sc, TWSI_DATA, data);
    279 	return gttwsi_wait(sc, 0, expect, alt, flags, "send-addr");
    280 }
    281 
    282 static int
    283 gttwsi_read_byte(void *v, uint8_t *valp, int flags)
    284 {
    285 	struct gttwsi_softc *sc = v;
    286 	int error;
    287 
    288 	if (flags & I2C_F_LAST) {
    289 		error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, 0, flags,
    290 				    "read-last-byte");
    291 	} else {
    292 		error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, 0, flags,
    293 				    "read-byte");
    294 	}
    295 	if (!error)
    296 		*valp = gttwsi_read_4(sc, TWSI_DATA);
    297 	if ((flags & (I2C_F_LAST | I2C_F_STOP)) == (I2C_F_LAST | I2C_F_STOP))
    298 		error = gttwsi_send_stop(sc, flags);
    299 	return error;
    300 }
    301 
    302 static int
    303 gttwsi_write_byte(void *v, uint8_t val, int flags)
    304 {
    305 	struct gttwsi_softc *sc = v;
    306 	int error;
    307 
    308 	gttwsi_write_4(sc, TWSI_DATA, val);
    309 	error = gttwsi_wait(sc, 0, STAT_MTDB_AR, 0, flags, "write-byte");
    310 	if (flags & I2C_F_STOP)
    311 		gttwsi_send_stop(sc, flags);
    312 	return error;
    313 }
    314 
    315 static int
    316 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect,
    317 	    uint32_t alt, int flags, const char *what)
    318 {
    319 	uint32_t status;
    320 	int timo, error = 0;
    321 
    322 	/*
    323 	 * XXX Interrupt-driven mode seems to be horribly broken,
    324 	 * XXX at least on AllWinner implementations.  Force polled
    325 	 * XXX mode for now.
    326 	 */
    327 	flags |= I2C_F_POLL;
    328 
    329 	DELAY(5);
    330 	if (!(flags & I2C_F_POLL))
    331 		control |= CONTROL_INTEN;
    332 	if (sc->sc_iflg_rwc)
    333 		control |= CONTROL_IFLG;
    334 	mutex_enter(&sc->sc_mtx);
    335 	gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN);
    336 
    337 	timo = 0;
    338 	for (;;) {
    339 		control = gttwsi_read_4(sc, TWSI_CONTROL);
    340 		if (control & CONTROL_IFLG)
    341 			break;
    342 		if (!(flags & I2C_F_POLL)) {
    343 			error = cv_timedwait(&sc->sc_cv, &sc->sc_mtx, hz);
    344 			if (error) {
    345 				break;
    346 			}
    347 		} else {
    348 			DELAY(TWSI_RETRY_DELAY);
    349 			if (timo++ > 1000000)	/* 1sec */
    350 				break;
    351 		}
    352 	}
    353 	if ((control & CONTROL_IFLG) == 0) {
    354 		/*
    355 		 * error is set by the cv_timedwait() call above in the
    356 		 * non-polled case.
    357 		 */
    358 		if (flags & I2C_F_POLL) {
    359 			error = EWOULDBLOCK;
    360 		} else {
    361 			KASSERT(error != 0);
    362 		}
    363 		aprint_error_dev(sc->sc_dev,
    364 		    "gttwsi_wait(): %s timeout%s, control=0x%x, error=%d\n",
    365 		    what, (flags & I2C_F_POLL) ? " (polled)" : "",
    366 		    control, error);
    367 		goto end;
    368 	}
    369 	status = gttwsi_read_4(sc, TWSI_STATUS);
    370 	if (status != expect) {
    371 		/*
    372 		 * In the case of probing for a device, we are expecting
    373 		 * 2 different status codes: the ACK case (device exists),
    374 		 * or the NACK case (device does not exist).  We don't
    375 		 * need to report an error in the later case.
    376 		 */
    377 		if (alt != 0 && status != alt)
    378 			aprint_error_dev(sc->sc_dev,
    379 			    "unexpected status 0x%x: expect 0x%x\n", status,
    380 			    expect);
    381 		error = EIO;
    382 	}
    383  end:
    384 	mutex_exit(&sc->sc_mtx);
    385 	return error;
    386 }
    387