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gttwsi_core.c revision 1.18
      1 /*	$NetBSD: gttwsi_core.c,v 1.18 2021/08/07 16:19:11 thorpej Exp $	*/
      2 /*
      3  * Copyright (c) 2008 Eiji Kawauchi.
      4  * All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *      This product includes software developed for the NetBSD Project by
     17  *      Eiji Kawauchi.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 /*
     33  * Copyright (c) 2005 Brocade Communcations, inc.
     34  * All rights reserved.
     35  *
     36  * Written by Matt Thomas for Brocade Communcations, Inc.
     37  *
     38  * Redistribution and use in source and binary forms, with or without
     39  * modification, are permitted provided that the following conditions
     40  * are met:
     41  * 1. Redistributions of source code must retain the above copyright
     42  *    notice, this list of conditions and the following disclaimer.
     43  * 2. Redistributions in binary form must reproduce the above copyright
     44  *    notice, this list of conditions and the following disclaimer in the
     45  *    documentation and/or other materials provided with the distribution.
     46  * 3. The name of Brocade Communications, Inc. may not be used to endorse
     47  *    or promote products derived from this software without specific prior
     48  *    written permission.
     49  *
     50  * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND
     51  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     52  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     53  * ARE DISCLAIMED.  IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE
     54  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     55  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     56  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     57  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     58  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     59  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
     60  * OF THE POSSIBILITY OF SUCH DAMAGE.
     61  */
     62 //#define TWSI_DEBUG
     63 
     64 /*
     65  * Marvell Two-Wire Serial Interface (aka I2C) master driver
     66  */
     67 
     68 #include <sys/cdefs.h>
     69 __KERNEL_RCSID(0, "$NetBSD: gttwsi_core.c,v 1.18 2021/08/07 16:19:11 thorpej Exp $");
     70 #include "locators.h"
     71 
     72 #include <sys/param.h>
     73 #include <sys/bus.h>
     74 #include <sys/condvar.h>
     75 #include <sys/device.h>
     76 #include <sys/errno.h>
     77 #include <sys/kernel.h>
     78 #include <sys/mutex.h>
     79 #include <sys/systm.h>
     80 
     81 #include <dev/i2c/i2cvar.h>
     82 
     83 #include <dev/i2c/gttwsireg.h>
     84 #include <dev/i2c/gttwsivar.h>
     85 
     86 static int	gttwsi_send_start(void *v, int flags);
     87 static int	gttwsi_send_stop(void *v, int flags);
     88 static int	gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags);
     89 static int	gttwsi_read_byte(void *v, uint8_t *valp, int flags);
     90 static int	gttwsi_write_byte(void *v, uint8_t val, int flags);
     91 
     92 static int	gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t,
     93 			    uint32_t, int, const char *);
     94 
     95 uint32_t
     96 gttwsi_read_4(struct gttwsi_softc *sc, uint32_t reg)
     97 {
     98 	const uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush,
     99 					      sc->sc_regmap[reg]);
    100 #ifdef TWSI_DEBUG
    101 	printf("I2C:R:[%" PRIu32 "]%02" PRIxBUSSIZE ":%02" PRIx32 "\n", reg, sc->sc_regmap[reg], val);
    102 #else
    103 	DELAY(TWSI_READ_DELAY);
    104 #endif
    105 	return val;
    106 }
    107 
    108 void
    109 gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val)
    110 {
    111 
    112 	bus_space_write_4(sc->sc_bust, sc->sc_bush, sc->sc_regmap[reg], val);
    113 #ifdef TWSI_DEBUG
    114 	printf("I2C:W:[%" PRIu32 "]%02" PRIxBUSSIZE ":%02" PRIx32 "\n", reg, sc->sc_regmap[reg], val);
    115 #else
    116 	DELAY(TWSI_WRITE_DELAY);
    117 #endif
    118 }
    119 
    120 /* ARGSUSED */
    121 void
    122 gttwsi_attach_subr(device_t self, bus_space_tag_t iot, bus_space_handle_t ioh,
    123 		   const bus_size_t *regmap)
    124 {
    125 	struct gttwsi_softc * const sc = device_private(self);
    126 	prop_dictionary_t cfg = device_properties(self);
    127 
    128 	aprint_naive("\n");
    129 	aprint_normal(": Marvell TWSI controller\n");
    130 
    131 	sc->sc_dev = self;
    132 	sc->sc_bust = iot;
    133 	sc->sc_bush = ioh;
    134 	sc->sc_regmap = regmap;
    135 
    136 	mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO);
    137 	cv_init(&sc->sc_cv, device_xname(self));
    138 
    139 	prop_dictionary_get_bool(cfg, "iflg-rwc", &sc->sc_iflg_rwc);
    140 
    141 	sc->sc_started = false;
    142 	iic_tag_init(&sc->sc_i2c);
    143 	sc->sc_i2c.ic_cookie = sc;
    144 	sc->sc_i2c.ic_send_start = gttwsi_send_start;
    145 	sc->sc_i2c.ic_send_stop = gttwsi_send_stop;
    146 	sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer;
    147 	sc->sc_i2c.ic_read_byte = gttwsi_read_byte;
    148 	sc->sc_i2c.ic_write_byte = gttwsi_write_byte;
    149 
    150 	/*
    151 	 * Put the controller into Soft Reset.
    152 	 */
    153 	/* reset */
    154 	gttwsi_write_4(sc, TWSI_SOFTRESET, SOFTRESET_VAL);
    155 }
    156 
    157 void
    158 gttwsi_config_children(device_t self)
    159 {
    160 	struct gttwsi_softc * const sc = device_private(self);
    161 	struct i2cbus_attach_args iba;
    162 
    163 	memset(&iba, 0, sizeof(iba));
    164 	iba.iba_tag = &sc->sc_i2c;
    165 
    166 	config_found(sc->sc_dev, &iba, iicbus_print,
    167 	    CFARGS(.iattr = "i2cbus"));
    168 }
    169 
    170 int
    171 gttwsi_intr(void *arg)
    172 {
    173 	struct gttwsi_softc *sc = arg;
    174 	uint32_t val;
    175 
    176 	mutex_enter(&sc->sc_mtx);
    177 	val = gttwsi_read_4(sc, TWSI_CONTROL);
    178 	if (val & CONTROL_IFLG) {
    179 		gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN);
    180 		cv_broadcast(&sc->sc_cv);
    181 		mutex_exit(&sc->sc_mtx);
    182 		return 1;	/* handled */
    183 	}
    184 	mutex_exit(&sc->sc_mtx);
    185 	return 0;
    186 }
    187 
    188 static int
    189 gttwsi_send_start(void *v, int flags)
    190 {
    191 	struct gttwsi_softc *sc = v;
    192 	int expect;
    193 
    194 	if (sc->sc_started)
    195 		expect = STAT_RSCT;
    196 	else
    197 		expect = STAT_SCT;
    198 	sc->sc_started = true;
    199 	return gttwsi_wait(sc, CONTROL_START, expect, 0, flags, "send-start");
    200 }
    201 
    202 static int
    203 gttwsi_send_stop(void *v, int flags)
    204 {
    205 	struct gttwsi_softc *sc = v;
    206 	int retry = TWSI_RETRY_COUNT;
    207 	uint32_t control, status;
    208 
    209 	sc->sc_started = false;
    210 
    211 	/* Interrupt is not generated for STAT_NRS. */
    212 	control = CONTROL_STOP | CONTROL_TWSIEN;
    213 	if (sc->sc_iflg_rwc)
    214 		control |= CONTROL_IFLG;
    215 	gttwsi_write_4(sc, TWSI_CONTROL, control);
    216 	while (retry > 0) {
    217 		if ((status = gttwsi_read_4(sc, TWSI_STATUS)) == STAT_NRS)
    218 			return 0;
    219 		retry--;
    220 		DELAY(TWSI_STAT_DELAY);
    221 	}
    222 
    223 	aprint_error_dev(sc->sc_dev, "send STOP failed, status=0x%02x\n",
    224 			 status);
    225 	return EWOULDBLOCK;
    226 }
    227 
    228 static int
    229 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags)
    230 {
    231 	struct gttwsi_softc *sc = v;
    232 	uint32_t data, expect, alt;
    233 	int error, read;
    234 
    235 	error = gttwsi_send_start(v, flags);
    236 	if (error)
    237 		return error;
    238 
    239 	read = (flags & I2C_F_READ) != 0;
    240 	if (read) {
    241 		expect = STAT_ARBT_AR;
    242 		alt    = STAT_ARBT_ANR;
    243 	} else {
    244 		expect = STAT_AWBT_AR;
    245 		alt    = STAT_AWBT_ANR;
    246 	}
    247 
    248 	/*
    249 	 * First byte contains whether this xfer is a read or write.
    250 	 */
    251 	data = read;
    252 	if (addr > 0x7f) {
    253 		/*
    254 		 * If this is a 10bit request, the first address byte is
    255 		 * 0b11110<b9><b8><r/w>.
    256 		 */
    257 		data |= 0xf0 | ((addr & 0x300) >> 7);
    258 		gttwsi_write_4(sc, TWSI_DATA, data);
    259 		error = gttwsi_wait(sc, 0, expect, alt, flags, "send-addr-10");
    260 		if (error)
    261 			return error;
    262 		/*
    263 		 * The first address byte has been sent, now to send
    264 		 * the second one.
    265 		 */
    266 		if (read) {
    267 			expect = STAT_SARBT_AR;
    268 			alt    = STAT_SARBT_ANR;
    269 		} else {
    270 			expect = STAT_SAWBT_AR;
    271 			alt    = STAT_SAWBT_ANR;
    272 		}
    273 		data = (uint8_t)addr;
    274 	} else
    275 		data |= (addr << 1);
    276 
    277 	gttwsi_write_4(sc, TWSI_DATA, data);
    278 	return gttwsi_wait(sc, 0, expect, alt, flags, "send-addr");
    279 }
    280 
    281 static int
    282 gttwsi_read_byte(void *v, uint8_t *valp, int flags)
    283 {
    284 	struct gttwsi_softc *sc = v;
    285 	int error;
    286 
    287 	if (flags & I2C_F_LAST) {
    288 		error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, 0, flags,
    289 				    "read-last-byte");
    290 	} else {
    291 		error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, 0, flags,
    292 				    "read-byte");
    293 	}
    294 	if (!error)
    295 		*valp = gttwsi_read_4(sc, TWSI_DATA);
    296 	if ((flags & (I2C_F_LAST | I2C_F_STOP)) == (I2C_F_LAST | I2C_F_STOP))
    297 		error = gttwsi_send_stop(sc, flags);
    298 	return error;
    299 }
    300 
    301 static int
    302 gttwsi_write_byte(void *v, uint8_t val, int flags)
    303 {
    304 	struct gttwsi_softc *sc = v;
    305 	int error;
    306 
    307 	gttwsi_write_4(sc, TWSI_DATA, val);
    308 	error = gttwsi_wait(sc, 0, STAT_MTDB_AR, 0, flags, "write-byte");
    309 	if (flags & I2C_F_STOP)
    310 		gttwsi_send_stop(sc, flags);
    311 	return error;
    312 }
    313 
    314 static int
    315 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect,
    316 	    uint32_t alt, int flags, const char *what)
    317 {
    318 	uint32_t status;
    319 	int timo, error = 0;
    320 
    321 	/*
    322 	 * XXX Interrupt-driven mode seems to be horribly broken,
    323 	 * XXX at least on AllWinner implementations.  Force polled
    324 	 * XXX mode for now.
    325 	 */
    326 	flags |= I2C_F_POLL;
    327 
    328 	DELAY(5);
    329 	if (!(flags & I2C_F_POLL))
    330 		control |= CONTROL_INTEN;
    331 	if (sc->sc_iflg_rwc)
    332 		control |= CONTROL_IFLG;
    333 	mutex_enter(&sc->sc_mtx);
    334 	gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN);
    335 
    336 	timo = 0;
    337 	for (;;) {
    338 		control = gttwsi_read_4(sc, TWSI_CONTROL);
    339 		if (control & CONTROL_IFLG)
    340 			break;
    341 		if (!(flags & I2C_F_POLL)) {
    342 			error = cv_timedwait(&sc->sc_cv, &sc->sc_mtx, hz);
    343 			if (error) {
    344 				break;
    345 			}
    346 		} else {
    347 			DELAY(TWSI_RETRY_DELAY);
    348 			if (timo++ > 1000000)	/* 1sec */
    349 				break;
    350 		}
    351 	}
    352 	if ((control & CONTROL_IFLG) == 0) {
    353 		/*
    354 		 * error is set by the cv_timedwait() call above in the
    355 		 * non-polled case.
    356 		 */
    357 		if (flags & I2C_F_POLL) {
    358 			error = EWOULDBLOCK;
    359 		} else {
    360 			KASSERT(error != 0);
    361 		}
    362 		aprint_error_dev(sc->sc_dev,
    363 		    "gttwsi_wait(): %s timeout%s, control=0x%x, error=%d\n",
    364 		    what, (flags & I2C_F_POLL) ? " (polled)" : "",
    365 		    control, error);
    366 		goto end;
    367 	}
    368 	status = gttwsi_read_4(sc, TWSI_STATUS);
    369 	if (status != expect) {
    370 		/*
    371 		 * In the case of probing for a device, we are expecting
    372 		 * 2 different status codes: the ACK case (device exists),
    373 		 * or the NACK case (device does not exist).  We don't
    374 		 * need to report an error in the later case.
    375 		 */
    376 		if (alt != 0 && status != alt)
    377 			aprint_error_dev(sc->sc_dev,
    378 			    "unexpected status 0x%x: expect 0x%x\n", status,
    379 			    expect);
    380 		error = EIO;
    381 	}
    382  end:
    383 	mutex_exit(&sc->sc_mtx);
    384 	return error;
    385 }
    386