gttwsi_core.c revision 1.3
1 /* $NetBSD: gttwsi_core.c,v 1.3 2017/10/29 14:59:05 jmcneill Exp $ */ 2 /* 3 * Copyright (c) 2008 Eiji Kawauchi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed for the NetBSD Project by 17 * Eiji Kawauchi. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 /* 33 * Copyright (c) 2005 Brocade Communcations, inc. 34 * All rights reserved. 35 * 36 * Written by Matt Thomas for Brocade Communcations, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of Brocade Communications, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 60 * OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 //#define TWSI_DEBUG 63 64 /* 65 * Marvell Two-Wire Serial Interface (aka I2C) master driver 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: gttwsi_core.c,v 1.3 2017/10/29 14:59:05 jmcneill Exp $"); 70 #include "locators.h" 71 72 #include <sys/param.h> 73 #include <sys/bus.h> 74 #include <sys/condvar.h> 75 #include <sys/device.h> 76 #include <sys/errno.h> 77 #include <sys/kernel.h> 78 #include <sys/mutex.h> 79 #include <sys/systm.h> 80 81 #include <dev/i2c/i2cvar.h> 82 83 #include <dev/i2c/gttwsireg.h> 84 #include <dev/i2c/gttwsivar.h> 85 86 static int gttwsi_acquire_bus(void *, int); 87 static void gttwsi_release_bus(void *, int); 88 static int gttwsi_send_start(void *v, int flags); 89 static int gttwsi_send_stop(void *v, int flags); 90 static int gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags); 91 static int gttwsi_read_byte(void *v, uint8_t *valp, int flags); 92 static int gttwsi_write_byte(void *v, uint8_t val, int flags); 93 94 static int gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, int); 95 96 static inline uint32_t 97 gttwsi_default_read_4(struct gttwsi_softc *sc, uint32_t reg) 98 { 99 uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush, reg); 100 #ifdef TWSI_DEBUG 101 printf("I2C:R:%02x:%02x\n", reg, val); 102 #else 103 DELAY(TWSI_READ_DELAY); 104 #endif 105 return val; 106 } 107 108 static inline void 109 gttwsi_default_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val) 110 { 111 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val); 112 #ifdef TWSI_DEBUG 113 printf("I2C:W:%02x:%02x\n", reg, val); 114 #else 115 DELAY(TWSI_WRITE_DELAY); 116 #endif 117 return; 118 } 119 120 static inline uint32_t 121 gttwsi_read_4(struct gttwsi_softc *sc, uint32_t reg) 122 { 123 return sc->sc_reg_read(sc, reg); 124 } 125 126 static inline void 127 gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val) 128 { 129 return sc->sc_reg_write(sc, reg, val); 130 } 131 132 /* ARGSUSED */ 133 void 134 gttwsi_attach_subr(device_t self, bus_space_tag_t iot, bus_space_handle_t ioh) 135 { 136 struct gttwsi_softc * const sc = device_private(self); 137 prop_dictionary_t cfg = device_properties(self); 138 139 aprint_naive("\n"); 140 aprint_normal(": Marvell TWSI controller\n"); 141 142 sc->sc_dev = self; 143 sc->sc_bust = iot; 144 sc->sc_bush = ioh; 145 146 if (sc->sc_reg_read == NULL) 147 sc->sc_reg_read = gttwsi_default_read_4; 148 if (sc->sc_reg_write == NULL) 149 sc->sc_reg_write = gttwsi_default_write_4; 150 151 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 152 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO); 153 cv_init(&sc->sc_cv, device_xname(self)); 154 155 prop_dictionary_get_bool(cfg, "iflg-rwc", &sc->sc_iflg_rwc); 156 157 sc->sc_started = false; 158 sc->sc_i2c.ic_cookie = sc; 159 sc->sc_i2c.ic_acquire_bus = gttwsi_acquire_bus; 160 sc->sc_i2c.ic_release_bus = gttwsi_release_bus; 161 sc->sc_i2c.ic_exec = NULL; 162 sc->sc_i2c.ic_send_start = gttwsi_send_start; 163 sc->sc_i2c.ic_send_stop = gttwsi_send_stop; 164 sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer; 165 sc->sc_i2c.ic_read_byte = gttwsi_read_byte; 166 sc->sc_i2c.ic_write_byte = gttwsi_write_byte; 167 168 /* 169 * Put the controller into Soft Reset. 170 */ 171 /* reset */ 172 gttwsi_write_4(sc, TWSI_SOFTRESET, SOFTRESET_VAL); 173 174 } 175 176 void 177 gttwsi_config_children(device_t self) 178 { 179 struct gttwsi_softc * const sc = device_private(self); 180 struct i2cbus_attach_args iba; 181 182 memset(&iba, 0, sizeof(iba)); 183 iba.iba_tag = &sc->sc_i2c; 184 185 (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print); 186 } 187 188 int 189 gttwsi_intr(void *arg) 190 { 191 struct gttwsi_softc *sc = arg; 192 uint32_t val; 193 194 val = gttwsi_read_4(sc, TWSI_CONTROL); 195 if (val & CONTROL_IFLG) { 196 gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN); 197 mutex_enter(&sc->sc_mtx); 198 cv_signal(&sc->sc_cv); 199 mutex_exit(&sc->sc_mtx); 200 201 return 1; /* handled */ 202 } 203 return 0; 204 } 205 206 /* ARGSUSED */ 207 static int 208 gttwsi_acquire_bus(void *arg, int flags) 209 { 210 struct gttwsi_softc *sc = arg; 211 212 mutex_enter(&sc->sc_buslock); 213 return 0; 214 } 215 216 /* ARGSUSED */ 217 static void 218 gttwsi_release_bus(void *arg, int flags) 219 { 220 struct gttwsi_softc *sc = arg; 221 222 mutex_exit(&sc->sc_buslock); 223 } 224 225 static int 226 gttwsi_send_start(void *v, int flags) 227 { 228 struct gttwsi_softc *sc = v; 229 int expect; 230 231 KASSERT(mutex_owned(&sc->sc_buslock)); 232 233 if (sc->sc_started) 234 expect = STAT_RSCT; 235 else 236 expect = STAT_SCT; 237 sc->sc_started = true; 238 return gttwsi_wait(sc, CONTROL_START, expect, flags); 239 } 240 241 static int 242 gttwsi_send_stop(void *v, int flags) 243 { 244 struct gttwsi_softc *sc = v; 245 int retry = TWSI_RETRY_COUNT; 246 uint32_t control; 247 248 KASSERT(mutex_owned(&sc->sc_buslock)); 249 250 sc->sc_started = false; 251 252 /* Interrupt is not generated for STAT_NRS. */ 253 control = CONTROL_STOP | CONTROL_TWSIEN; 254 if (sc->sc_iflg_rwc) 255 control |= CONTROL_IFLG; 256 gttwsi_write_4(sc, TWSI_CONTROL, control); 257 while (retry > 0) { 258 if (gttwsi_read_4(sc, TWSI_STATUS) == STAT_NRS) 259 return 0; 260 retry--; 261 DELAY(TWSI_STAT_DELAY); 262 } 263 264 aprint_error_dev(sc->sc_dev, "send STOP failed\n"); 265 return -1; 266 } 267 268 static int 269 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags) 270 { 271 struct gttwsi_softc *sc = v; 272 uint32_t data, expect; 273 int error, read; 274 275 KASSERT(mutex_owned(&sc->sc_buslock)); 276 277 gttwsi_send_start(v, flags); 278 279 read = (flags & I2C_F_READ) != 0; 280 if (read) 281 expect = STAT_ARBT_AR; 282 else 283 expect = STAT_AWBT_AR; 284 285 /* 286 * First byte contains whether this xfer is a read or write. 287 */ 288 data = read; 289 if (addr > 0x7f) { 290 /* 291 * If this is a 10bit request, the first address byte is 292 * 0b11110<b9><b8><r/w>. 293 */ 294 data |= 0xf0 | ((addr & 0x300) >> 7); 295 gttwsi_write_4(sc, TWSI_DATA, data); 296 error = gttwsi_wait(sc, 0, expect, flags); 297 if (error) 298 return error; 299 /* 300 * The first address byte has been sent, now to send 301 * the second one. 302 */ 303 if (read) 304 expect = STAT_SARBT_AR; 305 else 306 expect = STAT_SAWBT_AR; 307 data = (uint8_t)addr; 308 } else 309 data |= (addr << 1); 310 311 gttwsi_write_4(sc, TWSI_DATA, data); 312 return gttwsi_wait(sc, 0, expect, flags); 313 } 314 315 static int 316 gttwsi_read_byte(void *v, uint8_t *valp, int flags) 317 { 318 struct gttwsi_softc *sc = v; 319 int error; 320 321 KASSERT(mutex_owned(&sc->sc_buslock)); 322 323 if (flags & I2C_F_LAST) 324 error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, flags); 325 else 326 error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, flags); 327 if (!error) 328 *valp = gttwsi_read_4(sc, TWSI_DATA); 329 if ((flags & (I2C_F_LAST | I2C_F_STOP)) == (I2C_F_LAST | I2C_F_STOP)) 330 error = gttwsi_send_stop(sc, flags); 331 return error; 332 } 333 334 static int 335 gttwsi_write_byte(void *v, uint8_t val, int flags) 336 { 337 struct gttwsi_softc *sc = v; 338 int error; 339 340 KASSERT(mutex_owned(&sc->sc_buslock)); 341 342 gttwsi_write_4(sc, TWSI_DATA, val); 343 error = gttwsi_wait(sc, 0, STAT_MTDB_AR, flags); 344 if (flags & I2C_F_STOP) 345 gttwsi_send_stop(sc, flags); 346 return error; 347 } 348 349 static int 350 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect, 351 int flags) 352 { 353 uint32_t status; 354 int timo, error = 0; 355 356 KASSERT(mutex_owned(&sc->sc_buslock)); 357 358 DELAY(5); 359 if (!(flags & I2C_F_POLL)) 360 control |= CONTROL_INTEN; 361 if (sc->sc_iflg_rwc) 362 control |= CONTROL_IFLG; 363 gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN); 364 365 timo = 0; 366 for (;;) { 367 control = gttwsi_read_4(sc, TWSI_CONTROL); 368 if (control & CONTROL_IFLG) 369 break; 370 if (!(flags & I2C_F_POLL)) { 371 mutex_enter(&sc->sc_mtx); 372 error = cv_timedwait_sig(&sc->sc_cv, &sc->sc_mtx, hz); 373 mutex_exit(&sc->sc_mtx); 374 if (error) 375 return error; 376 } 377 DELAY(TWSI_RETRY_DELAY); 378 if (timo++ > 1000000) /* 1sec */ 379 break; 380 } 381 382 status = gttwsi_read_4(sc, TWSI_STATUS); 383 if (status != expect) { 384 aprint_error_dev(sc->sc_dev, 385 "unexpected status 0x%x: expect 0x%x\n", status, expect); 386 return EIO; 387 } 388 return error; 389 } 390
Indexes created Tue Sep 23 20:09:58 GMT 2025