gttwsi_core.c revision 1.8
1 /* $NetBSD: gttwsi_core.c,v 1.8 2018/10/01 09:39:20 bouyer Exp $ */ 2 /* 3 * Copyright (c) 2008 Eiji Kawauchi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed for the NetBSD Project by 17 * Eiji Kawauchi. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 /* 33 * Copyright (c) 2005 Brocade Communcations, inc. 34 * All rights reserved. 35 * 36 * Written by Matt Thomas for Brocade Communcations, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of Brocade Communications, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 60 * OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 //#define TWSI_DEBUG 63 64 /* 65 * Marvell Two-Wire Serial Interface (aka I2C) master driver 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: gttwsi_core.c,v 1.8 2018/10/01 09:39:20 bouyer Exp $"); 70 #include "locators.h" 71 72 #include <sys/param.h> 73 #include <sys/bus.h> 74 #include <sys/condvar.h> 75 #include <sys/device.h> 76 #include <sys/errno.h> 77 #include <sys/kernel.h> 78 #include <sys/mutex.h> 79 #include <sys/systm.h> 80 81 #include <dev/i2c/i2cvar.h> 82 83 #include <dev/i2c/gttwsireg.h> 84 #include <dev/i2c/gttwsivar.h> 85 86 static int gttwsi_acquire_bus(void *, int); 87 static void gttwsi_release_bus(void *, int); 88 static int gttwsi_send_start(void *v, int flags); 89 static int gttwsi_send_stop(void *v, int flags); 90 static int gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags); 91 static int gttwsi_read_byte(void *v, uint8_t *valp, int flags); 92 static int gttwsi_write_byte(void *v, uint8_t val, int flags); 93 94 static int gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, 95 uint32_t, int); 96 97 static inline uint32_t 98 gttwsi_default_read_4(struct gttwsi_softc *sc, uint32_t reg) 99 { 100 uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush, reg); 101 #ifdef TWSI_DEBUG 102 printf("I2C:R:%02x:%02x\n", reg, val); 103 #else 104 DELAY(TWSI_READ_DELAY); 105 #endif 106 return val; 107 } 108 109 static inline void 110 gttwsi_default_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val) 111 { 112 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val); 113 #ifdef TWSI_DEBUG 114 printf("I2C:W:%02x:%02x\n", reg, val); 115 #else 116 DELAY(TWSI_WRITE_DELAY); 117 #endif 118 return; 119 } 120 121 static inline uint32_t 122 gttwsi_read_4(struct gttwsi_softc *sc, uint32_t reg) 123 { 124 return sc->sc_reg_read(sc, reg); 125 } 126 127 static inline void 128 gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val) 129 { 130 return sc->sc_reg_write(sc, reg, val); 131 } 132 133 /* ARGSUSED */ 134 void 135 gttwsi_attach_subr(device_t self, bus_space_tag_t iot, bus_space_handle_t ioh) 136 { 137 struct gttwsi_softc * const sc = device_private(self); 138 prop_dictionary_t cfg = device_properties(self); 139 140 aprint_naive("\n"); 141 aprint_normal(": Marvell TWSI controller\n"); 142 143 sc->sc_dev = self; 144 sc->sc_bust = iot; 145 sc->sc_bush = ioh; 146 147 if (sc->sc_reg_read == NULL) 148 sc->sc_reg_read = gttwsi_default_read_4; 149 if (sc->sc_reg_write == NULL) 150 sc->sc_reg_write = gttwsi_default_write_4; 151 152 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_VM); 153 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO); 154 cv_init(&sc->sc_cv, device_xname(self)); 155 156 prop_dictionary_get_bool(cfg, "iflg-rwc", &sc->sc_iflg_rwc); 157 158 sc->sc_started = false; 159 sc->sc_i2c.ic_cookie = sc; 160 sc->sc_i2c.ic_acquire_bus = gttwsi_acquire_bus; 161 sc->sc_i2c.ic_release_bus = gttwsi_release_bus; 162 sc->sc_i2c.ic_exec = NULL; 163 sc->sc_i2c.ic_send_start = gttwsi_send_start; 164 sc->sc_i2c.ic_send_stop = gttwsi_send_stop; 165 sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer; 166 sc->sc_i2c.ic_read_byte = gttwsi_read_byte; 167 sc->sc_i2c.ic_write_byte = gttwsi_write_byte; 168 169 /* 170 * Put the controller into Soft Reset. 171 */ 172 /* reset */ 173 gttwsi_write_4(sc, TWSI_SOFTRESET, SOFTRESET_VAL); 174 175 } 176 177 void 178 gttwsi_config_children(device_t self) 179 { 180 struct gttwsi_softc * const sc = device_private(self); 181 struct i2cbus_attach_args iba; 182 183 memset(&iba, 0, sizeof(iba)); 184 iba.iba_tag = &sc->sc_i2c; 185 186 (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print); 187 } 188 189 int 190 gttwsi_intr(void *arg) 191 { 192 struct gttwsi_softc *sc = arg; 193 uint32_t val; 194 195 mutex_enter(&sc->sc_mtx); 196 val = gttwsi_read_4(sc, TWSI_CONTROL); 197 if (val & CONTROL_IFLG) { 198 gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN); 199 cv_broadcast(&sc->sc_cv); 200 mutex_exit(&sc->sc_mtx); 201 return 1; /* handled */ 202 } 203 mutex_exit(&sc->sc_mtx); 204 return 0; 205 } 206 207 /* ARGSUSED */ 208 static int 209 gttwsi_acquire_bus(void *arg, int flags) 210 { 211 struct gttwsi_softc *sc = arg; 212 213 mutex_enter(&sc->sc_buslock); 214 while (sc->sc_inuse) 215 cv_wait(&sc->sc_cv, &sc->sc_buslock); 216 sc->sc_inuse = true; 217 mutex_exit(&sc->sc_buslock); 218 219 return 0; 220 } 221 222 /* ARGSUSED */ 223 static void 224 gttwsi_release_bus(void *arg, int flags) 225 { 226 struct gttwsi_softc *sc = arg; 227 228 mutex_enter(&sc->sc_buslock); 229 sc->sc_inuse = false; 230 cv_broadcast(&sc->sc_cv); 231 mutex_exit(&sc->sc_buslock); 232 } 233 234 static int 235 gttwsi_send_start(void *v, int flags) 236 { 237 struct gttwsi_softc *sc = v; 238 int expect; 239 240 KASSERT(sc->sc_inuse); 241 242 if (sc->sc_started) 243 expect = STAT_RSCT; 244 else 245 expect = STAT_SCT; 246 sc->sc_started = true; 247 return gttwsi_wait(sc, CONTROL_START, expect, 0, flags); 248 } 249 250 static int 251 gttwsi_send_stop(void *v, int flags) 252 { 253 struct gttwsi_softc *sc = v; 254 int retry = TWSI_RETRY_COUNT; 255 uint32_t control; 256 257 KASSERT(sc->sc_inuse); 258 259 sc->sc_started = false; 260 261 /* Interrupt is not generated for STAT_NRS. */ 262 control = CONTROL_STOP | CONTROL_TWSIEN; 263 if (sc->sc_iflg_rwc) 264 control |= CONTROL_IFLG; 265 gttwsi_write_4(sc, TWSI_CONTROL, control); 266 while (retry > 0) { 267 if (gttwsi_read_4(sc, TWSI_STATUS) == STAT_NRS) 268 return 0; 269 retry--; 270 DELAY(TWSI_STAT_DELAY); 271 } 272 273 aprint_error_dev(sc->sc_dev, "send STOP failed\n"); 274 return -1; 275 } 276 277 static int 278 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags) 279 { 280 struct gttwsi_softc *sc = v; 281 uint32_t data, expect, alt; 282 int error, read; 283 284 KASSERT(sc->sc_inuse); 285 286 error = gttwsi_send_start(v, flags); 287 if (error) 288 return error; 289 290 read = (flags & I2C_F_READ) != 0; 291 if (read) { 292 expect = STAT_ARBT_AR; 293 alt = STAT_ARBT_ANR; 294 } else { 295 expect = STAT_AWBT_AR; 296 alt = STAT_AWBT_ANR; 297 } 298 299 /* 300 * First byte contains whether this xfer is a read or write. 301 */ 302 data = read; 303 if (addr > 0x7f) { 304 /* 305 * If this is a 10bit request, the first address byte is 306 * 0b11110<b9><b8><r/w>. 307 */ 308 data |= 0xf0 | ((addr & 0x300) >> 7); 309 gttwsi_write_4(sc, TWSI_DATA, data); 310 error = gttwsi_wait(sc, 0, expect, alt, flags); 311 if (error) 312 return error; 313 /* 314 * The first address byte has been sent, now to send 315 * the second one. 316 */ 317 if (read) { 318 expect = STAT_SARBT_AR; 319 alt = STAT_SARBT_ANR; 320 } else { 321 expect = STAT_SAWBT_AR; 322 alt = STAT_SAWBT_ANR; 323 } 324 data = (uint8_t)addr; 325 } else 326 data |= (addr << 1); 327 328 gttwsi_write_4(sc, TWSI_DATA, data); 329 return gttwsi_wait(sc, 0, expect, alt, flags); 330 } 331 332 static int 333 gttwsi_read_byte(void *v, uint8_t *valp, int flags) 334 { 335 struct gttwsi_softc *sc = v; 336 int error; 337 338 KASSERT(sc->sc_inuse); 339 340 if (flags & I2C_F_LAST) 341 error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, 0, flags); 342 else 343 error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, 0, flags); 344 if (!error) 345 *valp = gttwsi_read_4(sc, TWSI_DATA); 346 if ((flags & (I2C_F_LAST | I2C_F_STOP)) == (I2C_F_LAST | I2C_F_STOP)) 347 error = gttwsi_send_stop(sc, flags); 348 return error; 349 } 350 351 static int 352 gttwsi_write_byte(void *v, uint8_t val, int flags) 353 { 354 struct gttwsi_softc *sc = v; 355 int error; 356 357 KASSERT(sc->sc_inuse); 358 359 gttwsi_write_4(sc, TWSI_DATA, val); 360 error = gttwsi_wait(sc, 0, STAT_MTDB_AR, 0, flags); 361 if (flags & I2C_F_STOP) 362 gttwsi_send_stop(sc, flags); 363 return error; 364 } 365 366 static int 367 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect, 368 uint32_t alt, int flags) 369 { 370 uint32_t status; 371 int timo, error = 0; 372 373 KASSERT(sc->sc_inuse); 374 375 DELAY(5); 376 if (!(flags & I2C_F_POLL)) 377 control |= CONTROL_INTEN; 378 if (sc->sc_iflg_rwc) 379 control |= CONTROL_IFLG; 380 mutex_enter(&sc->sc_mtx); 381 gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN); 382 383 timo = 0; 384 for (;;) { 385 control = gttwsi_read_4(sc, TWSI_CONTROL); 386 if (control & CONTROL_IFLG) 387 break; 388 if (!(flags & I2C_F_POLL)) { 389 error = cv_timedwait_sig(&sc->sc_cv, &sc->sc_mtx, hz); 390 if (error) 391 break; 392 } else { 393 DELAY(TWSI_RETRY_DELAY); 394 if (timo++ > 1000000) /* 1sec */ 395 break; 396 } 397 } 398 if ((control & CONTROL_IFLG) == 0) { 399 aprint_error_dev(sc->sc_dev, 400 "gttwsi_wait(): timeout, control=0x%x\n", control); 401 error = EWOULDBLOCK; 402 goto end; 403 } 404 status = gttwsi_read_4(sc, TWSI_STATUS); 405 if (status != expect) { 406 /* 407 * In the case of probing for a device, we are expecting 408 * 2 different status codes: the ACK case (device exists), 409 * or the NACK case (device does not exist). We don't 410 * need to report an error in the later case. 411 */ 412 if (alt != 0 && status != alt) 413 aprint_error_dev(sc->sc_dev, 414 "unexpected status 0x%x: expect 0x%x\n", status, 415 expect); 416 error = EIO; 417 } 418 end: 419 mutex_exit(&sc->sc_mtx); 420 return error; 421 } 422
Indexes created Tue Sep 23 02:09:52 GMT 2025