gttwsi_core.c revision 1.9
1 /* $NetBSD: gttwsi_core.c,v 1.9 2019/12/22 23:23:32 thorpej Exp $ */ 2 /* 3 * Copyright (c) 2008 Eiji Kawauchi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed for the NetBSD Project by 17 * Eiji Kawauchi. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 /* 33 * Copyright (c) 2005 Brocade Communcations, inc. 34 * All rights reserved. 35 * 36 * Written by Matt Thomas for Brocade Communcations, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of Brocade Communications, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 60 * OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 //#define TWSI_DEBUG 63 64 /* 65 * Marvell Two-Wire Serial Interface (aka I2C) master driver 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: gttwsi_core.c,v 1.9 2019/12/22 23:23:32 thorpej Exp $"); 70 #include "locators.h" 71 72 #include <sys/param.h> 73 #include <sys/bus.h> 74 #include <sys/condvar.h> 75 #include <sys/device.h> 76 #include <sys/errno.h> 77 #include <sys/kernel.h> 78 #include <sys/mutex.h> 79 #include <sys/systm.h> 80 81 #include <dev/i2c/i2cvar.h> 82 83 #include <dev/i2c/gttwsireg.h> 84 #include <dev/i2c/gttwsivar.h> 85 86 static int gttwsi_send_start(void *v, int flags); 87 static int gttwsi_send_stop(void *v, int flags); 88 static int gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags); 89 static int gttwsi_read_byte(void *v, uint8_t *valp, int flags); 90 static int gttwsi_write_byte(void *v, uint8_t val, int flags); 91 92 static int gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, 93 uint32_t, int); 94 95 static inline uint32_t 96 gttwsi_default_read_4(struct gttwsi_softc *sc, uint32_t reg) 97 { 98 uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush, reg); 99 #ifdef TWSI_DEBUG 100 printf("I2C:R:%02x:%02x\n", reg, val); 101 #else 102 DELAY(TWSI_READ_DELAY); 103 #endif 104 return val; 105 } 106 107 static inline void 108 gttwsi_default_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val) 109 { 110 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val); 111 #ifdef TWSI_DEBUG 112 printf("I2C:W:%02x:%02x\n", reg, val); 113 #else 114 DELAY(TWSI_WRITE_DELAY); 115 #endif 116 return; 117 } 118 119 static inline uint32_t 120 gttwsi_read_4(struct gttwsi_softc *sc, uint32_t reg) 121 { 122 return sc->sc_reg_read(sc, reg); 123 } 124 125 static inline void 126 gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val) 127 { 128 return sc->sc_reg_write(sc, reg, val); 129 } 130 131 /* ARGSUSED */ 132 void 133 gttwsi_attach_subr(device_t self, bus_space_tag_t iot, bus_space_handle_t ioh) 134 { 135 struct gttwsi_softc * const sc = device_private(self); 136 prop_dictionary_t cfg = device_properties(self); 137 138 aprint_naive("\n"); 139 aprint_normal(": Marvell TWSI controller\n"); 140 141 sc->sc_dev = self; 142 sc->sc_bust = iot; 143 sc->sc_bush = ioh; 144 145 if (sc->sc_reg_read == NULL) 146 sc->sc_reg_read = gttwsi_default_read_4; 147 if (sc->sc_reg_write == NULL) 148 sc->sc_reg_write = gttwsi_default_write_4; 149 150 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO); 151 cv_init(&sc->sc_cv, device_xname(self)); 152 153 prop_dictionary_get_bool(cfg, "iflg-rwc", &sc->sc_iflg_rwc); 154 155 sc->sc_started = false; 156 iic_tag_init(&sc->sc_i2c); 157 sc->sc_i2c.ic_cookie = sc; 158 sc->sc_i2c.ic_send_start = gttwsi_send_start; 159 sc->sc_i2c.ic_send_stop = gttwsi_send_stop; 160 sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer; 161 sc->sc_i2c.ic_read_byte = gttwsi_read_byte; 162 sc->sc_i2c.ic_write_byte = gttwsi_write_byte; 163 164 /* 165 * Put the controller into Soft Reset. 166 */ 167 /* reset */ 168 gttwsi_write_4(sc, TWSI_SOFTRESET, SOFTRESET_VAL); 169 170 } 171 172 void 173 gttwsi_config_children(device_t self) 174 { 175 struct gttwsi_softc * const sc = device_private(self); 176 struct i2cbus_attach_args iba; 177 178 memset(&iba, 0, sizeof(iba)); 179 iba.iba_tag = &sc->sc_i2c; 180 181 (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print); 182 } 183 184 int 185 gttwsi_intr(void *arg) 186 { 187 struct gttwsi_softc *sc = arg; 188 uint32_t val; 189 190 mutex_enter(&sc->sc_mtx); 191 val = gttwsi_read_4(sc, TWSI_CONTROL); 192 if (val & CONTROL_IFLG) { 193 gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN); 194 cv_broadcast(&sc->sc_cv); 195 mutex_exit(&sc->sc_mtx); 196 return 1; /* handled */ 197 } 198 mutex_exit(&sc->sc_mtx); 199 return 0; 200 } 201 202 static int 203 gttwsi_send_start(void *v, int flags) 204 { 205 struct gttwsi_softc *sc = v; 206 int expect; 207 208 KASSERT(sc->sc_inuse); 209 210 if (sc->sc_started) 211 expect = STAT_RSCT; 212 else 213 expect = STAT_SCT; 214 sc->sc_started = true; 215 return gttwsi_wait(sc, CONTROL_START, expect, 0, flags); 216 } 217 218 static int 219 gttwsi_send_stop(void *v, int flags) 220 { 221 struct gttwsi_softc *sc = v; 222 int retry = TWSI_RETRY_COUNT; 223 uint32_t control; 224 225 KASSERT(sc->sc_inuse); 226 227 sc->sc_started = false; 228 229 /* Interrupt is not generated for STAT_NRS. */ 230 control = CONTROL_STOP | CONTROL_TWSIEN; 231 if (sc->sc_iflg_rwc) 232 control |= CONTROL_IFLG; 233 gttwsi_write_4(sc, TWSI_CONTROL, control); 234 while (retry > 0) { 235 if (gttwsi_read_4(sc, TWSI_STATUS) == STAT_NRS) 236 return 0; 237 retry--; 238 DELAY(TWSI_STAT_DELAY); 239 } 240 241 aprint_error_dev(sc->sc_dev, "send STOP failed\n"); 242 return -1; 243 } 244 245 static int 246 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags) 247 { 248 struct gttwsi_softc *sc = v; 249 uint32_t data, expect, alt; 250 int error, read; 251 252 KASSERT(sc->sc_inuse); 253 254 error = gttwsi_send_start(v, flags); 255 if (error) 256 return error; 257 258 read = (flags & I2C_F_READ) != 0; 259 if (read) { 260 expect = STAT_ARBT_AR; 261 alt = STAT_ARBT_ANR; 262 } else { 263 expect = STAT_AWBT_AR; 264 alt = STAT_AWBT_ANR; 265 } 266 267 /* 268 * First byte contains whether this xfer is a read or write. 269 */ 270 data = read; 271 if (addr > 0x7f) { 272 /* 273 * If this is a 10bit request, the first address byte is 274 * 0b11110<b9><b8><r/w>. 275 */ 276 data |= 0xf0 | ((addr & 0x300) >> 7); 277 gttwsi_write_4(sc, TWSI_DATA, data); 278 error = gttwsi_wait(sc, 0, expect, alt, flags); 279 if (error) 280 return error; 281 /* 282 * The first address byte has been sent, now to send 283 * the second one. 284 */ 285 if (read) { 286 expect = STAT_SARBT_AR; 287 alt = STAT_SARBT_ANR; 288 } else { 289 expect = STAT_SAWBT_AR; 290 alt = STAT_SAWBT_ANR; 291 } 292 data = (uint8_t)addr; 293 } else 294 data |= (addr << 1); 295 296 gttwsi_write_4(sc, TWSI_DATA, data); 297 return gttwsi_wait(sc, 0, expect, alt, flags); 298 } 299 300 static int 301 gttwsi_read_byte(void *v, uint8_t *valp, int flags) 302 { 303 struct gttwsi_softc *sc = v; 304 int error; 305 306 KASSERT(sc->sc_inuse); 307 308 if (flags & I2C_F_LAST) 309 error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, 0, flags); 310 else 311 error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, 0, flags); 312 if (!error) 313 *valp = gttwsi_read_4(sc, TWSI_DATA); 314 if ((flags & (I2C_F_LAST | I2C_F_STOP)) == (I2C_F_LAST | I2C_F_STOP)) 315 error = gttwsi_send_stop(sc, flags); 316 return error; 317 } 318 319 static int 320 gttwsi_write_byte(void *v, uint8_t val, int flags) 321 { 322 struct gttwsi_softc *sc = v; 323 int error; 324 325 KASSERT(sc->sc_inuse); 326 327 gttwsi_write_4(sc, TWSI_DATA, val); 328 error = gttwsi_wait(sc, 0, STAT_MTDB_AR, 0, flags); 329 if (flags & I2C_F_STOP) 330 gttwsi_send_stop(sc, flags); 331 return error; 332 } 333 334 static int 335 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect, 336 uint32_t alt, int flags) 337 { 338 uint32_t status; 339 int timo, error = 0; 340 341 KASSERT(sc->sc_inuse); 342 343 DELAY(5); 344 if (!(flags & I2C_F_POLL)) 345 control |= CONTROL_INTEN; 346 if (sc->sc_iflg_rwc) 347 control |= CONTROL_IFLG; 348 mutex_enter(&sc->sc_mtx); 349 gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN); 350 351 timo = 0; 352 for (;;) { 353 control = gttwsi_read_4(sc, TWSI_CONTROL); 354 if (control & CONTROL_IFLG) 355 break; 356 if (!(flags & I2C_F_POLL)) { 357 error = cv_timedwait_sig(&sc->sc_cv, &sc->sc_mtx, hz); 358 if (error) 359 break; 360 } else { 361 DELAY(TWSI_RETRY_DELAY); 362 if (timo++ > 1000000) /* 1sec */ 363 break; 364 } 365 } 366 if ((control & CONTROL_IFLG) == 0) { 367 aprint_error_dev(sc->sc_dev, 368 "gttwsi_wait(): timeout, control=0x%x\n", control); 369 error = EWOULDBLOCK; 370 goto end; 371 } 372 status = gttwsi_read_4(sc, TWSI_STATUS); 373 if (status != expect) { 374 /* 375 * In the case of probing for a device, we are expecting 376 * 2 different status codes: the ACK case (device exists), 377 * or the NACK case (device does not exist). We don't 378 * need to report an error in the later case. 379 */ 380 if (alt != 0 && status != alt) 381 aprint_error_dev(sc->sc_dev, 382 "unexpected status 0x%x: expect 0x%x\n", status, 383 expect); 384 error = EIO; 385 } 386 end: 387 mutex_exit(&sc->sc_mtx); 388 return error; 389 } 390
Indexes created Tue Sep 23 07:09:52 GMT 2025