i2cvar.h revision 1.18
1 /* $NetBSD: i2cvar.h,v 1.18 2018/12/10 00:31:45 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _DEV_I2C_I2CVAR_H_ 39 #define _DEV_I2C_I2CVAR_H_ 40 41 #include <sys/device.h> 42 #include <dev/i2c/i2c_io.h> 43 #include <prop/proplib.h> 44 45 /* Flags passed to i2c routines. */ 46 #define I2C_F_WRITE 0x00 /* new transfer is a write */ 47 #define I2C_F_READ 0x01 /* new transfer is a read */ 48 #define I2C_F_LAST 0x02 /* last byte of read */ 49 #define I2C_F_STOP 0x04 /* send stop after byte */ 50 #define I2C_F_POLL 0x08 /* poll, don't sleep */ 51 #define I2C_F_PEC 0x10 /* smbus packet error checking */ 52 53 /* i2c bus instance properties */ 54 #define I2C_PROP_INDIRECT_PROBE_STRATEGY \ 55 "i2c-indirect-probe-strategy" 56 #define I2C_PROBE_STRATEGY_QUICK_WRITE \ 57 "smbus-quick-write" 58 #define I2C_PROBE_STRATEGY_RECEIVE_BYTE \ 59 "smbus-receive-byte" 60 #define I2C_PROBE_STRATEGY_NONE \ 61 "none" 62 63 #define I2C_PROP_INDIRECT_DEVICE_WHITELIST \ 64 "i2c-indirect-device-whitelist" 65 /* value is a prop_array of prop_strings */ 66 67 struct ic_intr_list { 68 LIST_ENTRY(ic_intr_list) il_next; 69 int (*il_intr)(void *); 70 void *il_intrarg; 71 }; 72 73 /* 74 * This structure provides the interface between the i2c framework 75 * and the underlying i2c controller. 76 * 77 * Note that this structure is designed specifically to allow us 78 * to either use the autoconfiguration framework or not. This 79 * allows a driver for a board with a private i2c bus use generic 80 * i2c client drivers for chips that might be on that board. 81 */ 82 typedef struct i2c_controller { 83 void *ic_cookie; /* controller private */ 84 85 /* 86 * These provide synchronization in the presence of 87 * multiple users of the i2c bus. When a device 88 * driver wishes to perform transfers on the i2c 89 * bus, the driver should acquire the bus. When 90 * the driver is finished, it should release the 91 * bus. 92 * 93 * This is provided by the back-end since a single 94 * controller may present e.g. i2c and smbus views 95 * of the same set of i2c wires. 96 */ 97 int (*ic_acquire_bus)(void *, int); 98 void (*ic_release_bus)(void *, int); 99 100 /* 101 * The preferred API for clients of the i2c interface 102 * is the scripted API. This handles i2c controllers 103 * that do not provide raw access to the i2c signals. 104 */ 105 int (*ic_exec)(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 106 void *, size_t, int); 107 108 int (*ic_send_start)(void *, int); 109 int (*ic_send_stop)(void *, int); 110 int (*ic_initiate_xfer)(void *, i2c_addr_t, int); 111 int (*ic_read_byte)(void *, uint8_t *, int); 112 int (*ic_write_byte)(void *, uint8_t, int); 113 114 LIST_HEAD(, ic_intr_list) ic_list; 115 LIST_HEAD(, ic_intr_list) ic_proc_list; 116 volatile int ic_running; 117 volatile int ic_pending; 118 struct lwp *ic_intr_thread; 119 const char *ic_devname; 120 } *i2c_tag_t; 121 122 /* I2C bus types */ 123 #define I2C_TYPE_SMBUS 1 124 125 /* Used to attach the i2c framework to the controller. */ 126 struct i2cbus_attach_args { 127 i2c_tag_t iba_tag; /* the controller */ 128 int iba_type; /* bus type */ 129 prop_array_t iba_child_devices; /* child devices (direct config) */ 130 }; 131 132 /* Used to attach devices on the i2c bus. */ 133 struct i2c_attach_args { 134 i2c_tag_t ia_tag; /* our controller */ 135 i2c_addr_t ia_addr; /* address of device */ 136 int ia_type; /* bus type */ 137 /* only set if using direct config */ 138 const char * ia_name; /* name of the device */ 139 int ia_ncompat; /* number of pointers in the 140 ia_compat array */ 141 const char ** ia_compat; /* chip names */ 142 prop_dictionary_t ia_prop; /* dictionnary for this device */ 143 /* 144 * The following is of limited usefulness and should only be used 145 * in rare cases where we really know what we are doing. Example: 146 * a machine dependent i2c driver (located in sys/arch/$arch/dev) 147 * needing to access some firmware properties. 148 * Depending on the firmware in use, an identifier for the device 149 * may be present. Example: on OpenFirmware machines the device 150 * tree OF node - if available. This info is hard to transport 151 * down to MD drivers through the MI i2c bus otherwise. 152 * 153 * On ACPI platforms this is the ACPI_HANDLE of the device. 154 */ 155 uintptr_t ia_cookie; /* OF node in openfirmware machines */ 156 }; 157 158 /* 159 * API presented to i2c controllers. 160 */ 161 int iicbus_print(void *, const char *); 162 163 /* 164 * API presented to i2c devices. 165 */ 166 int iic_compatible_match(const struct i2c_attach_args *, 167 const struct device_compatible_entry *, 168 const struct device_compatible_entry **); 169 bool iic_use_direct_match(const struct i2c_attach_args *, const cfdata_t, 170 const struct device_compatible_entry *, int *); 171 172 /* 173 * Constants to indicate the quality of a match made by a driver's 174 * match routine, from lowest to higest: 175 * 176 * -- Address only; no other checks were made. 177 * 178 * -- Address + device probed and recognized. 179 * 180 * -- Direct-config match by "compatible" string. 181 * 182 * -- Direct-config match by specific driver name. 183 */ 184 #define I2C_MATCH_ADDRESS_ONLY 1 185 #define I2C_MATCH_ADDRESS_AND_PROBE 2 186 #define I2C_MATCH_DIRECT_COMPATIBLE 10 187 #define I2C_MATCH_DIRECT_COMPATIBLE_MAX 99 188 #define I2C_MATCH_DIRECT_SPECIFIC 100 189 190 #ifdef _I2C_PRIVATE 191 /* 192 * Macros used internally by the i2c framework. 193 */ 194 #define iic_send_start(ic, flags) \ 195 (*(ic)->ic_send_start)((ic)->ic_cookie, (flags)) 196 #define iic_send_stop(ic, flags) \ 197 (*(ic)->ic_send_stop)((ic)->ic_cookie, (flags)) 198 #define iic_initiate_xfer(ic, addr, flags) \ 199 (*(ic)->ic_initiate_xfer)((ic)->ic_cookie, (addr), (flags)) 200 201 #define iic_read_byte(ic, bytep, flags) \ 202 (*(ic)->ic_read_byte)((ic)->ic_cookie, (bytep), (flags)) 203 #define iic_write_byte(ic, byte, flags) \ 204 (*(ic)->ic_write_byte)((ic)->ic_cookie, (byte), (flags)) 205 #endif /* _I2C_PRIVATE */ 206 207 /* 208 * Simplified API for clients of the i2c framework. Definitions 209 * in <dev/i2c/i2c_io.h>. 210 */ 211 int iic_acquire_bus(i2c_tag_t, int); 212 void iic_release_bus(i2c_tag_t, int); 213 int iic_exec(i2c_tag_t, i2c_op_t, i2c_addr_t, const void *, 214 size_t, void *, size_t, int); 215 216 int iic_smbus_write_byte(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t, int); 217 int iic_smbus_write_word(i2c_tag_t, i2c_addr_t, uint8_t, uint16_t, int); 218 int iic_smbus_read_byte(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, int); 219 int iic_smbus_read_word(i2c_tag_t, i2c_addr_t, uint8_t, uint16_t *, int); 220 int iic_smbus_receive_byte(i2c_tag_t, i2c_addr_t, uint8_t *, int); 221 int iic_smbus_send_byte(i2c_tag_t, i2c_addr_t, uint8_t, int); 222 int iic_smbus_quick_read(i2c_tag_t, i2c_addr_t, int); 223 int iic_smbus_quick_write(i2c_tag_t, i2c_addr_t, int); 224 int iic_smbus_block_read(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, 225 size_t, int); 226 int iic_smbus_block_write(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, 227 size_t, int); 228 229 void * iic_smbus_intr_establish(i2c_tag_t, int (*)(void *), void *); 230 void * iic_smbus_intr_establish_proc(i2c_tag_t, int (*)(void *), void *); 231 void iic_smbus_intr_disestablish(i2c_tag_t, void *); 232 void iic_smbus_intr_disestablish_proc(i2c_tag_t, void *); 233 int iic_smbus_intr(i2c_tag_t); 234 235 #endif /* _DEV_I2C_I2CVAR_H_ */ 236
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