i2cvar.h revision 1.5
1 /* $NetBSD: i2cvar.h,v 1.5 2007/02/05 23:31:37 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _DEV_I2C_I2CVAR_H_ 39 #define _DEV_I2C_I2CVAR_H_ 40 41 #include <dev/i2c/i2c_io.h> 42 43 /* Flags passed to i2c routines. */ 44 #define I2C_F_WRITE 0x00 /* new transfer is a write */ 45 #define I2C_F_READ 0x01 /* new transfer is a read */ 46 #define I2C_F_LAST 0x02 /* last byte of read */ 47 #define I2C_F_STOP 0x04 /* send stop after byte */ 48 #define I2C_F_POLL 0x08 /* poll, don't sleep */ 49 #define I2C_F_PEC 0x10 /* smbus packet error checking */ 50 51 struct ic_intr_list { 52 LIST_ENTRY(ic_intr_list) il_next; 53 int (*il_intr)(void *); 54 void *il_intrarg; 55 }; 56 57 /* 58 * This structure provides the interface between the i2c framework 59 * and the underlying i2c controller. 60 * 61 * Note that this structure is designed specifically to allow us 62 * to either use the autoconfiguration framework or not. This 63 * allows a driver for a board with a private i2c bus use generic 64 * i2c client drivers for chips that might be on that board. 65 */ 66 typedef struct i2c_controller { 67 void *ic_cookie; /* controller private */ 68 69 /* 70 * These provide synchronization in the presence of 71 * multiple users of the i2c bus. When a device 72 * driver wishes to perform transfers on the i2c 73 * bus, the driver should acquire the bus. When 74 * the driver is finished, it should release the 75 * bus. 76 * 77 * This is provided by the back-end since a single 78 * controller may present e.g. i2c and smbus views 79 * of the same set of i2c wires. 80 */ 81 int (*ic_acquire_bus)(void *, int); 82 void (*ic_release_bus)(void *, int); 83 84 /* 85 * The preferred API for clients of the i2c interface 86 * is the scripted API. This handles i2c controllers 87 * that do not provide raw access to the i2c signals. 88 */ 89 int (*ic_exec)(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 90 void *, size_t, int); 91 92 int (*ic_send_start)(void *, int); 93 int (*ic_send_stop)(void *, int); 94 int (*ic_initiate_xfer)(void *, i2c_addr_t, int); 95 int (*ic_read_byte)(void *, uint8_t *, int); 96 int (*ic_write_byte)(void *, uint8_t, int); 97 98 LIST_HEAD(, ic_intr_list) ic_list; 99 LIST_HEAD(, ic_intr_list) ic_proc_list; 100 volatile int ic_running; 101 volatile int ic_pending; 102 struct proc *ic_intr_thread; 103 const char *ic_devname; 104 } *i2c_tag_t; 105 106 /* I2C bus types */ 107 #define I2C_TYPE_SMBUS 1 108 109 /* Used to attach the i2c framework to the controller. */ 110 struct i2cbus_attach_args { 111 i2c_tag_t iba_tag; /* the controller */ 112 int iba_type; /* bus type */ 113 }; 114 115 /* Used to attach devices on the i2c bus. */ 116 struct i2c_attach_args { 117 i2c_tag_t ia_tag; /* our controller */ 118 i2c_addr_t ia_addr; /* address of device */ 119 int ia_size; /* size (for EEPROMs) */ 120 int ia_type; /* bus type */ 121 }; 122 123 /* 124 * API presented to i2c controllers. 125 */ 126 int iicbus_print(void *, const char *); 127 128 #ifdef _I2C_PRIVATE 129 /* 130 * Macros used internally by the i2c framework. 131 */ 132 #define iic_send_start(ic, flags) \ 133 (*(ic)->ic_send_start)((ic)->ic_cookie, (flags)) 134 #define iic_send_stop(ic, flags) \ 135 (*(ic)->ic_send_stop)((ic)->ic_cookie, (flags)) 136 #define iic_initiate_xfer(ic, addr, flags) \ 137 (*(ic)->ic_initiate_xfer)((ic)->ic_cookie, (addr), (flags)) 138 139 #define iic_read_byte(ic, bytep, flags) \ 140 (*(ic)->ic_read_byte)((ic)->ic_cookie, (bytep), (flags)) 141 #define iic_write_byte(ic, byte, flags) \ 142 (*(ic)->ic_write_byte)((ic)->ic_cookie, (byte), (flags)) 143 #endif /* _I2C_PRIVATE */ 144 145 /* 146 * Simplified API for clients of the i2c framework. Definitions 147 * in <dev/i2c/i2c_io.h>. 148 */ 149 #define iic_acquire_bus(ic, flags) \ 150 (*(ic)->ic_acquire_bus)((ic)->ic_cookie, (flags)) 151 #define iic_release_bus(ic, flags) \ 152 (*(ic)->ic_release_bus)((ic)->ic_cookie, (flags)) 153 154 int iic_exec(i2c_tag_t, i2c_op_t, i2c_addr_t, const void *, 155 size_t, void *, size_t, int); 156 157 int iic_smbus_write_byte(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t, int); 158 int iic_smbus_write_word(i2c_tag_t, i2c_addr_t, uint8_t, uint16_t, int); 159 int iic_smbus_read_byte(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, int); 160 int iic_smbus_read_word(i2c_tag_t, i2c_addr_t, uint8_t, uint16_t *, int); 161 int iic_smbus_receive_byte(i2c_tag_t, i2c_addr_t, uint8_t *, int); 162 int iic_smbus_send_byte(i2c_tag_t, i2c_addr_t, uint8_t, int); 163 int iic_smbus_quick_read(i2c_tag_t, i2c_addr_t, int); 164 int iic_smbus_quick_write(i2c_tag_t, i2c_addr_t, int); 165 int iic_smbus_block_read(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, 166 size_t, int); 167 int iic_smbus_block_write(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, 168 size_t, int); 169 170 void * iic_smbus_intr_establish(i2c_tag_t, int (*)(void *), void *); 171 void * iic_smbus_intr_establish_proc(i2c_tag_t, int (*)(void *), void *); 172 void iic_smbus_intr_disestablish(i2c_tag_t, void *); 173 void iic_smbus_intr_disestablish_proc(i2c_tag_t, void *); 174 int iic_smbus_intr(i2c_tag_t); 175 176 #endif /* _DEV_I2C_I2CVAR_H_ */ 177
Indexes created Tue Sep 23 13:09:54 GMT 2025