m41st84.c revision 1.9 1 1.9 cube /* $NetBSD: m41st84.c,v 1.9 2007/01/12 19:33:21 cube Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*
4 1.1 thorpej * Copyright (c) 2003 Wasabi Systems, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
8 1.1 thorpej *
9 1.1 thorpej * Redistribution and use in source and binary forms, with or without
10 1.1 thorpej * modification, are permitted provided that the following conditions
11 1.1 thorpej * are met:
12 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
13 1.1 thorpej * notice, this list of conditions and the following disclaimer.
14 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
16 1.1 thorpej * documentation and/or other materials provided with the distribution.
17 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
18 1.1 thorpej * must display the following acknowledgement:
19 1.1 thorpej * This product includes software developed for the NetBSD Project by
20 1.1 thorpej * Wasabi Systems, Inc.
21 1.1 thorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 thorpej * or promote products derived from this software without specific prior
23 1.1 thorpej * written permission.
24 1.1 thorpej *
25 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
36 1.1 thorpej */
37 1.1 thorpej
38 1.1 thorpej #include <sys/param.h>
39 1.1 thorpej #include <sys/systm.h>
40 1.1 thorpej #include <sys/device.h>
41 1.1 thorpej #include <sys/kernel.h>
42 1.1 thorpej #include <sys/fcntl.h>
43 1.1 thorpej #include <sys/uio.h>
44 1.1 thorpej #include <sys/conf.h>
45 1.1 thorpej #include <sys/event.h>
46 1.1 thorpej
47 1.1 thorpej #include <dev/clock_subr.h>
48 1.1 thorpej
49 1.1 thorpej #include <dev/i2c/i2cvar.h>
50 1.1 thorpej #include <dev/i2c/m41st84reg.h>
51 1.1 thorpej
52 1.1 thorpej struct strtc_softc {
53 1.1 thorpej struct device sc_dev;
54 1.1 thorpej i2c_tag_t sc_tag;
55 1.1 thorpej int sc_address;
56 1.1 thorpej int sc_open;
57 1.1 thorpej struct todr_chip_handle sc_todr;
58 1.1 thorpej };
59 1.1 thorpej
60 1.1 thorpej static void strtc_attach(struct device *, struct device *, void *);
61 1.1 thorpej static int strtc_match(struct device *, struct cfdata *, void *);
62 1.1 thorpej
63 1.1 thorpej CFATTACH_DECL(strtc, sizeof(struct strtc_softc),
64 1.1 thorpej strtc_match, strtc_attach, NULL, NULL);
65 1.1 thorpej extern struct cfdriver strtc_cd;
66 1.1 thorpej
67 1.1 thorpej dev_type_open(strtc_open);
68 1.1 thorpej dev_type_close(strtc_close);
69 1.1 thorpej dev_type_read(strtc_read);
70 1.1 thorpej dev_type_write(strtc_write);
71 1.1 thorpej
72 1.1 thorpej const struct cdevsw strtc_cdevsw = {
73 1.1 thorpej strtc_open, strtc_close, strtc_read, strtc_write, noioctl,
74 1.9 cube nostop, notty, nopoll, nommap, nokqfilter, D_OTHER
75 1.1 thorpej };
76 1.1 thorpej
77 1.1 thorpej static int strtc_clock_read(struct strtc_softc *, struct clock_ymdhms *);
78 1.1 thorpej static int strtc_clock_write(struct strtc_softc *, struct clock_ymdhms *);
79 1.4 he static int strtc_gettime(struct todr_chip_handle *, volatile struct timeval *);
80 1.4 he static int strtc_settime(struct todr_chip_handle *, volatile struct timeval *);
81 1.1 thorpej
82 1.1 thorpej static int
83 1.1 thorpej strtc_match(struct device *parent, struct cfdata *cf, void *arg)
84 1.1 thorpej {
85 1.1 thorpej struct i2c_attach_args *ia = arg;
86 1.1 thorpej
87 1.1 thorpej if (ia->ia_addr == M41ST84_ADDR)
88 1.1 thorpej return (1);
89 1.1 thorpej
90 1.1 thorpej return (0);
91 1.1 thorpej }
92 1.1 thorpej
93 1.1 thorpej static void
94 1.1 thorpej strtc_attach(struct device *parent, struct device *self, void *arg)
95 1.1 thorpej {
96 1.7 thorpej struct strtc_softc *sc = device_private(self);
97 1.1 thorpej struct i2c_attach_args *ia = arg;
98 1.1 thorpej
99 1.1 thorpej aprint_naive(": Real-time Clock/NVRAM\n");
100 1.1 thorpej aprint_normal(": M41ST84 Real-time Clock/NVRAM\n");
101 1.1 thorpej
102 1.1 thorpej sc->sc_tag = ia->ia_tag;
103 1.1 thorpej sc->sc_address = ia->ia_addr;
104 1.1 thorpej sc->sc_open = 0;
105 1.1 thorpej sc->sc_todr.cookie = sc;
106 1.1 thorpej sc->sc_todr.todr_gettime = strtc_gettime;
107 1.1 thorpej sc->sc_todr.todr_settime = strtc_settime;
108 1.1 thorpej sc->sc_todr.todr_setwen = NULL;
109 1.1 thorpej
110 1.1 thorpej todr_attach(&sc->sc_todr);
111 1.1 thorpej }
112 1.1 thorpej
113 1.1 thorpej /*ARGSUSED*/
114 1.1 thorpej int
115 1.6 abs strtc_open(dev_t dev, int flag, int fmt, struct lwp *l)
116 1.1 thorpej {
117 1.1 thorpej struct strtc_softc *sc;
118 1.1 thorpej
119 1.1 thorpej if ((sc = device_lookup(&strtc_cd, minor(dev))) == NULL)
120 1.1 thorpej return (ENXIO);
121 1.1 thorpej
122 1.1 thorpej /* XXX: Locking */
123 1.1 thorpej
124 1.1 thorpej if (sc->sc_open)
125 1.1 thorpej return (EBUSY);
126 1.1 thorpej
127 1.1 thorpej sc->sc_open = 1;
128 1.1 thorpej return (0);
129 1.1 thorpej }
130 1.1 thorpej
131 1.1 thorpej /*ARGSUSED*/
132 1.1 thorpej int
133 1.6 abs strtc_close(dev_t dev, int flag, int fmt, struct lwp *l)
134 1.1 thorpej {
135 1.1 thorpej struct strtc_softc *sc;
136 1.1 thorpej
137 1.1 thorpej if ((sc = device_lookup(&strtc_cd, minor(dev))) == NULL)
138 1.1 thorpej return (ENXIO);
139 1.1 thorpej
140 1.1 thorpej sc->sc_open = 0;
141 1.1 thorpej return (0);
142 1.1 thorpej }
143 1.1 thorpej
144 1.1 thorpej /*ARGSUSED*/
145 1.1 thorpej int
146 1.1 thorpej strtc_read(dev_t dev, struct uio *uio, int flags)
147 1.1 thorpej {
148 1.1 thorpej struct strtc_softc *sc;
149 1.1 thorpej u_int8_t ch, cmdbuf[1];
150 1.1 thorpej int a, error;
151 1.1 thorpej
152 1.1 thorpej if ((sc = device_lookup(&strtc_cd, minor(dev))) == NULL)
153 1.1 thorpej return (ENXIO);
154 1.1 thorpej
155 1.1 thorpej if (uio->uio_offset >= M41ST84_USER_RAM_SIZE)
156 1.1 thorpej return (EINVAL);
157 1.1 thorpej
158 1.1 thorpej if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
159 1.1 thorpej return (error);
160 1.1 thorpej
161 1.1 thorpej while (uio->uio_resid && uio->uio_offset < M41ST84_USER_RAM_SIZE) {
162 1.1 thorpej a = (int)uio->uio_offset;
163 1.1 thorpej cmdbuf[0] = a + M41ST84_USER_RAM;
164 1.1 thorpej if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
165 1.1 thorpej sc->sc_address, cmdbuf, 1,
166 1.1 thorpej &ch, 1, 0)) != 0) {
167 1.1 thorpej iic_release_bus(sc->sc_tag, 0);
168 1.1 thorpej printf("%s: strtc_read: read failed at 0x%x\n",
169 1.1 thorpej sc->sc_dev.dv_xname, a);
170 1.1 thorpej return (error);
171 1.1 thorpej }
172 1.1 thorpej if ((error = uiomove(&ch, 1, uio)) != 0) {
173 1.1 thorpej iic_release_bus(sc->sc_tag, 0);
174 1.1 thorpej return (error);
175 1.1 thorpej }
176 1.1 thorpej }
177 1.1 thorpej
178 1.1 thorpej iic_release_bus(sc->sc_tag, 0);
179 1.1 thorpej
180 1.1 thorpej return (0);
181 1.1 thorpej }
182 1.1 thorpej
183 1.1 thorpej /*ARGSUSED*/
184 1.1 thorpej int
185 1.1 thorpej strtc_write(dev_t dev, struct uio *uio, int flags)
186 1.1 thorpej {
187 1.1 thorpej struct strtc_softc *sc;
188 1.1 thorpej u_int8_t cmdbuf[2];
189 1.1 thorpej int a, error;
190 1.1 thorpej
191 1.1 thorpej if ((sc = device_lookup(&strtc_cd, minor(dev))) == NULL)
192 1.1 thorpej return (ENXIO);
193 1.1 thorpej
194 1.1 thorpej if (uio->uio_offset >= M41ST84_USER_RAM_SIZE)
195 1.1 thorpej return (EINVAL);
196 1.1 thorpej
197 1.1 thorpej if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
198 1.1 thorpej return (error);
199 1.1 thorpej
200 1.1 thorpej while (uio->uio_resid && uio->uio_offset < M41ST84_USER_RAM_SIZE) {
201 1.1 thorpej a = (int)uio->uio_offset;
202 1.1 thorpej cmdbuf[0] = a + M41ST84_USER_RAM;
203 1.1 thorpej if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
204 1.1 thorpej break;
205 1.1 thorpej
206 1.1 thorpej if ((error = iic_exec(sc->sc_tag,
207 1.1 thorpej uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
208 1.1 thorpej sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
209 1.1 thorpej printf("%s: strtc_write: write failed at 0x%x\n",
210 1.1 thorpej sc->sc_dev.dv_xname, a);
211 1.1 thorpej break;
212 1.1 thorpej }
213 1.1 thorpej }
214 1.1 thorpej
215 1.1 thorpej iic_release_bus(sc->sc_tag, 0);
216 1.1 thorpej
217 1.1 thorpej return (error);
218 1.1 thorpej }
219 1.1 thorpej
220 1.1 thorpej static int
221 1.4 he strtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv)
222 1.1 thorpej {
223 1.1 thorpej struct strtc_softc *sc = ch->cookie;
224 1.1 thorpej struct clock_ymdhms dt, check;
225 1.1 thorpej int retries;
226 1.1 thorpej
227 1.1 thorpej memset(&dt, 0, sizeof(dt));
228 1.1 thorpej memset(&check, 0, sizeof(check));
229 1.1 thorpej
230 1.1 thorpej /*
231 1.1 thorpej * Since we don't support Burst Read, we have to read the clock twice
232 1.1 thorpej * until we get two consecutive identical results.
233 1.1 thorpej */
234 1.1 thorpej retries = 5;
235 1.1 thorpej do {
236 1.1 thorpej strtc_clock_read(sc, &dt);
237 1.1 thorpej strtc_clock_read(sc, &check);
238 1.1 thorpej } while (memcmp(&dt, &check, sizeof(check)) != 0 && --retries);
239 1.1 thorpej
240 1.1 thorpej tv->tv_sec = clock_ymdhms_to_secs(&dt);
241 1.1 thorpej tv->tv_usec = 0;
242 1.1 thorpej
243 1.1 thorpej return (0);
244 1.1 thorpej }
245 1.1 thorpej
246 1.1 thorpej static int
247 1.4 he strtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv)
248 1.1 thorpej {
249 1.1 thorpej struct strtc_softc *sc = ch->cookie;
250 1.1 thorpej struct clock_ymdhms dt;
251 1.1 thorpej
252 1.1 thorpej clock_secs_to_ymdhms(tv->tv_sec, &dt);
253 1.1 thorpej
254 1.1 thorpej if (strtc_clock_write(sc, &dt) == 0)
255 1.1 thorpej return (-1);
256 1.1 thorpej
257 1.1 thorpej return (0);
258 1.1 thorpej }
259 1.1 thorpej
260 1.1 thorpej static int
261 1.1 thorpej strtc_clock_read(struct strtc_softc *sc, struct clock_ymdhms *dt)
262 1.1 thorpej {
263 1.1 thorpej u_int8_t bcd[M41ST84_REG_DATE_BYTES], cmdbuf[1];
264 1.1 thorpej int i;
265 1.1 thorpej
266 1.1 thorpej if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
267 1.1 thorpej printf("%s: strtc_clock_read: failed to acquire I2C bus\n",
268 1.1 thorpej sc->sc_dev.dv_xname);
269 1.1 thorpej return (0);
270 1.1 thorpej }
271 1.1 thorpej
272 1.3 scw /*
273 1.3 scw * Check for the HT bit -- if set, then clock lost power & stopped
274 1.3 scw * If that happened, then clear the bit so that the clock will have
275 1.3 scw * a chance to run again.
276 1.3 scw */
277 1.3 scw cmdbuf[0] = M41ST84_REG_AL_HOUR;
278 1.3 scw if (iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_address,
279 1.3 scw cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
280 1.3 scw iic_release_bus(sc->sc_tag, I2C_F_POLL);
281 1.3 scw printf("%s: strtc_clock_read: failed to read HT\n",
282 1.3 scw sc->sc_dev.dv_xname);
283 1.3 scw return (0);
284 1.3 scw }
285 1.3 scw if (cmdbuf[1] & M41ST84_AL_HOUR_HT) {
286 1.3 scw cmdbuf[1] &= ~M41ST84_AL_HOUR_HT;
287 1.3 scw if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address,
288 1.3 scw cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
289 1.3 scw iic_release_bus(sc->sc_tag, I2C_F_POLL);
290 1.3 scw printf("%s: strtc_clock_read: failed to reset HT\n",
291 1.3 scw sc->sc_dev.dv_xname);
292 1.3 scw return (0);
293 1.3 scw }
294 1.3 scw }
295 1.3 scw
296 1.1 thorpej /* Read each RTC register in order. */
297 1.1 thorpej for (i = M41ST84_REG_CSEC; i < M41ST84_REG_DATE_BYTES; i++) {
298 1.1 thorpej cmdbuf[0] = i;
299 1.1 thorpej
300 1.1 thorpej if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
301 1.1 thorpej sc->sc_address, cmdbuf, 1,
302 1.1 thorpej &bcd[i], 1, I2C_F_POLL)) {
303 1.1 thorpej iic_release_bus(sc->sc_tag, I2C_F_POLL);
304 1.1 thorpej printf("%s: strtc_clock_read: failed to read rtc "
305 1.1 thorpej "at 0x%x\n", sc->sc_dev.dv_xname, i);
306 1.1 thorpej return (0);
307 1.1 thorpej }
308 1.1 thorpej }
309 1.1 thorpej
310 1.1 thorpej /* Done with I2C */
311 1.1 thorpej iic_release_bus(sc->sc_tag, I2C_F_POLL);
312 1.1 thorpej
313 1.1 thorpej /*
314 1.1 thorpej * Convert the M41ST84's register values into something useable
315 1.1 thorpej */
316 1.1 thorpej dt->dt_sec = FROMBCD(bcd[M41ST84_REG_SEC] & M41ST84_SEC_MASK);
317 1.1 thorpej dt->dt_min = FROMBCD(bcd[M41ST84_REG_MIN] & M41ST84_MIN_MASK);
318 1.1 thorpej dt->dt_hour = FROMBCD(bcd[M41ST84_REG_CENHR] & M41ST84_HOUR_MASK);
319 1.1 thorpej dt->dt_day = FROMBCD(bcd[M41ST84_REG_DATE] & M41ST84_DATE_MASK);
320 1.1 thorpej dt->dt_mon = FROMBCD(bcd[M41ST84_REG_MONTH] & M41ST84_MONTH_MASK);
321 1.1 thorpej
322 1.1 thorpej /* XXX: Should be an MD way to specify EPOCH used by BIOS/Firmware */
323 1.1 thorpej dt->dt_year = FROMBCD(bcd[M41ST84_REG_YEAR]) + POSIX_BASE_YEAR;
324 1.1 thorpej
325 1.1 thorpej return (1);
326 1.1 thorpej }
327 1.1 thorpej
328 1.1 thorpej static int
329 1.1 thorpej strtc_clock_write(struct strtc_softc *sc, struct clock_ymdhms *dt)
330 1.1 thorpej {
331 1.1 thorpej uint8_t bcd[M41ST84_REG_DATE_BYTES], cmdbuf[2];
332 1.1 thorpej int i;
333 1.1 thorpej
334 1.1 thorpej /*
335 1.1 thorpej * Convert our time representation into something the M41ST84
336 1.1 thorpej * can understand.
337 1.1 thorpej */
338 1.1 thorpej bcd[M41ST84_REG_CSEC] = TOBCD(0); /* must always write as 0 */
339 1.1 thorpej bcd[M41ST84_REG_SEC] = TOBCD(dt->dt_sec);
340 1.1 thorpej bcd[M41ST84_REG_MIN] = TOBCD(dt->dt_min);
341 1.1 thorpej bcd[M41ST84_REG_CENHR] = TOBCD(dt->dt_hour);
342 1.1 thorpej bcd[M41ST84_REG_DATE] = TOBCD(dt->dt_day);
343 1.1 thorpej bcd[M41ST84_REG_DAY] = TOBCD(dt->dt_wday);
344 1.1 thorpej bcd[M41ST84_REG_MONTH] = TOBCD(dt->dt_mon);
345 1.1 thorpej bcd[M41ST84_REG_YEAR] = TOBCD((dt->dt_year - POSIX_BASE_YEAR) % 100);
346 1.1 thorpej
347 1.1 thorpej if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
348 1.1 thorpej printf("%s: strtc_clock_write: failed to acquire I2C bus\n",
349 1.1 thorpej sc->sc_dev.dv_xname);
350 1.1 thorpej return (0);
351 1.1 thorpej }
352 1.1 thorpej
353 1.1 thorpej /* Stop the clock */
354 1.1 thorpej cmdbuf[0] = M41ST84_REG_SEC;
355 1.1 thorpej cmdbuf[1] = M41ST84_SEC_ST;
356 1.1 thorpej
357 1.1 thorpej if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address,
358 1.1 thorpej cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
359 1.1 thorpej iic_release_bus(sc->sc_tag, I2C_F_POLL);
360 1.1 thorpej printf("%s: strtc_clock_write: failed to Hold Clock\n",
361 1.1 thorpej sc->sc_dev.dv_xname);
362 1.1 thorpej return (0);
363 1.1 thorpej }
364 1.1 thorpej
365 1.1 thorpej /*
366 1.2 briggs * Check for the HT bit -- if set, then clock lost power & stopped
367 1.2 briggs * If that happened, then clear the bit so that the clock will have
368 1.2 briggs * a chance to run again.
369 1.2 briggs */
370 1.2 briggs cmdbuf[0] = M41ST84_REG_AL_HOUR;
371 1.2 briggs if (iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_address,
372 1.2 briggs cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
373 1.2 briggs iic_release_bus(sc->sc_tag, I2C_F_POLL);
374 1.2 briggs printf("%s: strtc_clock_write: failed to read HT\n",
375 1.2 briggs sc->sc_dev.dv_xname);
376 1.2 briggs return (0);
377 1.2 briggs }
378 1.2 briggs if (cmdbuf[1] & M41ST84_AL_HOUR_HT) {
379 1.2 briggs cmdbuf[1] &= ~M41ST84_AL_HOUR_HT;
380 1.2 briggs if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address,
381 1.2 briggs cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
382 1.2 briggs iic_release_bus(sc->sc_tag, I2C_F_POLL);
383 1.2 briggs printf("%s: strtc_clock_write: failed to reset HT\n",
384 1.2 briggs sc->sc_dev.dv_xname);
385 1.2 briggs return (0);
386 1.2 briggs }
387 1.2 briggs }
388 1.2 briggs
389 1.2 briggs /*
390 1.1 thorpej * Write registers in reverse order. The last write (to the Seconds
391 1.1 thorpej * register) will undo the Clock Hold, above.
392 1.1 thorpej */
393 1.1 thorpej for (i = M41ST84_REG_DATE_BYTES - 1; i >= 0; i--) {
394 1.1 thorpej cmdbuf[0] = i;
395 1.1 thorpej if (iic_exec(sc->sc_tag,
396 1.1 thorpej i ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
397 1.1 thorpej sc->sc_address, cmdbuf, 1, &bcd[i], 1,
398 1.1 thorpej I2C_F_POLL)) {
399 1.1 thorpej iic_release_bus(sc->sc_tag, I2C_F_POLL);
400 1.1 thorpej printf("%s: strtc_clock_write: failed to write rtc "
401 1.1 thorpej " at 0x%x\n", sc->sc_dev.dv_xname, i);
402 1.1 thorpej /* XXX: Clock Hold is likely still asserted! */
403 1.1 thorpej return (0);
404 1.1 thorpej }
405 1.1 thorpej }
406 1.1 thorpej
407 1.1 thorpej iic_release_bus(sc->sc_tag, I2C_F_POLL);
408 1.1 thorpej
409 1.1 thorpej return (1);
410 1.1 thorpej }
411