m41t00.c revision 1.2.4.7 1 1.2.4.7 skrll /* $NetBSD: m41t00.c,v 1.2.4.7 2005/11/10 14:04:00 skrll Exp $ */
2 1.2.4.2 skrll
3 1.2.4.2 skrll /*
4 1.2.4.2 skrll * Copyright (c) 2003 Wasabi Systems, Inc.
5 1.2.4.2 skrll * All rights reserved.
6 1.2.4.2 skrll *
7 1.2.4.2 skrll * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
8 1.2.4.2 skrll *
9 1.2.4.2 skrll * Redistribution and use in source and binary forms, with or without
10 1.2.4.2 skrll * modification, are permitted provided that the following conditions
11 1.2.4.2 skrll * are met:
12 1.2.4.2 skrll * 1. Redistributions of source code must retain the above copyright
13 1.2.4.2 skrll * notice, this list of conditions and the following disclaimer.
14 1.2.4.2 skrll * 2. Redistributions in binary form must reproduce the above copyright
15 1.2.4.2 skrll * notice, this list of conditions and the following disclaimer in the
16 1.2.4.2 skrll * documentation and/or other materials provided with the distribution.
17 1.2.4.2 skrll * 3. All advertising materials mentioning features or use of this software
18 1.2.4.2 skrll * must display the following acknowledgement:
19 1.2.4.2 skrll * This product includes software developed for the NetBSD Project by
20 1.2.4.2 skrll * Wasabi Systems, Inc.
21 1.2.4.2 skrll * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.2.4.2 skrll * or promote products derived from this software without specific prior
23 1.2.4.2 skrll * written permission.
24 1.2.4.2 skrll *
25 1.2.4.2 skrll * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.2.4.2 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.2.4.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.2.4.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.2.4.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.2.4.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.2.4.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.2.4.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.2.4.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.2.4.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.2.4.2 skrll * POSSIBILITY OF SUCH DAMAGE.
36 1.2.4.2 skrll */
37 1.2.4.2 skrll
38 1.2.4.2 skrll #include <sys/param.h>
39 1.2.4.2 skrll #include <sys/systm.h>
40 1.2.4.2 skrll #include <sys/device.h>
41 1.2.4.2 skrll #include <sys/kernel.h>
42 1.2.4.2 skrll #include <sys/fcntl.h>
43 1.2.4.2 skrll #include <sys/uio.h>
44 1.2.4.2 skrll #include <sys/conf.h>
45 1.2.4.2 skrll #include <sys/proc.h>
46 1.2.4.2 skrll #include <sys/event.h>
47 1.2.4.2 skrll
48 1.2.4.2 skrll #include <machine/bus.h>
49 1.2.4.2 skrll
50 1.2.4.2 skrll #include <dev/clock_subr.h>
51 1.2.4.2 skrll
52 1.2.4.2 skrll #include <dev/i2c/i2cvar.h>
53 1.2.4.2 skrll #include <dev/i2c/m41t00reg.h>
54 1.2.4.2 skrll
55 1.2.4.2 skrll struct m41t00_softc {
56 1.2.4.2 skrll struct device sc_dev;
57 1.2.4.2 skrll i2c_tag_t sc_tag;
58 1.2.4.2 skrll int sc_address;
59 1.2.4.2 skrll int sc_open;
60 1.2.4.2 skrll struct todr_chip_handle sc_todr;
61 1.2.4.2 skrll };
62 1.2.4.2 skrll
63 1.2.4.2 skrll static int m41t00_match(struct device *, struct cfdata *, void *);
64 1.2.4.2 skrll static void m41t00_attach(struct device *, struct device *, void *);
65 1.2.4.2 skrll
66 1.2.4.2 skrll CFATTACH_DECL(m41trtc, sizeof(struct m41t00_softc),
67 1.2.4.2 skrll m41t00_match, m41t00_attach, NULL, NULL);
68 1.2.4.2 skrll extern struct cfdriver m41trtc_cd;
69 1.2.4.2 skrll
70 1.2.4.2 skrll dev_type_open(m41t00_open);
71 1.2.4.2 skrll dev_type_close(m41t00_close);
72 1.2.4.2 skrll dev_type_read(m41t00_read);
73 1.2.4.2 skrll dev_type_write(m41t00_write);
74 1.2.4.2 skrll
75 1.2.4.2 skrll const struct cdevsw m41t00_cdevsw = {
76 1.2.4.2 skrll m41t00_open, m41t00_close, m41t00_read, m41t00_write, noioctl,
77 1.2.4.2 skrll nostop, notty, nopoll, nommap, nokqfilter,
78 1.2.4.2 skrll };
79 1.2.4.2 skrll
80 1.2.4.2 skrll static int m41t00_clock_read(struct m41t00_softc *, struct clock_ymdhms *);
81 1.2.4.2 skrll static int m41t00_clock_write(struct m41t00_softc *, struct clock_ymdhms *);
82 1.2.4.7 skrll static int m41t00_gettime(struct todr_chip_handle *, volatile struct timeval *);
83 1.2.4.7 skrll static int m41t00_settime(struct todr_chip_handle *, volatile struct timeval *);
84 1.2.4.2 skrll static int m41t00_getcal(struct todr_chip_handle *, int *);
85 1.2.4.2 skrll static int m41t00_setcal(struct todr_chip_handle *, int);
86 1.2.4.2 skrll
87 1.2.4.2 skrll int
88 1.2.4.2 skrll m41t00_match(struct device *parent, struct cfdata *cf, void *aux)
89 1.2.4.2 skrll {
90 1.2.4.2 skrll struct i2c_attach_args *ia = aux;
91 1.2.4.2 skrll
92 1.2.4.2 skrll if (ia->ia_addr == M41T00_ADDR) {
93 1.2.4.2 skrll return 1;
94 1.2.4.2 skrll }
95 1.2.4.2 skrll
96 1.2.4.2 skrll return 0;
97 1.2.4.2 skrll }
98 1.2.4.2 skrll
99 1.2.4.2 skrll void
100 1.2.4.2 skrll m41t00_attach(struct device *parent, struct device *self, void *aux)
101 1.2.4.2 skrll {
102 1.2.4.2 skrll struct m41t00_softc *sc = (struct m41t00_softc *)self;
103 1.2.4.2 skrll struct i2c_attach_args *ia = aux;
104 1.2.4.2 skrll
105 1.2.4.2 skrll sc->sc_tag = ia->ia_tag;
106 1.2.4.2 skrll sc->sc_address = ia->ia_addr;
107 1.2.4.2 skrll
108 1.2.4.2 skrll aprint_naive(": Real-time Clock\n");
109 1.2.4.2 skrll aprint_normal(": M41T00 Real-time Clock\n");
110 1.2.4.2 skrll
111 1.2.4.2 skrll sc->sc_open = 0;
112 1.2.4.2 skrll sc->sc_todr.cookie = sc;
113 1.2.4.2 skrll sc->sc_todr.todr_gettime = m41t00_gettime;
114 1.2.4.2 skrll sc->sc_todr.todr_settime = m41t00_settime;
115 1.2.4.2 skrll sc->sc_todr.todr_getcal = m41t00_getcal;
116 1.2.4.2 skrll sc->sc_todr.todr_setcal = m41t00_setcal;
117 1.2.4.2 skrll sc->sc_todr.todr_setwen = NULL;
118 1.2.4.2 skrll
119 1.2.4.2 skrll todr_attach(&sc->sc_todr);
120 1.2.4.2 skrll }
121 1.2.4.2 skrll
122 1.2.4.2 skrll /*ARGSUSED*/
123 1.2.4.2 skrll int
124 1.2.4.6 skrll m41t00_open(dev_t dev, int flag, int fmt, struct lwp *l)
125 1.2.4.2 skrll {
126 1.2.4.2 skrll struct m41t00_softc *sc;
127 1.2.4.2 skrll
128 1.2.4.2 skrll if ((sc = device_lookup(&m41trtc_cd, minor(dev))) == NULL)
129 1.2.4.2 skrll return ENXIO;
130 1.2.4.2 skrll
131 1.2.4.2 skrll /* XXX: Locking */
132 1.2.4.2 skrll
133 1.2.4.2 skrll if (sc->sc_open)
134 1.2.4.2 skrll return EBUSY;
135 1.2.4.2 skrll
136 1.2.4.2 skrll sc->sc_open = 1;
137 1.2.4.2 skrll return 0;
138 1.2.4.2 skrll }
139 1.2.4.2 skrll
140 1.2.4.2 skrll /*ARGSUSED*/
141 1.2.4.2 skrll int
142 1.2.4.6 skrll m41t00_close(dev_t dev, int flag, int fmt, struct lwp *l)
143 1.2.4.2 skrll {
144 1.2.4.2 skrll struct m41t00_softc *sc;
145 1.2.4.2 skrll
146 1.2.4.2 skrll if ((sc = device_lookup(&m41trtc_cd, minor(dev))) == NULL)
147 1.2.4.2 skrll return ENXIO;
148 1.2.4.2 skrll
149 1.2.4.2 skrll sc->sc_open = 0;
150 1.2.4.2 skrll return 0;
151 1.2.4.2 skrll }
152 1.2.4.2 skrll
153 1.2.4.2 skrll /*ARGSUSED*/
154 1.2.4.2 skrll int
155 1.2.4.2 skrll m41t00_read(dev_t dev, struct uio *uio, int flags)
156 1.2.4.2 skrll {
157 1.2.4.2 skrll struct m41t00_softc *sc;
158 1.2.4.2 skrll u_int8_t ch, cmdbuf[1];
159 1.2.4.2 skrll int a, error;
160 1.2.4.2 skrll
161 1.2.4.2 skrll if ((sc = device_lookup(&m41trtc_cd, minor(dev))) == NULL)
162 1.2.4.2 skrll return (ENXIO);
163 1.2.4.2 skrll
164 1.2.4.2 skrll if (uio->uio_offset >= M41T00_NBYTES)
165 1.2.4.2 skrll return (EINVAL);
166 1.2.4.2 skrll
167 1.2.4.2 skrll if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
168 1.2.4.2 skrll return (error);
169 1.2.4.2 skrll
170 1.2.4.2 skrll while (uio->uio_resid && uio->uio_offset < M41T00_NBYTES) {
171 1.2.4.2 skrll a = (int)uio->uio_offset;
172 1.2.4.2 skrll cmdbuf[0] = a;
173 1.2.4.2 skrll if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
174 1.2.4.5 skrll sc->sc_address, cmdbuf, 1,
175 1.2.4.2 skrll &ch, 1, 0)) != 0) {
176 1.2.4.2 skrll iic_release_bus(sc->sc_tag, 0);
177 1.2.4.2 skrll printf("%s: m41t00_read: read failed at 0x%x\n",
178 1.2.4.2 skrll sc->sc_dev.dv_xname, a);
179 1.2.4.2 skrll return (error);
180 1.2.4.2 skrll }
181 1.2.4.2 skrll if ((error = uiomove(&ch, 1, uio)) != 0) {
182 1.2.4.2 skrll iic_release_bus(sc->sc_tag, 0);
183 1.2.4.2 skrll return (error);
184 1.2.4.2 skrll }
185 1.2.4.2 skrll }
186 1.2.4.2 skrll
187 1.2.4.2 skrll iic_release_bus(sc->sc_tag, 0);
188 1.2.4.2 skrll
189 1.2.4.2 skrll return (0);
190 1.2.4.2 skrll }
191 1.2.4.2 skrll
192 1.2.4.2 skrll /*ARGSUSED*/
193 1.2.4.2 skrll int
194 1.2.4.2 skrll m41t00_write(dev_t dev, struct uio *uio, int flags)
195 1.2.4.2 skrll {
196 1.2.4.2 skrll struct m41t00_softc *sc;
197 1.2.4.2 skrll u_int8_t cmdbuf[2];
198 1.2.4.2 skrll int a, error;
199 1.2.4.2 skrll
200 1.2.4.2 skrll if ((sc = device_lookup(&m41trtc_cd, minor(dev))) == NULL)
201 1.2.4.2 skrll return (ENXIO);
202 1.2.4.2 skrll
203 1.2.4.2 skrll if (uio->uio_offset >= M41T00_NBYTES)
204 1.2.4.2 skrll return (EINVAL);
205 1.2.4.2 skrll
206 1.2.4.2 skrll if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
207 1.2.4.2 skrll return (error);
208 1.2.4.2 skrll
209 1.2.4.2 skrll while (uio->uio_resid && uio->uio_offset < M41T00_NBYTES) {
210 1.2.4.2 skrll a = (int)uio->uio_offset;
211 1.2.4.2 skrll
212 1.2.4.2 skrll cmdbuf[0] = a;
213 1.2.4.2 skrll if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
214 1.2.4.2 skrll break;
215 1.2.4.2 skrll
216 1.2.4.2 skrll if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
217 1.2.4.2 skrll sc->sc_address,
218 1.2.4.2 skrll cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
219 1.2.4.2 skrll printf("%s: m41t00_write: write failed at 0x%x\n",
220 1.2.4.2 skrll sc->sc_dev.dv_xname, a);
221 1.2.4.2 skrll break;
222 1.2.4.2 skrll }
223 1.2.4.2 skrll }
224 1.2.4.2 skrll
225 1.2.4.2 skrll iic_release_bus(sc->sc_tag, 0);
226 1.2.4.2 skrll
227 1.2.4.2 skrll return (error);
228 1.2.4.2 skrll }
229 1.2.4.2 skrll
230 1.2.4.2 skrll static int
231 1.2.4.7 skrll m41t00_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv)
232 1.2.4.2 skrll {
233 1.2.4.2 skrll struct m41t00_softc *sc = ch->cookie;
234 1.2.4.2 skrll struct clock_ymdhms dt;
235 1.2.4.2 skrll
236 1.2.4.2 skrll if (m41t00_clock_read(sc, &dt) == 0)
237 1.2.4.2 skrll return (-1);
238 1.2.4.2 skrll
239 1.2.4.2 skrll tv->tv_sec = clock_ymdhms_to_secs(&dt);
240 1.2.4.2 skrll tv->tv_usec = 0;
241 1.2.4.2 skrll
242 1.2.4.2 skrll return (0);
243 1.2.4.2 skrll }
244 1.2.4.2 skrll
245 1.2.4.2 skrll static int
246 1.2.4.7 skrll m41t00_settime(struct todr_chip_handle *ch, volatile struct timeval *tv)
247 1.2.4.2 skrll {
248 1.2.4.2 skrll struct m41t00_softc *sc = ch->cookie;
249 1.2.4.2 skrll struct clock_ymdhms dt;
250 1.2.4.2 skrll
251 1.2.4.2 skrll clock_secs_to_ymdhms(tv->tv_sec, &dt);
252 1.2.4.2 skrll
253 1.2.4.2 skrll if (m41t00_clock_write(sc, &dt) == 0)
254 1.2.4.2 skrll return (-1);
255 1.2.4.2 skrll
256 1.2.4.2 skrll return (0);
257 1.2.4.2 skrll }
258 1.2.4.2 skrll
259 1.2.4.2 skrll static int
260 1.2.4.2 skrll m41t00_setcal(struct todr_chip_handle *ch, int cal)
261 1.2.4.2 skrll {
262 1.2.4.2 skrll
263 1.2.4.2 skrll return (EOPNOTSUPP);
264 1.2.4.2 skrll }
265 1.2.4.2 skrll
266 1.2.4.2 skrll static int
267 1.2.4.2 skrll m41t00_getcal(struct todr_chip_handle *ch, int *cal)
268 1.2.4.2 skrll {
269 1.2.4.2 skrll
270 1.2.4.2 skrll return (EOPNOTSUPP);
271 1.2.4.2 skrll }
272 1.2.4.2 skrll
273 1.2.4.2 skrll static int m41t00_rtc_offset[] = {
274 1.2.4.2 skrll M41T00_SEC,
275 1.2.4.2 skrll M41T00_MIN,
276 1.2.4.2 skrll M41T00_CENHR,
277 1.2.4.2 skrll M41T00_DAY,
278 1.2.4.2 skrll M41T00_DATE,
279 1.2.4.2 skrll M41T00_MONTH,
280 1.2.4.2 skrll M41T00_YEAR,
281 1.2.4.2 skrll };
282 1.2.4.2 skrll
283 1.2.4.2 skrll static int
284 1.2.4.2 skrll m41t00_clock_read(struct m41t00_softc *sc, struct clock_ymdhms *dt)
285 1.2.4.2 skrll {
286 1.2.4.2 skrll u_int8_t bcd[M41T00_NBYTES], cmdbuf[1];
287 1.2.4.2 skrll int i, n;
288 1.2.4.2 skrll
289 1.2.4.2 skrll if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
290 1.2.4.2 skrll printf("%s: m41t00_clock_read: failed to acquire I2C bus\n",
291 1.2.4.2 skrll sc->sc_dev.dv_xname);
292 1.2.4.2 skrll return (0);
293 1.2.4.2 skrll }
294 1.2.4.2 skrll
295 1.2.4.2 skrll /* Read each timekeeping register in order. */
296 1.2.4.2 skrll n = sizeof(m41t00_rtc_offset) / sizeof(m41t00_rtc_offset[0]);
297 1.2.4.2 skrll for (i = 0; i < n ; i++) {
298 1.2.4.2 skrll cmdbuf[0] = m41t00_rtc_offset[i];
299 1.2.4.2 skrll
300 1.2.4.2 skrll if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
301 1.2.4.2 skrll sc->sc_address, cmdbuf, 1,
302 1.2.4.2 skrll &bcd[i], 1, I2C_F_POLL)) {
303 1.2.4.2 skrll iic_release_bus(sc->sc_tag, I2C_F_POLL);
304 1.2.4.2 skrll printf("%s: m41t00_clock_read: failed to read rtc "
305 1.2.4.2 skrll "at 0x%x\n", sc->sc_dev.dv_xname,
306 1.2.4.2 skrll m41t00_rtc_offset[i]);
307 1.2.4.2 skrll return (0);
308 1.2.4.2 skrll }
309 1.2.4.2 skrll }
310 1.2.4.2 skrll
311 1.2.4.2 skrll /* Done with I2C */
312 1.2.4.2 skrll iic_release_bus(sc->sc_tag, I2C_F_POLL);
313 1.2.4.2 skrll
314 1.2.4.2 skrll /*
315 1.2.4.2 skrll * Convert the M41T00's register values into something useable
316 1.2.4.2 skrll */
317 1.2.4.2 skrll dt->dt_sec = FROMBCD(bcd[M41T00_SEC] & M41T00_SEC_MASK);
318 1.2.4.2 skrll dt->dt_min = FROMBCD(bcd[M41T00_MIN] & M41T00_MIN_MASK);
319 1.2.4.2 skrll dt->dt_hour = FROMBCD(bcd[M41T00_CENHR] & M41T00_HOUR_MASK);
320 1.2.4.2 skrll dt->dt_day = FROMBCD(bcd[M41T00_DATE] & M41T00_DATE_MASK);
321 1.2.4.2 skrll dt->dt_wday = FROMBCD(bcd[M41T00_DAY] & M41T00_DAY_MASK);
322 1.2.4.2 skrll dt->dt_mon = FROMBCD(bcd[M41T00_MONTH] & M41T00_MONTH_MASK);
323 1.2.4.2 skrll dt->dt_year = FROMBCD(bcd[M41T00_YEAR] & M41T00_YEAR_MASK);
324 1.2.4.2 skrll
325 1.2.4.2 skrll /*
326 1.2.4.2 skrll * Since the m41t00 just stores 00-99, and this is 2003 as I write
327 1.2.4.2 skrll * this comment, use 2000 as a base year
328 1.2.4.2 skrll */
329 1.2.4.2 skrll dt->dt_year += 2000;
330 1.2.4.2 skrll
331 1.2.4.2 skrll return (1);
332 1.2.4.2 skrll }
333 1.2.4.2 skrll
334 1.2.4.2 skrll static int
335 1.2.4.2 skrll m41t00_clock_write(struct m41t00_softc *sc, struct clock_ymdhms *dt)
336 1.2.4.2 skrll {
337 1.2.4.2 skrll uint8_t bcd[M41T00_DATE_BYTES], cmdbuf[2];
338 1.2.4.2 skrll uint8_t init_seconds, final_seconds;
339 1.2.4.2 skrll int i;
340 1.2.4.2 skrll
341 1.2.4.2 skrll /*
342 1.2.4.2 skrll * Convert our time representation into something the MAX6900
343 1.2.4.2 skrll * can understand.
344 1.2.4.2 skrll */
345 1.2.4.2 skrll bcd[M41T00_SEC] = TOBCD(dt->dt_sec);
346 1.2.4.2 skrll bcd[M41T00_MIN] = TOBCD(dt->dt_min);
347 1.2.4.2 skrll bcd[M41T00_CENHR] = TOBCD(dt->dt_hour);
348 1.2.4.2 skrll bcd[M41T00_DATE] = TOBCD(dt->dt_day);
349 1.2.4.2 skrll bcd[M41T00_DAY] = TOBCD(dt->dt_wday);
350 1.2.4.2 skrll bcd[M41T00_MONTH] = TOBCD(dt->dt_mon);
351 1.2.4.2 skrll bcd[M41T00_YEAR] = TOBCD(dt->dt_year % 100);
352 1.2.4.2 skrll
353 1.2.4.2 skrll if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
354 1.2.4.2 skrll printf("%s: m41t00_clock_write: failed to acquire I2C bus\n",
355 1.2.4.2 skrll sc->sc_dev.dv_xname);
356 1.2.4.2 skrll return (0);
357 1.2.4.2 skrll }
358 1.2.4.2 skrll
359 1.2.4.2 skrll /*
360 1.2.4.2 skrll * The MAX6900 RTC manual recommends ensuring "atomicity" of
361 1.2.4.2 skrll * a non-burst write by:
362 1.2.4.2 skrll *
363 1.2.4.2 skrll * - writing SECONDS
364 1.2.4.2 skrll * - reading back SECONDS, remembering it as "initial seconds"
365 1.2.4.2 skrll * - write the remaing RTC registers
366 1.2.4.2 skrll * - read back SECONDS as "final seconds"
367 1.2.4.2 skrll * - if "initial seconds" == 59, ensure "final seconds" == 59
368 1.2.4.2 skrll * - else, ensure "final seconds" is no more than one second
369 1.2.4.2 skrll * beyond "initial seconds".
370 1.2.4.2 skrll *
371 1.2.4.2 skrll * This sounds reasonable for the M41T00, too.
372 1.2.4.2 skrll */
373 1.2.4.2 skrll again:
374 1.2.4.2 skrll cmdbuf[0] = M41T00_SEC;
375 1.2.4.2 skrll if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
376 1.2.4.2 skrll cmdbuf, 1, &bcd[M41T00_SEC], 1, I2C_F_POLL)) {
377 1.2.4.2 skrll iic_release_bus(sc->sc_tag, I2C_F_POLL);
378 1.2.4.2 skrll printf("%s: m41t00_clock_write: failed to write SECONDS\n",
379 1.2.4.2 skrll sc->sc_dev.dv_xname);
380 1.2.4.2 skrll return (0);
381 1.2.4.2 skrll }
382 1.2.4.2 skrll
383 1.2.4.2 skrll cmdbuf[0] = M41T00_SEC;
384 1.2.4.2 skrll if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
385 1.2.4.2 skrll cmdbuf, 1, &init_seconds, 1, I2C_F_POLL)) {
386 1.2.4.2 skrll iic_release_bus(sc->sc_tag, I2C_F_POLL);
387 1.2.4.2 skrll printf("%s: m41t00_clock_write: failed to read "
388 1.2.4.2 skrll "INITIAL SECONDS\n", sc->sc_dev.dv_xname);
389 1.2.4.2 skrll return (0);
390 1.2.4.2 skrll }
391 1.2.4.2 skrll init_seconds = FROMBCD(init_seconds & M41T00_SEC_MASK);
392 1.2.4.2 skrll
393 1.2.4.2 skrll for (i = 1; i < M41T00_DATE_BYTES; i++) {
394 1.2.4.2 skrll cmdbuf[0] = m41t00_rtc_offset[i];
395 1.2.4.2 skrll if (iic_exec(sc->sc_tag,
396 1.2.4.2 skrll I2C_OP_WRITE_WITH_STOP, sc->sc_address,
397 1.2.4.2 skrll cmdbuf, 1, &bcd[i], 1, I2C_F_POLL)) {
398 1.2.4.2 skrll iic_release_bus(sc->sc_tag, I2C_F_POLL);
399 1.2.4.2 skrll printf("%s: m41t00_clock_write: failed to write rtc "
400 1.2.4.2 skrll " at 0x%x\n", sc->sc_dev.dv_xname,
401 1.2.4.2 skrll m41t00_rtc_offset[i]);
402 1.2.4.2 skrll return (0);
403 1.2.4.2 skrll }
404 1.2.4.2 skrll }
405 1.2.4.2 skrll
406 1.2.4.2 skrll cmdbuf[0] = M41T00_SEC;
407 1.2.4.2 skrll if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
408 1.2.4.2 skrll cmdbuf, 1, &final_seconds, 1, I2C_F_POLL)) {
409 1.2.4.2 skrll iic_release_bus(sc->sc_tag, I2C_F_POLL);
410 1.2.4.2 skrll printf("%s: m41t00_clock_write: failed to read "
411 1.2.4.2 skrll "FINAL SECONDS\n", sc->sc_dev.dv_xname);
412 1.2.4.2 skrll return (0);
413 1.2.4.2 skrll }
414 1.2.4.2 skrll final_seconds = FROMBCD(final_seconds & M41T00_SEC_MASK);
415 1.2.4.2 skrll
416 1.2.4.2 skrll if ((init_seconds != final_seconds) &&
417 1.2.4.2 skrll (((init_seconds + 1) % 60) != final_seconds)) {
418 1.2.4.2 skrll #if 1
419 1.2.4.2 skrll printf("%s: m41t00_clock_write: init %d, final %d, try again\n",
420 1.2.4.2 skrll sc->sc_dev.dv_xname, init_seconds, final_seconds);
421 1.2.4.2 skrll #endif
422 1.2.4.2 skrll goto again;
423 1.2.4.2 skrll }
424 1.2.4.2 skrll
425 1.2.4.2 skrll iic_release_bus(sc->sc_tag, I2C_F_POLL);
426 1.2.4.2 skrll
427 1.2.4.2 skrll return (1);
428 1.2.4.2 skrll }
429