max6900.c revision 1.16
1 /* $NetBSD: max6900.c,v 1.16 2018/06/16 21:22:13 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: max6900.c,v 1.16 2018/06/16 21:22:13 thorpej Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 #include <sys/kernel.h> 45 #include <sys/fcntl.h> 46 #include <sys/uio.h> 47 #include <sys/conf.h> 48 #include <sys/event.h> 49 50 #include <dev/clock_subr.h> 51 52 #include <dev/i2c/i2cvar.h> 53 #include <dev/i2c/max6900reg.h> 54 55 struct maxrtc_softc { 56 device_t sc_dev; 57 i2c_tag_t sc_tag; 58 int sc_address; 59 int sc_open; 60 struct todr_chip_handle sc_todr; 61 }; 62 63 static int maxrtc_match(device_t, cfdata_t, void *); 64 static void maxrtc_attach(device_t, device_t, void *); 65 66 CFATTACH_DECL_NEW(maxrtc, sizeof(struct maxrtc_softc), 67 maxrtc_match, maxrtc_attach, NULL, NULL); 68 extern struct cfdriver maxrtc_cd; 69 70 dev_type_open(maxrtc_open); 71 dev_type_close(maxrtc_close); 72 dev_type_read(maxrtc_read); 73 dev_type_write(maxrtc_write); 74 75 const struct cdevsw maxrtc_cdevsw = { 76 .d_open = maxrtc_open, 77 .d_close = maxrtc_close, 78 .d_read = maxrtc_read, 79 .d_write = maxrtc_write, 80 .d_ioctl = noioctl, 81 .d_stop = nostop, 82 .d_tty = notty, 83 .d_poll = nopoll, 84 .d_mmap = nommap, 85 .d_kqfilter = nokqfilter, 86 .d_discard = nodiscard, 87 .d_flag = D_OTHER 88 }; 89 90 static int maxrtc_clock_read(struct maxrtc_softc *, struct clock_ymdhms *); 91 static int maxrtc_clock_write(struct maxrtc_softc *, struct clock_ymdhms *); 92 static int maxrtc_gettime(struct todr_chip_handle *, struct timeval *); 93 static int maxrtc_settime(struct todr_chip_handle *, struct timeval *); 94 95 int 96 maxrtc_match(device_t parent, cfdata_t cf, void *aux) 97 { 98 struct i2c_attach_args *ia = aux; 99 100 if ((ia->ia_addr & MAX6900_ADDRMASK) == MAX6900_ADDR) 101 return (I2C_MATCH_ADDRESS_ONLY); 102 103 return (0); 104 } 105 106 void 107 maxrtc_attach(device_t parent, device_t self, void *aux) 108 { 109 struct maxrtc_softc *sc = device_private(self); 110 struct i2c_attach_args *ia = aux; 111 112 sc->sc_tag = ia->ia_tag; 113 sc->sc_address = ia->ia_addr; 114 sc->sc_dev = self; 115 116 aprint_naive(": Real-time Clock/NVRAM\n"); 117 aprint_normal(": MAX6900 Real-time Clock/NVRAM\n"); 118 119 sc->sc_open = 0; 120 121 sc->sc_todr.cookie = sc; 122 sc->sc_todr.todr_gettime = maxrtc_gettime; 123 sc->sc_todr.todr_settime = maxrtc_settime; 124 sc->sc_todr.todr_setwen = NULL; 125 126 todr_attach(&sc->sc_todr); 127 } 128 129 /*ARGSUSED*/ 130 int 131 maxrtc_open(dev_t dev, int flag, int fmt, struct lwp *l) 132 { 133 struct maxrtc_softc *sc; 134 135 if ((sc = device_lookup_private(&maxrtc_cd, minor(dev))) == NULL) 136 return (ENXIO); 137 138 /* XXX: Locking */ 139 140 if (sc->sc_open) 141 return (EBUSY); 142 143 sc->sc_open = 1; 144 return (0); 145 } 146 147 /*ARGSUSED*/ 148 int 149 maxrtc_close(dev_t dev, int flag, int fmt, struct lwp *l) 150 { 151 struct maxrtc_softc *sc; 152 153 if ((sc = device_lookup_private(&maxrtc_cd, minor(dev))) == NULL) 154 return (ENXIO); 155 156 sc->sc_open = 0; 157 return (0); 158 } 159 160 /*ARGSUSED*/ 161 int 162 maxrtc_read(dev_t dev, struct uio *uio, int flags) 163 { 164 struct maxrtc_softc *sc; 165 u_int8_t ch, cmdbuf[1]; 166 int a, error; 167 168 if ((sc = device_lookup_private(&maxrtc_cd, minor(dev))) == NULL) 169 return (ENXIO); 170 171 if (uio->uio_offset >= MAX6900_RAM_BYTES) 172 return (EINVAL); 173 174 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 175 return (error); 176 177 while (uio->uio_resid && uio->uio_offset < MAX6900_RAM_BYTES) { 178 a = (int)uio->uio_offset; 179 cmdbuf[0] = MAX6900_REG_RAM(a) | MAX6900_CMD_READ; 180 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 181 sc->sc_address, cmdbuf, 1, 182 &ch, 1, 0)) != 0) { 183 iic_release_bus(sc->sc_tag, 0); 184 aprint_error_dev(sc->sc_dev, 185 "maxrtc_read: read failed at 0x%x\n", a); 186 return (error); 187 } 188 if ((error = uiomove(&ch, 1, uio)) != 0) { 189 iic_release_bus(sc->sc_tag, 0); 190 return (error); 191 } 192 } 193 194 iic_release_bus(sc->sc_tag, 0); 195 196 return (0); 197 } 198 199 /*ARGSUSED*/ 200 int 201 maxrtc_write(dev_t dev, struct uio *uio, int flags) 202 { 203 struct maxrtc_softc *sc; 204 u_int8_t cmdbuf[2]; 205 int a, error, sverror; 206 207 if ((sc = device_lookup_private(&maxrtc_cd, minor(dev))) == NULL) 208 return (ENXIO); 209 210 if (uio->uio_offset >= MAX6900_RAM_BYTES) 211 return (EINVAL); 212 213 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 214 return (error); 215 216 /* Start by clearing the control register's write-protect bit. */ 217 cmdbuf[0] = MAX6900_REG_CONTROL | MAX6900_CMD_WRITE; 218 cmdbuf[1] = 0; 219 220 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 221 cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) { 222 iic_release_bus(sc->sc_tag, 0); 223 aprint_error_dev(sc->sc_dev, 224 "maxrtc_write: failed to clear WP bit\n"); 225 return (error); 226 } 227 228 while (uio->uio_resid && uio->uio_offset < MAX6900_RAM_BYTES) { 229 a = (int)uio->uio_offset; 230 231 cmdbuf[0] = MAX6900_REG_RAM(a) | MAX6900_CMD_WRITE; 232 if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0) 233 break; 234 235 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 236 cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) { 237 aprint_error_dev(sc->sc_dev, 238 "maxrtc_write: write failed at 0x%x\n", a); 239 break; 240 } 241 } 242 243 /* Set the write-protect bit again. */ 244 cmdbuf[0] = MAX6900_REG_CONTROL | MAX6900_CMD_WRITE; 245 cmdbuf[1] = MAX6900_CONTROL_WP; 246 247 sverror = error; 248 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 249 sc->sc_address, cmdbuf, 1, 250 &cmdbuf[1], 1, 0)) != 0) { 251 if (sverror != 0) 252 error = sverror; 253 aprint_error_dev(sc->sc_dev, 254 "maxrtc_write: failed to set WP bit\n"); 255 } 256 257 iic_release_bus(sc->sc_tag, 0); 258 259 return (error); 260 } 261 262 static int 263 maxrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv) 264 { 265 struct maxrtc_softc *sc = ch->cookie; 266 struct clock_ymdhms dt; 267 268 if (maxrtc_clock_read(sc, &dt) == 0) 269 return (-1); 270 271 tv->tv_sec = clock_ymdhms_to_secs(&dt); 272 tv->tv_usec = 0; 273 274 return (0); 275 } 276 277 static int 278 maxrtc_settime(struct todr_chip_handle *ch, struct timeval *tv) 279 { 280 struct maxrtc_softc *sc = ch->cookie; 281 struct clock_ymdhms dt; 282 283 clock_secs_to_ymdhms(tv->tv_sec, &dt); 284 285 if (maxrtc_clock_write(sc, &dt) == 0) 286 return (-1); 287 288 return (0); 289 } 290 291 /* 292 * While the MAX6900 has a nice Clock Burst Read/Write command, 293 * we can't use it, since some I2C controllers do not support 294 * anything other than single-byte transfers. 295 */ 296 static int max6900_rtc_offset[] = { 297 MAX6900_REG_SECOND, 298 MAX6900_REG_MINUTE, 299 MAX6900_REG_HOUR, 300 MAX6900_REG_DATE, 301 MAX6900_REG_MONTH, 302 MAX6900_REG_DAY, 303 MAX6900_REG_YEAR, 304 MAX6900_REG_CENTURY, /* control, if burst */ 305 }; 306 307 static int 308 maxrtc_clock_read(struct maxrtc_softc *sc, struct clock_ymdhms *dt) 309 { 310 u_int8_t bcd[MAX6900_BURST_LEN], cmdbuf[1]; 311 int i; 312 313 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 314 aprint_error_dev(sc->sc_dev, 315 "maxrtc_clock_read: failed to acquire I2C bus\n"); 316 return (0); 317 } 318 319 /* Read each timekeeping register in order. */ 320 for (i = 0; i < MAX6900_BURST_LEN; i++) { 321 cmdbuf[0] = max6900_rtc_offset[i] | MAX6900_CMD_READ; 322 323 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 324 sc->sc_address, cmdbuf, 1, 325 &bcd[i], 1, I2C_F_POLL)) { 326 iic_release_bus(sc->sc_tag, I2C_F_POLL); 327 aprint_error_dev(sc->sc_dev, 328 "maxrtc_clock_read: failed to read rtc " 329 "at 0x%x\n", 330 max6900_rtc_offset[i]); 331 return (0); 332 } 333 } 334 335 /* Done with I2C */ 336 iic_release_bus(sc->sc_tag, I2C_F_POLL); 337 338 /* 339 * Convert the MAX6900's register values into something useable 340 */ 341 dt->dt_sec = bcdtobin(bcd[MAX6900_BURST_SECOND] & MAX6900_SECOND_MASK); 342 dt->dt_min = bcdtobin(bcd[MAX6900_BURST_MINUTE] & MAX6900_MINUTE_MASK); 343 344 if (bcd[MAX6900_BURST_HOUR] & MAX6900_HOUR_12HRS) { 345 dt->dt_hour = bcdtobin(bcd[MAX6900_BURST_HOUR] & 346 MAX6900_HOUR_12MASK); 347 if (bcd[MAX6900_BURST_HOUR] & MAX6900_HOUR_12HRS_PM) 348 dt->dt_hour += 12; 349 } else { 350 dt->dt_hour = bcdtobin(bcd[MAX6900_BURST_HOUR] & 351 MAX6900_HOUR_24MASK); 352 } 353 354 dt->dt_day = bcdtobin(bcd[MAX6900_BURST_DATE] & MAX6900_DATE_MASK); 355 dt->dt_mon = bcdtobin(bcd[MAX6900_BURST_MONTH] & MAX6900_MONTH_MASK); 356 dt->dt_year = bcdtobin(bcd[MAX6900_BURST_YEAR]); 357 /* century in the burst control slot */ 358 dt->dt_year += (int)bcdtobin(bcd[MAX6900_BURST_CONTROL]) * 100; 359 360 return (1); 361 } 362 363 static int 364 maxrtc_clock_write(struct maxrtc_softc *sc, struct clock_ymdhms *dt) 365 { 366 uint8_t bcd[MAX6900_BURST_LEN], cmdbuf[2]; 367 uint8_t init_seconds, final_seconds; 368 int i; 369 370 /* 371 * Convert our time representation into something the MAX6900 372 * can understand. 373 */ 374 bcd[MAX6900_BURST_SECOND] = bintobcd(dt->dt_sec); 375 bcd[MAX6900_BURST_MINUTE] = bintobcd(dt->dt_min); 376 bcd[MAX6900_BURST_HOUR] = bintobcd(dt->dt_hour) & MAX6900_HOUR_24MASK; 377 bcd[MAX6900_BURST_DATE] = bintobcd(dt->dt_day); 378 bcd[MAX6900_BURST_WDAY] = bintobcd(dt->dt_wday); 379 bcd[MAX6900_BURST_MONTH] = bintobcd(dt->dt_mon); 380 bcd[MAX6900_BURST_YEAR] = bintobcd(dt->dt_year % 100); 381 /* century in control slot */ 382 bcd[MAX6900_BURST_CONTROL] = bintobcd(dt->dt_year / 100); 383 384 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 385 aprint_error_dev(sc->sc_dev, 386 "maxrtc_clock_write: failed to acquire I2C bus\n"); 387 return (0); 388 } 389 390 /* Start by clearing the control register's write-protect bit. */ 391 cmdbuf[0] = MAX6900_REG_CONTROL | MAX6900_CMD_WRITE; 392 cmdbuf[1] = 0; 393 394 if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 395 cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) { 396 iic_release_bus(sc->sc_tag, I2C_F_POLL); 397 aprint_error_dev(sc->sc_dev, 398 "maxrtc_clock_write: failed to clear WP bit\n"); 399 return (0); 400 } 401 402 /* 403 * The MAX6900 RTC manual recommends ensuring "atomicity" of 404 * a non-burst write by: 405 * 406 * - writing SECONDS 407 * - reading back SECONDS, remembering it as "initial seconds" 408 * - write the remaing RTC registers 409 * - read back SECONDS as "final seconds" 410 * - if "initial seconds" == 59, ensure "final seconds" == 59 411 * - else, ensure "final seconds" is no more than one second 412 * beyond "initial seconds". 413 */ 414 again: 415 cmdbuf[0] = MAX6900_REG_SECOND | MAX6900_CMD_WRITE; 416 if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 417 cmdbuf, 1, &bcd[MAX6900_BURST_SECOND], 1, I2C_F_POLL)) { 418 iic_release_bus(sc->sc_tag, I2C_F_POLL); 419 aprint_error_dev(sc->sc_dev, 420 "maxrtc_clock_write: failed to write SECONDS\n"); 421 return (0); 422 } 423 424 cmdbuf[0] = MAX6900_REG_SECOND | MAX6900_CMD_READ; 425 if (iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_address, 426 cmdbuf, 1, &init_seconds, 1, I2C_F_POLL)) { 427 iic_release_bus(sc->sc_tag, I2C_F_POLL); 428 aprint_error_dev(sc->sc_dev, 429 "maxrtc_clock_write: failed to read " 430 "INITIAL SECONDS\n"); 431 return (0); 432 } 433 434 for (i = 1; i < MAX6900_BURST_LEN; i++) { 435 cmdbuf[0] = max6900_rtc_offset[i] | MAX6900_CMD_WRITE; 436 if (iic_exec(sc->sc_tag, 437 i != MAX6900_BURST_LEN - 1 ? I2C_OP_WRITE : 438 I2C_OP_WRITE_WITH_STOP, sc->sc_address, 439 cmdbuf, 1, &bcd[i], 1, I2C_F_POLL)) { 440 iic_release_bus(sc->sc_tag, I2C_F_POLL); 441 aprint_error_dev(sc->sc_dev, 442 "maxrtc_clock_write: failed to write rtc " 443 " at 0x%x\n", 444 max6900_rtc_offset[i]); 445 return (0); 446 } 447 } 448 449 cmdbuf[0] = MAX6900_REG_SECOND | MAX6900_CMD_READ; 450 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 451 cmdbuf, 1, &final_seconds, 1, I2C_F_POLL)) { 452 iic_release_bus(sc->sc_tag, I2C_F_POLL); 453 aprint_error_dev(sc->sc_dev, 454 "maxrtc_clock_write: failed to read " 455 "FINAL SECONDS\n"); 456 return (0); 457 } 458 459 if ((init_seconds == 59 && final_seconds != 59) || 460 (init_seconds != 59 && final_seconds != init_seconds + 1)) { 461 #if 1 462 printf("%s: maxrtc_clock_write: init %d, final %d, try again\n", 463 device_xname(sc->sc_dev), init_seconds, final_seconds); 464 #endif 465 goto again; 466 } 467 468 /* Finish by setting the control register's write-protect bit. */ 469 cmdbuf[0] = MAX6900_REG_CONTROL | MAX6900_CMD_WRITE; 470 cmdbuf[1] = MAX6900_CONTROL_WP; 471 472 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 473 cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) { 474 iic_release_bus(sc->sc_tag, I2C_F_POLL); 475 aprint_error_dev(sc->sc_dev, 476 "maxrtc_clock_write: failed to set WP bit\n"); 477 return (0); 478 } 479 480 iic_release_bus(sc->sc_tag, I2C_F_POLL); 481 482 return (1); 483 } 484
Indexes created Wed Sep 24 05:09:52 GMT 2025