max6900.c revision 1.7.20.1
1 /* $NetBSD: max6900.c,v 1.7.20.1 2008/01/09 01:52:41 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: max6900.c,v 1.7.20.1 2008/01/09 01:52:41 matt Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 #include <sys/kernel.h> 45 #include <sys/fcntl.h> 46 #include <sys/uio.h> 47 #include <sys/conf.h> 48 #include <sys/event.h> 49 50 #include <dev/clock_subr.h> 51 52 #include <dev/i2c/i2cvar.h> 53 #include <dev/i2c/max6900reg.h> 54 55 struct maxrtc_softc { 56 struct device sc_dev; 57 i2c_tag_t sc_tag; 58 int sc_address; 59 int sc_open; 60 struct todr_chip_handle sc_todr; 61 }; 62 63 static int maxrtc_match(struct device *, struct cfdata *, void *); 64 static void maxrtc_attach(struct device *, struct device *, void *); 65 66 CFATTACH_DECL(maxrtc, sizeof(struct maxrtc_softc), 67 maxrtc_match, maxrtc_attach, NULL, NULL); 68 extern struct cfdriver maxrtc_cd; 69 70 dev_type_open(maxrtc_open); 71 dev_type_close(maxrtc_close); 72 dev_type_read(maxrtc_read); 73 dev_type_write(maxrtc_write); 74 75 const struct cdevsw maxrtc_cdevsw = { 76 maxrtc_open, maxrtc_close, maxrtc_read, maxrtc_write, noioctl, 77 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 78 }; 79 80 static int maxrtc_clock_read(struct maxrtc_softc *, struct clock_ymdhms *); 81 static int maxrtc_clock_write(struct maxrtc_softc *, struct clock_ymdhms *); 82 static int maxrtc_gettime(struct todr_chip_handle *, volatile struct timeval *); 83 static int maxrtc_settime(struct todr_chip_handle *, volatile struct timeval *); 84 85 int 86 maxrtc_match(struct device *parent, struct cfdata *cf, void *aux) 87 { 88 struct i2c_attach_args *ia = aux; 89 90 if ((ia->ia_addr & MAX6900_ADDRMASK) == MAX6900_ADDR) 91 return (1); 92 93 return (0); 94 } 95 96 void 97 maxrtc_attach(struct device *parent, struct device *self, void *aux) 98 { 99 struct maxrtc_softc *sc = device_private(self); 100 struct i2c_attach_args *ia = aux; 101 102 sc->sc_tag = ia->ia_tag; 103 sc->sc_address = ia->ia_addr; 104 105 aprint_naive(": Real-time Clock/NVRAM\n"); 106 aprint_normal(": MAX6900 Real-time Clock/NVRAM\n"); 107 108 sc->sc_open = 0; 109 110 sc->sc_todr.cookie = sc; 111 sc->sc_todr.todr_gettime = maxrtc_gettime; 112 sc->sc_todr.todr_settime = maxrtc_settime; 113 sc->sc_todr.todr_setwen = NULL; 114 115 todr_attach(&sc->sc_todr); 116 } 117 118 /*ARGSUSED*/ 119 int 120 maxrtc_open(dev_t dev, int flag, int fmt, struct lwp *l) 121 { 122 struct maxrtc_softc *sc; 123 124 if ((sc = device_lookup(&maxrtc_cd, minor(dev))) == NULL) 125 return (ENXIO); 126 127 /* XXX: Locking */ 128 129 if (sc->sc_open) 130 return (EBUSY); 131 132 sc->sc_open = 1; 133 return (0); 134 } 135 136 /*ARGSUSED*/ 137 int 138 maxrtc_close(dev_t dev, int flag, int fmt, struct lwp *l) 139 { 140 struct maxrtc_softc *sc; 141 142 if ((sc = device_lookup(&maxrtc_cd, minor(dev))) == NULL) 143 return (ENXIO); 144 145 sc->sc_open = 0; 146 return (0); 147 } 148 149 /*ARGSUSED*/ 150 int 151 maxrtc_read(dev_t dev, struct uio *uio, int flags) 152 { 153 struct maxrtc_softc *sc; 154 u_int8_t ch, cmdbuf[1]; 155 int a, error; 156 157 if ((sc = device_lookup(&maxrtc_cd, minor(dev))) == NULL) 158 return (ENXIO); 159 160 if (uio->uio_offset >= MAX6900_RAM_BYTES) 161 return (EINVAL); 162 163 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 164 return (error); 165 166 while (uio->uio_resid && uio->uio_offset < MAX6900_RAM_BYTES) { 167 a = (int)uio->uio_offset; 168 cmdbuf[0] = MAX6900_REG_RAM(a) | MAX6900_CMD_READ; 169 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 170 sc->sc_address, cmdbuf, 1, 171 &ch, 1, 0)) != 0) { 172 iic_release_bus(sc->sc_tag, 0); 173 printf("%s: maxrtc_read: read failed at 0x%x\n", 174 sc->sc_dev.dv_xname, a); 175 return (error); 176 } 177 if ((error = uiomove(&ch, 1, uio)) != 0) { 178 iic_release_bus(sc->sc_tag, 0); 179 return (error); 180 } 181 } 182 183 iic_release_bus(sc->sc_tag, 0); 184 185 return (0); 186 } 187 188 /*ARGSUSED*/ 189 int 190 maxrtc_write(dev_t dev, struct uio *uio, int flags) 191 { 192 struct maxrtc_softc *sc; 193 u_int8_t cmdbuf[2]; 194 int a, error, sverror; 195 196 if ((sc = device_lookup(&maxrtc_cd, minor(dev))) == NULL) 197 return (ENXIO); 198 199 if (uio->uio_offset >= MAX6900_RAM_BYTES) 200 return (EINVAL); 201 202 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 203 return (error); 204 205 /* Start by clearing the control register's write-protect bit. */ 206 cmdbuf[0] = MAX6900_REG_CONTROL | MAX6900_CMD_WRITE; 207 cmdbuf[1] = 0; 208 209 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 210 cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) { 211 iic_release_bus(sc->sc_tag, 0); 212 printf("%s: maxrtc_write: failed to clear WP bit\n", 213 sc->sc_dev.dv_xname); 214 return (error); 215 } 216 217 while (uio->uio_resid && uio->uio_offset < MAX6900_RAM_BYTES) { 218 a = (int)uio->uio_offset; 219 220 cmdbuf[0] = MAX6900_REG_RAM(a) | MAX6900_CMD_WRITE; 221 if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0) 222 break; 223 224 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 225 cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) { 226 printf("%s: maxrtc_write: write failed at 0x%x\n", 227 sc->sc_dev.dv_xname, a); 228 break; 229 } 230 } 231 232 /* Set the write-protect bit again. */ 233 cmdbuf[0] = MAX6900_REG_CONTROL | MAX6900_CMD_WRITE; 234 cmdbuf[1] = MAX6900_CONTROL_WP; 235 236 sverror = error; 237 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 238 sc->sc_address, cmdbuf, 1, 239 &cmdbuf[1], 1, 0)) != 0) { 240 if (sverror != 0) 241 error = sverror; 242 printf("%s: maxrtc_write: failed to set WP bit\n", 243 sc->sc_dev.dv_xname); 244 } 245 246 iic_release_bus(sc->sc_tag, 0); 247 248 return (error); 249 } 250 251 static int 252 maxrtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv) 253 { 254 struct maxrtc_softc *sc = ch->cookie; 255 struct clock_ymdhms dt; 256 257 if (maxrtc_clock_read(sc, &dt) == 0) 258 return (-1); 259 260 tv->tv_sec = clock_ymdhms_to_secs(&dt); 261 tv->tv_usec = 0; 262 263 return (0); 264 } 265 266 static int 267 maxrtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv) 268 { 269 struct maxrtc_softc *sc = ch->cookie; 270 struct clock_ymdhms dt; 271 272 clock_secs_to_ymdhms(tv->tv_sec, &dt); 273 274 if (maxrtc_clock_write(sc, &dt) == 0) 275 return (-1); 276 277 return (0); 278 } 279 280 /* 281 * While the MAX6900 has a nice Clock Burst Read/Write command, 282 * we can't use it, since some I2C controllers do not support 283 * anything other than single-byte transfers. 284 */ 285 static int max6900_rtc_offset[] = { 286 MAX6900_REG_SECOND, 287 MAX6900_REG_MINUTE, 288 MAX6900_REG_HOUR, 289 MAX6900_REG_DATE, 290 MAX6900_REG_MONTH, 291 MAX6900_REG_DAY, 292 MAX6900_REG_YEAR, 293 MAX6900_REG_CENTURY, /* control, if burst */ 294 }; 295 296 static int 297 maxrtc_clock_read(struct maxrtc_softc *sc, struct clock_ymdhms *dt) 298 { 299 u_int8_t bcd[MAX6900_BURST_LEN], cmdbuf[1]; 300 int i; 301 302 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 303 printf("%s: maxrtc_clock_read: failed to acquire I2C bus\n", 304 sc->sc_dev.dv_xname); 305 return (0); 306 } 307 308 /* Read each timekeeping register in order. */ 309 for (i = 0; i < MAX6900_BURST_LEN; i++) { 310 cmdbuf[0] = max6900_rtc_offset[i] | MAX6900_CMD_READ; 311 312 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 313 sc->sc_address, cmdbuf, 1, 314 &bcd[i], 1, I2C_F_POLL)) { 315 iic_release_bus(sc->sc_tag, I2C_F_POLL); 316 printf("%s: maxrtc_clock_read: failed to read rtc " 317 "at 0x%x\n", sc->sc_dev.dv_xname, 318 max6900_rtc_offset[i]); 319 return (0); 320 } 321 } 322 323 /* Done with I2C */ 324 iic_release_bus(sc->sc_tag, I2C_F_POLL); 325 326 /* 327 * Convert the MAX6900's register values into something useable 328 */ 329 dt->dt_sec = FROMBCD(bcd[MAX6900_BURST_SECOND] & MAX6900_SECOND_MASK); 330 dt->dt_min = FROMBCD(bcd[MAX6900_BURST_MINUTE] & MAX6900_MINUTE_MASK); 331 332 if (bcd[MAX6900_BURST_HOUR] & MAX6900_HOUR_12HRS) { 333 dt->dt_hour = FROMBCD(bcd[MAX6900_BURST_HOUR] & 334 MAX6900_HOUR_12MASK); 335 if (bcd[MAX6900_BURST_HOUR] & MAX6900_HOUR_12HRS_PM) 336 dt->dt_hour += 12; 337 } else { 338 dt->dt_hour = FROMBCD(bcd[MAX6900_BURST_HOUR] & 339 MAX6900_HOUR_24MASK); 340 } 341 342 dt->dt_day = FROMBCD(bcd[MAX6900_BURST_DATE] & MAX6900_DATE_MASK); 343 dt->dt_mon = FROMBCD(bcd[MAX6900_BURST_MONTH] & MAX6900_MONTH_MASK); 344 dt->dt_year = FROMBCD(bcd[MAX6900_BURST_YEAR]); 345 /* century in the burst control slot */ 346 dt->dt_year += (int)FROMBCD(bcd[MAX6900_BURST_CONTROL]) * 100; 347 348 return (1); 349 } 350 351 static int 352 maxrtc_clock_write(struct maxrtc_softc *sc, struct clock_ymdhms *dt) 353 { 354 uint8_t bcd[MAX6900_BURST_LEN], cmdbuf[2]; 355 uint8_t init_seconds, final_seconds; 356 int i; 357 358 /* 359 * Convert our time representation into something the MAX6900 360 * can understand. 361 */ 362 bcd[MAX6900_BURST_SECOND] = TOBCD(dt->dt_sec); 363 bcd[MAX6900_BURST_MINUTE] = TOBCD(dt->dt_min); 364 bcd[MAX6900_BURST_HOUR] = TOBCD(dt->dt_hour) & MAX6900_HOUR_24MASK; 365 bcd[MAX6900_BURST_DATE] = TOBCD(dt->dt_day); 366 bcd[MAX6900_BURST_WDAY] = TOBCD(dt->dt_wday); 367 bcd[MAX6900_BURST_MONTH] = TOBCD(dt->dt_mon); 368 bcd[MAX6900_BURST_YEAR] = TOBCD(dt->dt_year % 100); 369 /* century in control slot */ 370 bcd[MAX6900_BURST_CONTROL] = TOBCD(dt->dt_year / 100); 371 372 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 373 printf("%s: maxrtc_clock_write: failed to acquire I2C bus\n", 374 sc->sc_dev.dv_xname); 375 return (0); 376 } 377 378 /* Start by clearing the control register's write-protect bit. */ 379 cmdbuf[0] = MAX6900_REG_CONTROL | MAX6900_CMD_WRITE; 380 cmdbuf[1] = 0; 381 382 if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 383 cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) { 384 iic_release_bus(sc->sc_tag, I2C_F_POLL); 385 printf("%s: maxrtc_clock_write: failed to clear WP bit\n", 386 sc->sc_dev.dv_xname); 387 return (0); 388 } 389 390 /* 391 * The MAX6900 RTC manual recommends ensuring "atomicity" of 392 * a non-burst write by: 393 * 394 * - writing SECONDS 395 * - reading back SECONDS, remembering it as "initial seconds" 396 * - write the remaing RTC registers 397 * - read back SECONDS as "final seconds" 398 * - if "initial seconds" == 59, ensure "final seconds" == 59 399 * - else, ensure "final seconds" is no more than one second 400 * beyond "initial seconds". 401 */ 402 again: 403 cmdbuf[0] = MAX6900_REG_SECOND | MAX6900_CMD_WRITE; 404 if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 405 cmdbuf, 1, &bcd[MAX6900_BURST_SECOND], 1, I2C_F_POLL)) { 406 iic_release_bus(sc->sc_tag, I2C_F_POLL); 407 printf("%s: maxrtc_clock_write: failed to write SECONDS\n", 408 sc->sc_dev.dv_xname); 409 return (0); 410 } 411 412 cmdbuf[0] = MAX6900_REG_SECOND | MAX6900_CMD_READ; 413 if (iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_address, 414 cmdbuf, 1, &init_seconds, 1, I2C_F_POLL)) { 415 iic_release_bus(sc->sc_tag, I2C_F_POLL); 416 printf("%s: maxrtc_clock_write: failed to read " 417 "INITIAL SECONDS\n", sc->sc_dev.dv_xname); 418 return (0); 419 } 420 421 for (i = 1; i < MAX6900_BURST_LEN; i++) { 422 cmdbuf[0] = max6900_rtc_offset[i] | MAX6900_CMD_WRITE; 423 if (iic_exec(sc->sc_tag, 424 i != MAX6900_BURST_LEN - 1 ? I2C_OP_WRITE : 425 I2C_OP_WRITE_WITH_STOP, sc->sc_address, 426 cmdbuf, 1, &bcd[i], 1, I2C_F_POLL)) { 427 iic_release_bus(sc->sc_tag, I2C_F_POLL); 428 printf("%s: maxrtc_clock_write: failed to write rtc " 429 " at 0x%x\n", sc->sc_dev.dv_xname, 430 max6900_rtc_offset[i]); 431 return (0); 432 } 433 } 434 435 cmdbuf[0] = MAX6900_REG_SECOND | MAX6900_CMD_READ; 436 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 437 cmdbuf, 1, &final_seconds, 1, I2C_F_POLL)) { 438 iic_release_bus(sc->sc_tag, I2C_F_POLL); 439 printf("%s: maxrtc_clock_write: failed to read " 440 "FINAL SECONDS\n", sc->sc_dev.dv_xname); 441 return (0); 442 } 443 444 if ((init_seconds == 59 && final_seconds != 59) || 445 (init_seconds != 59 && final_seconds != init_seconds + 1)) { 446 #if 1 447 printf("%s: maxrtc_clock_write: init %d, final %d, try again\n", 448 sc->sc_dev.dv_xname, init_seconds, final_seconds); 449 #endif 450 goto again; 451 } 452 453 /* Finish by setting the control register's write-protect bit. */ 454 cmdbuf[0] = MAX6900_REG_CONTROL | MAX6900_CMD_WRITE; 455 cmdbuf[1] = MAX6900_CONTROL_WP; 456 457 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 458 cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) { 459 iic_release_bus(sc->sc_tag, I2C_F_POLL); 460 printf("%s: maxrtc_clock_write: failed to set WP bit\n", 461 sc->sc_dev.dv_xname); 462 return (0); 463 } 464 465 iic_release_bus(sc->sc_tag, I2C_F_POLL); 466 467 return (1); 468 } 469
Indexes created Sat Oct 11 19:10:01 GMT 2025