max77620.c revision 1.3
1 /* $NetBSD: max77620.c,v 1.3 2018/06/16 21:22:13 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: max77620.c,v 1.3 2018/06/16 21:22:13 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/kmem.h> 39 #include <sys/gpio.h> 40 41 #include <dev/i2c/i2cvar.h> 42 43 #include <dev/fdt/fdtvar.h> 44 45 #define MAX_GPIO_REG(n) (0x36 + (n)) 46 #define MAX_GPIO_DEBOUNCE __BITS(7,6) 47 #define MAX_GPIO_INT __BITS(5,4) 48 #define MAX_GPIO_OUTPUT_VAL __BIT(3) 49 #define MAX_GPIO_INPUT_VAL __BIT(2) 50 #define MAX_GPIO_DIR __BIT(1) 51 #define MAX_GPIO_DRV __BIT(0) 52 53 #define MAX_GPIO_COUNT 8 54 55 struct max77620_softc { 56 device_t sc_dev; 57 i2c_tag_t sc_i2c; 58 i2c_addr_t sc_addr; 59 int sc_phandle; 60 }; 61 62 struct max77620_pin { 63 struct max77620_softc *pin_sc; 64 int pin_num; 65 int pin_flags; 66 bool pin_actlo; 67 }; 68 69 static const char * max77620_compats[] = { 70 "maxim,max77620", 71 NULL 72 }; 73 74 static uint8_t 75 max77620_read(struct max77620_softc *sc, uint8_t reg, int flags) 76 { 77 uint8_t val = 0; 78 int error; 79 80 error = iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr, 81 ®, 1, &val, 1, flags); 82 if (error != 0) 83 aprint_error_dev(sc->sc_dev, "error reading reg %#x: %d\n", reg, error); 84 85 return val; 86 } 87 88 static void 89 max77620_write(struct max77620_softc *sc, uint8_t reg, uint8_t val, int flags) 90 { 91 int error; 92 93 error = iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr, 94 ®, 1, &val, 1, flags); 95 if (error != 0) 96 aprint_error_dev(sc->sc_dev, "error writing reg %#x: %d\n", reg, error); 97 } 98 99 #define I2C_READ(sc, reg) max77620_read((sc), (reg), I2C_F_POLL) 100 #define I2C_WRITE(sc, reg, val) max77620_write((sc), (reg), (val), I2C_F_POLL) 101 #define I2C_LOCK(sc) iic_acquire_bus((sc)->sc_i2c, I2C_F_POLL) 102 #define I2C_UNLOCK(sc) iic_release_bus((sc)->sc_i2c, I2C_F_POLL) 103 104 static int 105 max77620_gpio_config(struct max77620_softc *sc, int pin, int flags) 106 { 107 uint32_t gpio; 108 109 KASSERT(pin >= 0 && pin < MAX_GPIO_COUNT); 110 111 gpio = I2C_READ(sc, MAX_GPIO_REG(pin)); 112 113 switch (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { 114 case GPIO_PIN_INPUT: 115 gpio |= MAX_GPIO_DIR; 116 break; 117 case GPIO_PIN_OUTPUT: 118 gpio &= ~MAX_GPIO_DIR; 119 break; 120 default: 121 return EINVAL; 122 } 123 124 switch (flags & (GPIO_PIN_PUSHPULL|GPIO_PIN_OPENDRAIN)) { 125 case GPIO_PIN_PUSHPULL: 126 gpio |= MAX_GPIO_DRV; 127 break; 128 case GPIO_PIN_OPENDRAIN: 129 gpio &= ~MAX_GPIO_DRV; 130 break; 131 default: 132 return EINVAL; 133 } 134 135 I2C_WRITE(sc, MAX_GPIO_REG(pin), gpio); 136 137 return 0; 138 } 139 140 static void * 141 max77620_gpio_acquire(device_t dev, const void *data, size_t len, int flags) 142 { 143 struct max77620_softc * const sc = device_private(dev); 144 struct max77620_pin *gpin; 145 const u_int *gpio = data; 146 int error; 147 148 if (len != 12) 149 return NULL; 150 151 const uint8_t pin = be32toh(gpio[1]) & 0xff; 152 const bool actlo = (be32toh(gpio[2]) & __BIT(0)) != 0; 153 const bool pushpull = (be32toh(gpio[2]) & __BIT(1)) == 0; 154 const bool opendrain = (be32toh(gpio[2]) & __BIT(2)) != 0; 155 156 if (pushpull) 157 flags |= GPIO_PIN_PUSHPULL; 158 if (opendrain) 159 flags |= GPIO_PIN_OPENDRAIN; 160 161 if (pin >= MAX_GPIO_COUNT) 162 return NULL; 163 164 I2C_LOCK(sc); 165 error = max77620_gpio_config(sc, pin, flags); 166 I2C_UNLOCK(sc); 167 168 if (error != 0) { 169 device_printf(dev, "bad pin %d config %#x\n", pin, flags); 170 return NULL; 171 } 172 173 gpin = kmem_zalloc(sizeof(*gpin), KM_SLEEP); 174 gpin->pin_sc = sc; 175 gpin->pin_num = pin; 176 gpin->pin_flags = flags; 177 gpin->pin_actlo = actlo; 178 179 return gpin; 180 } 181 182 static void 183 max77620_gpio_release(device_t dev, void *priv) 184 { 185 struct max77620_softc * const sc = device_private(dev); 186 struct max77620_pin *gpin = priv; 187 188 I2C_LOCK(sc); 189 max77620_gpio_config(sc, gpin->pin_num, GPIO_PIN_INPUT|GPIO_PIN_OPENDRAIN); 190 I2C_UNLOCK(sc); 191 192 kmem_free(gpin, sizeof(*gpin)); 193 } 194 195 static int 196 max77620_gpio_read(device_t dev, void *priv, bool raw) 197 { 198 struct max77620_softc * const sc = device_private(dev); 199 struct max77620_pin *gpin = priv; 200 uint8_t gpio; 201 int val; 202 203 I2C_LOCK(sc); 204 gpio = I2C_READ(sc, MAX_GPIO_REG(gpin->pin_num)); 205 I2C_UNLOCK(sc); 206 207 val = __SHIFTOUT(gpio, MAX_GPIO_INPUT_VAL); 208 if (!raw && gpin->pin_actlo) 209 val = !val; 210 211 #ifdef MAX77620_DEBUG 212 device_printf(sc->sc_dev, "GPIO%d rd %02x (%d %d)\n", 213 gpin->pin_num, gpio, 214 (int)__SHIFTOUT(gpio, MAX_GPIO_INPUT_VAL), val); 215 #endif 216 217 return val; 218 } 219 220 static void 221 max77620_gpio_write(device_t dev, void *priv, int val, bool raw) 222 { 223 struct max77620_softc * const sc = device_private(dev); 224 struct max77620_pin *gpin = priv; 225 uint8_t gpio; 226 227 if (!raw && gpin->pin_actlo) 228 val = !val; 229 230 I2C_LOCK(sc); 231 gpio = I2C_READ(sc, MAX_GPIO_REG(gpin->pin_num)); 232 gpio &= ~MAX_GPIO_OUTPUT_VAL; 233 gpio |= __SHIFTIN(val, MAX_GPIO_OUTPUT_VAL); 234 #ifdef MAX77620_DEBUG 235 device_printf(sc->sc_dev, "GPIO%d wr %02x -> %02x\n", 236 gpin->pin_num, 237 I2C_READ(sc, MAX_GPIO_REG(gpin->pin_num)), gpio); 238 #endif 239 I2C_WRITE(sc, MAX_GPIO_REG(gpin->pin_num), gpio); 240 I2C_UNLOCK(sc); 241 } 242 243 static struct fdtbus_gpio_controller_func max77620_gpio_funcs = { 244 .acquire = max77620_gpio_acquire, 245 .release = max77620_gpio_release, 246 .read = max77620_gpio_read, 247 .write = max77620_gpio_write, 248 }; 249 250 static void 251 max77620_gpio_attach(struct max77620_softc *sc) 252 { 253 fdtbus_register_gpio_controller(sc->sc_dev, sc->sc_phandle, 254 &max77620_gpio_funcs); 255 } 256 257 static int 258 max77620_match(device_t parent, cfdata_t match, void *aux) 259 { 260 struct i2c_attach_args *ia = aux; 261 int match_result; 262 263 if (iic_use_direct_match(ia, match, max77620_compats, match_result)) 264 return match_result; 265 266 return 0; 267 } 268 269 static void 270 max77620_attach(device_t parent, device_t self, void *aux) 271 { 272 struct max77620_softc * const sc = device_private(self); 273 struct i2c_attach_args *ia = aux; 274 275 sc->sc_dev = self; 276 sc->sc_i2c = ia->ia_tag; 277 sc->sc_addr = ia->ia_addr; 278 sc->sc_phandle = ia->ia_cookie; 279 280 aprint_naive("\n"); 281 aprint_normal(": MAX77620 Power Management IC\n"); 282 283 max77620_gpio_attach(sc); 284 } 285 286 CFATTACH_DECL_NEW(max77620pmic, sizeof(struct max77620_softc), 287 max77620_match, max77620_attach, NULL, NULL); 288
Indexes created Tue Sep 30 06:09:59 GMT 2025