motoi2c.c revision 1.5
1 /* $NetBSD: motoi2c.c,v 1.5 2019/08/05 12:21:00 hkenken Exp $ */ 2 3 /*- 4 * Copyright (c) 2007, 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: motoi2c.c,v 1.5 2019/08/05 12:21:00 hkenken Exp $"); 34 35 #if defined(__arm__) || defined(__aarch64__) 36 #include "opt_fdt.h" 37 #endif 38 39 #include <sys/param.h> 40 #include <sys/device.h> 41 #include <sys/systm.h> 42 #include <sys/mutex.h> 43 #include <sys/bus.h> 44 #include <sys/intr.h> 45 46 #include <dev/i2c/i2cvar.h> 47 #include <dev/i2c/motoi2creg.h> 48 #include <dev/i2c/motoi2cvar.h> 49 50 #ifdef FDT 51 #include <dev/fdt/fdtvar.h> 52 #endif 53 54 #ifdef DEBUG 55 int motoi2c_debug = 0; 56 #define DPRINTF(x) if (motoi2c_debug) printf x 57 #else 58 #define DPRINTF(x) 59 #endif 60 61 #ifdef FDT 62 static i2c_tag_t 63 motoi2c_get_tag(device_t dev) 64 { 65 struct motoi2c_softc * const sc = device_private(dev); 66 67 return &sc->sc_i2c; 68 } 69 70 static const struct fdtbus_i2c_controller_func motoi2c_funcs = { 71 .get_tag = motoi2c_get_tag, 72 }; 73 #endif 74 75 static int motoi2c_acquire_bus(void *, int); 76 static void motoi2c_release_bus(void *, int); 77 static int motoi2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 78 void *, size_t, int); 79 static int motoi2c_busy_wait(struct motoi2c_softc *, uint8_t); 80 81 static const struct i2c_controller motoi2c = { 82 .ic_acquire_bus = motoi2c_acquire_bus, 83 .ic_release_bus = motoi2c_release_bus, 84 .ic_exec = motoi2c_exec, 85 }; 86 87 static const struct motoi2c_settings motoi2c_default_settings = { 88 .i2c_adr = MOTOI2C_ADR_DEFAULT, 89 .i2c_fdr = MOTOI2C_FDR_DEFAULT, 90 .i2c_dfsrr = MOTOI2C_DFSRR_DEFAULT, 91 }; 92 93 #define I2C_READ(r) ((*sc->sc_iord)(sc, (r))) 94 #define I2C_WRITE(r,v) ((*sc->sc_iowr)(sc, (r), (v))) 95 #define I2C_SETCLR(r, s, c) \ 96 ((*sc->sc_iowr)(sc, (r), ((*sc->sc_iord)(sc, (r)) | (s)) & ~(c))) 97 98 static uint8_t 99 motoi2c_iord1(struct motoi2c_softc *sc, bus_size_t off) 100 { 101 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, off); 102 } 103 104 static void 105 motoi2c_iowr1(struct motoi2c_softc *sc, bus_size_t off, uint8_t data) 106 { 107 bus_space_write_1(sc->sc_iot, sc->sc_ioh, off, data); 108 } 109 110 void 111 motoi2c_attach_common(device_t self, struct motoi2c_softc *sc, 112 const struct motoi2c_settings *i2c) 113 { 114 struct i2cbus_attach_args iba; 115 116 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 117 118 if (i2c == NULL) 119 i2c = &motoi2c_default_settings; 120 121 sc->sc_i2c = motoi2c; 122 sc->sc_i2c.ic_cookie = sc; 123 if (sc->sc_iord == NULL) 124 sc->sc_iord = motoi2c_iord1; 125 if (sc->sc_iowr == NULL) 126 sc->sc_iowr = motoi2c_iowr1; 127 memset(&iba, 0, sizeof(iba)); 128 iba.iba_tag = &sc->sc_i2c; 129 130 I2C_WRITE(I2CCR, 0); /* reset before changing anything */ 131 I2C_WRITE(I2CDFSRR, i2c->i2c_dfsrr); /* sampling units */ 132 I2C_WRITE(I2CFDR, i2c->i2c_fdr); /* divider 3072 (0x31) */ 133 I2C_WRITE(I2CADR, i2c->i2c_adr); /* our slave address is 0x7f */ 134 I2C_WRITE(I2CSR, 0); /* clear status flags */ 135 136 #ifdef FDT 137 KASSERT(sc->sc_phandle != 0); 138 fdtbus_register_i2c_controller(self, sc->sc_phandle, &motoi2c_funcs); 139 140 fdtbus_attach_i2cbus(self, sc->sc_phandle, &sc->sc_i2c, iicbus_print); 141 #else 142 config_found_ia(self, "i2cbus", &iba, iicbus_print); 143 #endif 144 } 145 146 static int 147 motoi2c_acquire_bus(void *v, int flags) 148 { 149 struct motoi2c_softc * const sc = v; 150 151 mutex_enter(&sc->sc_buslock); 152 I2C_WRITE(I2CCR, CR_MEN); /* enable the I2C module */ 153 154 return 0; 155 } 156 157 static void 158 motoi2c_release_bus(void *v, int flags) 159 { 160 struct motoi2c_softc * const sc = v; 161 162 I2C_WRITE(I2CCR, 0); /* reset before changing anything */ 163 mutex_exit(&sc->sc_buslock); 164 } 165 166 /* busy waiting for byte data transfer completion */ 167 static int 168 motoi2c_busy_wait(struct motoi2c_softc *sc, uint8_t cr) 169 { 170 uint8_t sr; 171 u_int timo; 172 int error = 0; 173 174 timo = 1000; 175 while (((sr = I2C_READ(I2CSR)) & SR_MIF) == 0 && --timo) 176 DELAY(10); 177 178 if (timo == 0) { 179 DPRINTF(("%s: timeout (sr=%#x, cr=%#x)\n", 180 __func__, sr, I2C_READ(I2CCR))); 181 error = ETIMEDOUT; 182 } 183 /* 184 * RXAK is only valid when transmitting. 185 */ 186 if ((cr & CR_MTX) && (sr & SR_RXAK)) { 187 DPRINTF(("%s: missing rx ack (%#x): spin=%u\n", 188 __func__, sr, 1000 - timo)); 189 error = EIO; 190 } 191 I2C_WRITE(I2CSR, 0); 192 return error; 193 } 194 195 int 196 motoi2c_intr(void *v) 197 { 198 struct motoi2c_softc * const sc = v; 199 200 panic("%s(%p)", __func__, sc); 201 202 return 0; 203 } 204 205 int 206 motoi2c_exec(void *v, i2c_op_t op, i2c_addr_t addr, 207 const void *cmdbuf, size_t cmdlen, 208 void *databuf, size_t datalen, 209 int flags) 210 { 211 struct motoi2c_softc * const sc = v; 212 uint8_t sr; 213 uint8_t cr; 214 int error; 215 216 sr = I2C_READ(I2CSR); 217 cr = I2C_READ(I2CCR); 218 219 #if 0 220 DPRINTF(("%s(%#x,%#x,%p,%zu,%p,%zu,%#x): sr=%#x cr=%#x\n", 221 __func__, op, addr, cmdbuf, cmdlen, databuf, datalen, flags, 222 sr, cr)); 223 #endif 224 225 if ((cr & CR_MSTA) == 0 && (sr & SR_MBB) != 0) { 226 /* wait for bus becoming available */ 227 u_int timo = 100; 228 do { 229 DELAY(10); 230 } while (--timo > 0 && ((sr = I2C_READ(I2CSR)) & SR_MBB) != 0); 231 232 if (timo == 0) { 233 DPRINTF(("%s: bus is busy (%#x)\n", __func__, sr)); 234 return ETIMEDOUT; 235 } 236 } 237 238 /* reset interrupt and arbitration-lost flags (all others are RO) */ 239 I2C_WRITE(I2CSR, 0); 240 sr = I2C_READ(I2CSR); 241 242 /* 243 * Generate start (or restart) condition 244 */ 245 /* CR_RTSA is write-only and transitory */ 246 uint8_t rsta = (cr & CR_MSTA ? CR_RSTA : 0); 247 cr = CR_MEN | CR_MTX | CR_MSTA; 248 I2C_WRITE(I2CCR, cr | rsta); 249 250 DPRINTF(("%s: started: sr=%#x cr=%#x/%#x\n", 251 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 252 253 sr = I2C_READ(I2CSR); 254 if (sr & SR_MAL) { 255 DPRINTF(("%s: lost bus: sr=%#x cr=%#x/%#x\n", 256 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 257 I2C_WRITE(I2CCR, 0); 258 DELAY(10); 259 I2C_WRITE(I2CCR, CR_MEN | CR_MTX | CR_MSTA); 260 DELAY(10); 261 sr = I2C_READ(I2CSR); 262 if (sr & SR_MAL) { 263 error = EBUSY; 264 goto out; 265 } 266 DPRINTF(("%s: reacquired bus: sr=%#x cr=%#x/%#x\n", 267 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 268 } 269 270 /* send target address and transfer direction */ 271 uint8_t addr_byte = (addr << 1) 272 | (cmdlen == 0 && I2C_OP_READ_P(op) ? 1 : 0); 273 I2C_WRITE(I2CDR, addr_byte); 274 275 error = motoi2c_busy_wait(sc, cr); 276 if (error) { 277 DPRINTF(("%s: error sending address: %d\n", __func__, error)); 278 if (error == EIO) 279 error = ENXIO; 280 goto out; 281 } 282 283 const uint8_t *cmdptr = cmdbuf; 284 for (size_t i = 0; i < cmdlen; i++) { 285 I2C_WRITE(I2CDR, *cmdptr++); 286 287 error = motoi2c_busy_wait(sc, cr); 288 if (error) { 289 DPRINTF(("%s: error sending cmd byte %zu (cr=%#x/%#x):" 290 " %d\n", __func__, i, I2C_READ(I2CCR), cr, error)); 291 goto out; 292 } 293 } 294 295 if (cmdlen > 0 && I2C_OP_READ_P(op)) { 296 KASSERT(cr & CR_MTX); 297 KASSERT((cr & CR_TXAK) == 0); 298 I2C_WRITE(I2CCR, cr | CR_RSTA); 299 #if 0 300 DPRINTF(("%s: restarted(read): sr=%#x cr=%#x(%#x)\n", 301 __func__, I2C_READ(I2CSR), cr | CR_RSTA, I2C_READ(I2CCR))); 302 #endif 303 304 /* send target address and read transfer direction */ 305 addr_byte |= 1; 306 I2C_WRITE(I2CDR, addr_byte); 307 308 error = motoi2c_busy_wait(sc, cr); 309 if (error) { 310 if (error == EIO) 311 error = ENXIO; 312 goto out; 313 } 314 } 315 316 if (I2C_OP_READ_P(op)) { 317 uint8_t *dataptr = databuf; 318 cr &= ~CR_MTX; /* clear transmit flags */ 319 if (datalen <= 1) 320 cr |= CR_TXAK; 321 I2C_WRITE(I2CCR, cr); 322 DELAY(10); 323 (void)I2C_READ(I2CDR); /* dummy read */ 324 for (size_t i = 0; i < datalen; i++) { 325 /* 326 * If a master receiver wants to terminate a data 327 * transfer, it must inform the slave transmitter by 328 * not acknowledging the last byte of data (by setting 329 * the transmit acknowledge bit (I2CCR[TXAK])) before 330 * reading the next-to-last byte of data. 331 */ 332 error = motoi2c_busy_wait(sc, cr); 333 if (error) { 334 DPRINTF(("%s: error reading byte %zu: %d\n", 335 __func__, i, error)); 336 goto out; 337 } 338 if (i == datalen - 2) { 339 cr |= CR_TXAK; 340 I2C_WRITE(I2CCR, cr); 341 } else if (i == datalen - 1 && I2C_OP_STOP_P(op)) { 342 cr = CR_MEN; 343 I2C_WRITE(I2CCR, cr); 344 } 345 *dataptr++ = I2C_READ(I2CDR); 346 } 347 if (datalen == 0) { 348 if (I2C_OP_STOP_P(op)) { 349 cr = CR_MEN; 350 I2C_WRITE(I2CCR, cr); 351 } 352 (void)I2C_READ(I2CDR); /* dummy read */ 353 error = motoi2c_busy_wait(sc, cr); 354 if (error) { 355 DPRINTF(("%s: error reading dummy last byte:" 356 "%d\n", __func__, error)); 357 goto out; 358 } 359 } 360 } else { 361 const uint8_t *dataptr = databuf; 362 for (size_t i = 0; i < datalen; i++) { 363 I2C_WRITE(I2CDR, *dataptr++); 364 error = motoi2c_busy_wait(sc, cr); 365 if (error) { 366 DPRINTF(("%s: error sending data byte %zu:" 367 " %d\n", __func__, i, error)); 368 goto out; 369 } 370 } 371 } 372 373 out: 374 /* 375 * If we encountered an error condition or caller wants a STOP, 376 * send a STOP. 377 */ 378 if (error || (cr & CR_TXAK) || ((cr & CR_MSTA) && I2C_OP_STOP_P(op))) { 379 cr = CR_MEN; 380 I2C_WRITE(I2CCR, cr); 381 DPRINTF(("%s: stopping: cr=%#x/%#x\n", __func__, 382 cr, I2C_READ(I2CCR))); 383 } 384 385 DPRINTF(("%s: exit sr=%#x cr=%#x: %d\n", __func__, 386 I2C_READ(I2CSR), I2C_READ(I2CCR), error)); 387 388 return error; 389 } 390
Indexes created Thu Sep 25 08:09:54 GMT 2025