motoi2c.c revision 1.7
1 /* $NetBSD: motoi2c.c,v 1.7 2019/12/22 23:23:32 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2007, 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: motoi2c.c,v 1.7 2019/12/22 23:23:32 thorpej Exp $"); 34 35 #if defined(__arm__) || defined(__aarch64__) 36 #include "opt_fdt.h" 37 #endif 38 39 #include <sys/param.h> 40 #include <sys/device.h> 41 #include <sys/systm.h> 42 #include <sys/mutex.h> 43 #include <sys/bus.h> 44 #include <sys/intr.h> 45 46 #include <dev/i2c/i2cvar.h> 47 #include <dev/i2c/motoi2creg.h> 48 #include <dev/i2c/motoi2cvar.h> 49 50 #ifdef FDT 51 #include <dev/fdt/fdtvar.h> 52 #endif 53 54 #ifdef DEBUG 55 int motoi2c_debug = 0; 56 #define DPRINTF(x) if (motoi2c_debug) printf x 57 #else 58 #define DPRINTF(x) 59 #endif 60 61 #ifdef FDT 62 static i2c_tag_t 63 motoi2c_get_tag(device_t dev) 64 { 65 struct motoi2c_softc * const sc = device_private(dev); 66 67 return &sc->sc_i2c; 68 } 69 70 static const struct fdtbus_i2c_controller_func motoi2c_funcs = { 71 .get_tag = motoi2c_get_tag, 72 }; 73 #endif 74 75 static int motoi2c_acquire_bus(void *, int); 76 static void motoi2c_release_bus(void *, int); 77 static int motoi2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 78 void *, size_t, int); 79 static int motoi2c_busy_wait(struct motoi2c_softc *, uint8_t); 80 81 static const struct motoi2c_settings motoi2c_default_settings = { 82 .i2c_adr = MOTOI2C_ADR_DEFAULT, 83 .i2c_fdr = MOTOI2C_FDR_DEFAULT, 84 .i2c_dfsrr = MOTOI2C_DFSRR_DEFAULT, 85 }; 86 87 #define I2C_READ(r) ((*sc->sc_iord)(sc, (r))) 88 #define I2C_WRITE(r,v) ((*sc->sc_iowr)(sc, (r), (v))) 89 #define I2C_SETCLR(r, s, c) \ 90 ((*sc->sc_iowr)(sc, (r), ((*sc->sc_iord)(sc, (r)) | (s)) & ~(c))) 91 92 static uint8_t 93 motoi2c_iord1(struct motoi2c_softc *sc, bus_size_t off) 94 { 95 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, off); 96 } 97 98 static void 99 motoi2c_iowr1(struct motoi2c_softc *sc, bus_size_t off, uint8_t data) 100 { 101 bus_space_write_1(sc->sc_iot, sc->sc_ioh, off, data); 102 } 103 104 void 105 motoi2c_attach_common(device_t self, struct motoi2c_softc *sc, 106 const struct motoi2c_settings *i2c) 107 { 108 struct i2cbus_attach_args iba; 109 110 if (i2c == NULL) 111 i2c = &motoi2c_default_settings; 112 113 iic_tag_init(&sc->sc_i2c); 114 sc->sc_i2c.ic_cookie = sc; 115 sc->sc_i2c.ic_acquire_bus = motoi2c_acquire_bus; 116 sc->sc_i2c.ic_release_bus = motoi2c_release_bus; 117 sc->sc_i2c.ic_exec = motoi2c_exec; 118 if (sc->sc_iord == NULL) 119 sc->sc_iord = motoi2c_iord1; 120 if (sc->sc_iowr == NULL) 121 sc->sc_iowr = motoi2c_iowr1; 122 memset(&iba, 0, sizeof(iba)); 123 iba.iba_tag = &sc->sc_i2c; 124 125 I2C_WRITE(I2CCR, 0); /* reset before changing anything */ 126 I2C_WRITE(I2CDFSRR, i2c->i2c_dfsrr); /* sampling units */ 127 I2C_WRITE(I2CFDR, i2c->i2c_fdr); /* divider 3072 (0x31) */ 128 I2C_WRITE(I2CADR, i2c->i2c_adr); /* our slave address is 0x7f */ 129 I2C_WRITE(I2CSR, 0); /* clear status flags */ 130 131 #ifdef FDT 132 KASSERT(sc->sc_phandle != 0); 133 fdtbus_register_i2c_controller(self, sc->sc_phandle, &motoi2c_funcs); 134 135 fdtbus_attach_i2cbus(self, sc->sc_phandle, &sc->sc_i2c, iicbus_print); 136 #else 137 config_found_ia(self, "i2cbus", &iba, iicbus_print); 138 #endif 139 } 140 141 static int 142 motoi2c_acquire_bus(void *v, int flags) 143 { 144 struct motoi2c_softc * const sc = v; 145 146 I2C_WRITE(I2CCR, CR_MEN); /* enable the I2C module */ 147 148 return 0; 149 } 150 151 static void 152 motoi2c_release_bus(void *v, int flags) 153 { 154 struct motoi2c_softc * const sc = v; 155 156 I2C_WRITE(I2CCR, 0); /* reset before changing anything */ 157 } 158 159 static int 160 motoi2c_stop_wait(struct motoi2c_softc *sc) 161 { 162 u_int timo; 163 int error = 0; 164 165 timo = 1000; 166 while ((I2C_READ(I2CSR) & SR_MBB) != 0 && --timo) 167 DELAY(1); 168 169 if (timo == 0) { 170 DPRINTF(("%s: timeout (sr=%#x)\n", __func__, I2C_READ(I2CSR))); 171 error = ETIMEDOUT; 172 } 173 174 return error; 175 } 176 177 /* busy waiting for byte data transfer completion */ 178 static int 179 motoi2c_busy_wait(struct motoi2c_softc *sc, uint8_t cr) 180 { 181 uint8_t sr; 182 u_int timo; 183 int error = 0; 184 185 timo = 1000; 186 while (((sr = I2C_READ(I2CSR)) & SR_MIF) == 0 && --timo) 187 DELAY(10); 188 189 if (timo == 0) { 190 DPRINTF(("%s: timeout (sr=%#x, cr=%#x)\n", 191 __func__, sr, I2C_READ(I2CCR))); 192 error = ETIMEDOUT; 193 } 194 /* 195 * RXAK is only valid when transmitting. 196 */ 197 if ((cr & CR_MTX) && (sr & SR_RXAK)) { 198 DPRINTF(("%s: missing rx ack (%#x): spin=%u\n", 199 __func__, sr, 1000 - timo)); 200 error = EIO; 201 } 202 I2C_WRITE(I2CSR, 0); 203 return error; 204 } 205 206 int 207 motoi2c_intr(void *v) 208 { 209 struct motoi2c_softc * const sc = v; 210 211 panic("%s(%p)", __func__, sc); 212 213 return 0; 214 } 215 216 int 217 motoi2c_exec(void *v, i2c_op_t op, i2c_addr_t addr, 218 const void *cmdbuf, size_t cmdlen, 219 void *databuf, size_t datalen, 220 int flags) 221 { 222 struct motoi2c_softc * const sc = v; 223 uint8_t sr; 224 uint8_t cr; 225 int error; 226 227 sr = I2C_READ(I2CSR); 228 cr = I2C_READ(I2CCR); 229 230 #if 0 231 DPRINTF(("%s(%#x,%#x,%p,%zu,%p,%zu,%#x): sr=%#x cr=%#x\n", 232 __func__, op, addr, cmdbuf, cmdlen, databuf, datalen, flags, 233 sr, cr)); 234 #endif 235 236 if ((cr & CR_MSTA) == 0 && (sr & SR_MBB) != 0) { 237 /* wait for bus becoming available */ 238 error = motoi2c_stop_wait(sc); 239 if (error) 240 return ETIMEDOUT; 241 } 242 243 /* reset interrupt and arbitration-lost flags (all others are RO) */ 244 I2C_WRITE(I2CSR, 0); 245 sr = I2C_READ(I2CSR); 246 247 /* 248 * Generate start condition 249 */ 250 cr = CR_MEN | CR_MTX | CR_MSTA; 251 I2C_WRITE(I2CCR, cr); 252 253 DPRINTF(("%s: started: sr=%#x cr=%#x/%#x\n", 254 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 255 256 sr = I2C_READ(I2CSR); 257 if (sr & SR_MAL) { 258 DPRINTF(("%s: lost bus: sr=%#x cr=%#x/%#x\n", 259 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 260 I2C_WRITE(I2CCR, 0); 261 DELAY(10); 262 I2C_WRITE(I2CCR, CR_MEN | CR_MTX | CR_MSTA); 263 DELAY(10); 264 sr = I2C_READ(I2CSR); 265 if (sr & SR_MAL) { 266 error = EBUSY; 267 goto out; 268 } 269 DPRINTF(("%s: reacquired bus: sr=%#x cr=%#x/%#x\n", 270 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 271 } 272 273 /* send target address and transfer direction */ 274 uint8_t addr_byte = (addr << 1) 275 | (cmdlen == 0 && I2C_OP_READ_P(op) ? 1 : 0); 276 I2C_WRITE(I2CDR, addr_byte); 277 278 error = motoi2c_busy_wait(sc, cr); 279 if (error) { 280 DPRINTF(("%s: error sending address: %d\n", __func__, error)); 281 if (error == EIO) 282 error = ENXIO; 283 goto out; 284 } 285 286 const uint8_t *cmdptr = cmdbuf; 287 for (size_t i = 0; i < cmdlen; i++) { 288 I2C_WRITE(I2CDR, *cmdptr++); 289 290 error = motoi2c_busy_wait(sc, cr); 291 if (error) { 292 DPRINTF(("%s: error sending cmd byte %zu (cr=%#x/%#x):" 293 " %d\n", __func__, i, I2C_READ(I2CCR), cr, error)); 294 goto out; 295 } 296 } 297 298 if (cmdlen > 0 && I2C_OP_READ_P(op)) { 299 KASSERT(cr & CR_MTX); 300 KASSERT((cr & CR_TXAK) == 0); 301 I2C_WRITE(I2CCR, cr | CR_RSTA); 302 #if 0 303 DPRINTF(("%s: restarted(read): sr=%#x cr=%#x(%#x)\n", 304 __func__, I2C_READ(I2CSR), cr | CR_RSTA, I2C_READ(I2CCR))); 305 #endif 306 307 /* send target address and read transfer direction */ 308 addr_byte |= 1; 309 I2C_WRITE(I2CDR, addr_byte); 310 311 error = motoi2c_busy_wait(sc, cr); 312 if (error) { 313 if (error == EIO) 314 error = ENXIO; 315 goto out; 316 } 317 } 318 319 if (I2C_OP_READ_P(op)) { 320 uint8_t *dataptr = databuf; 321 cr &= ~CR_MTX; /* clear transmit flags */ 322 if (datalen <= 1) 323 cr |= CR_TXAK; 324 I2C_WRITE(I2CCR, cr); 325 DELAY(10); 326 (void)I2C_READ(I2CDR); /* dummy read */ 327 for (size_t i = 0; i < datalen; i++) { 328 /* 329 * If a master receiver wants to terminate a data 330 * transfer, it must inform the slave transmitter by 331 * not acknowledging the last byte of data (by setting 332 * the transmit acknowledge bit (I2CCR[TXAK])) before 333 * reading the next-to-last byte of data. 334 */ 335 error = motoi2c_busy_wait(sc, cr); 336 if (error) { 337 DPRINTF(("%s: error reading byte %zu: %d\n", 338 __func__, i, error)); 339 goto out; 340 } 341 if (i == datalen - 2) { 342 cr |= CR_TXAK; 343 I2C_WRITE(I2CCR, cr); 344 } else if (i == datalen - 1 && I2C_OP_STOP_P(op)) { 345 cr = CR_MEN | CR_TXAK; 346 I2C_WRITE(I2CCR, cr); 347 } 348 *dataptr++ = I2C_READ(I2CDR); 349 } 350 if (datalen == 0) { 351 if (I2C_OP_STOP_P(op)) { 352 cr = CR_MEN | CR_TXAK; 353 I2C_WRITE(I2CCR, cr); 354 } 355 (void)I2C_READ(I2CDR); /* dummy read */ 356 error = motoi2c_busy_wait(sc, cr); 357 if (error) { 358 DPRINTF(("%s: error reading dummy last byte:" 359 "%d\n", __func__, error)); 360 goto out; 361 } 362 } 363 } else { 364 const uint8_t *dataptr = databuf; 365 for (size_t i = 0; i < datalen; i++) { 366 I2C_WRITE(I2CDR, *dataptr++); 367 error = motoi2c_busy_wait(sc, cr); 368 if (error) { 369 DPRINTF(("%s: error sending data byte %zu:" 370 " %d\n", __func__, i, error)); 371 goto out; 372 } 373 } 374 } 375 376 out: 377 /* 378 * If we encountered an error condition or caller wants a STOP, 379 * send a STOP. 380 */ 381 if (error || (cr & CR_TXAK) || ((cr & CR_MSTA) && I2C_OP_STOP_P(op))) { 382 cr = CR_MEN; 383 I2C_WRITE(I2CCR, cr); 384 motoi2c_stop_wait(sc); 385 DPRINTF(("%s: stopping: cr=%#x/%#x\n", __func__, 386 cr, I2C_READ(I2CCR))); 387 } 388 389 DPRINTF(("%s: exit sr=%#x cr=%#x: %d\n", __func__, 390 I2C_READ(I2CSR), I2C_READ(I2CCR), error)); 391 392 return error; 393 } 394
Indexes created Tue Sep 23 07:09:52 GMT 2025