motoi2c.c revision 1.9
1 /* $NetBSD: motoi2c.c,v 1.9 2021/01/24 18:01:13 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2007, 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: motoi2c.c,v 1.9 2021/01/24 18:01:13 jmcneill Exp $"); 34 35 #if defined(__arm__) || defined(__aarch64__) 36 #include "opt_fdt.h" 37 #endif 38 39 #include <sys/param.h> 40 #include <sys/device.h> 41 #include <sys/systm.h> 42 #include <sys/mutex.h> 43 #include <sys/bus.h> 44 #include <sys/intr.h> 45 46 #include <dev/i2c/i2cvar.h> 47 #include <dev/i2c/motoi2creg.h> 48 #include <dev/i2c/motoi2cvar.h> 49 50 #ifdef FDT 51 #include <dev/fdt/fdtvar.h> 52 #endif 53 54 #ifdef DEBUG 55 int motoi2c_debug = 0; 56 #define DPRINTF(x) if (motoi2c_debug) printf x 57 #else 58 #define DPRINTF(x) 59 #endif 60 61 static int motoi2c_acquire_bus(void *, int); 62 static void motoi2c_release_bus(void *, int); 63 static int motoi2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 64 void *, size_t, int); 65 static int motoi2c_busy_wait(struct motoi2c_softc *, uint8_t); 66 67 static const struct motoi2c_settings motoi2c_default_settings = { 68 .i2c_adr = MOTOI2C_ADR_DEFAULT, 69 .i2c_fdr = MOTOI2C_FDR_DEFAULT, 70 .i2c_dfsrr = MOTOI2C_DFSRR_DEFAULT, 71 }; 72 73 #define I2C_READ(r) ((*sc->sc_iord)(sc, (r))) 74 #define I2C_WRITE(r,v) ((*sc->sc_iowr)(sc, (r), (v))) 75 #define I2C_SETCLR(r, s, c) \ 76 ((*sc->sc_iowr)(sc, (r), ((*sc->sc_iord)(sc, (r)) | (s)) & ~(c))) 77 78 static uint8_t 79 motoi2c_iord1(struct motoi2c_softc *sc, bus_size_t off) 80 { 81 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, off); 82 } 83 84 static void 85 motoi2c_iowr1(struct motoi2c_softc *sc, bus_size_t off, uint8_t data) 86 { 87 bus_space_write_1(sc->sc_iot, sc->sc_ioh, off, data); 88 } 89 90 void 91 motoi2c_attach_common(device_t self, struct motoi2c_softc *sc, 92 const struct motoi2c_settings *i2c) 93 { 94 struct i2cbus_attach_args iba; 95 96 if (i2c == NULL) 97 i2c = &motoi2c_default_settings; 98 99 iic_tag_init(&sc->sc_i2c); 100 sc->sc_i2c.ic_cookie = sc; 101 sc->sc_i2c.ic_acquire_bus = motoi2c_acquire_bus; 102 sc->sc_i2c.ic_release_bus = motoi2c_release_bus; 103 sc->sc_i2c.ic_exec = motoi2c_exec; 104 if (sc->sc_iord == NULL) 105 sc->sc_iord = motoi2c_iord1; 106 if (sc->sc_iowr == NULL) 107 sc->sc_iowr = motoi2c_iowr1; 108 memset(&iba, 0, sizeof(iba)); 109 iba.iba_tag = &sc->sc_i2c; 110 iba.iba_child_devices = sc->sc_child_devices; 111 112 I2C_WRITE(I2CCR, 0); /* reset before changing anything */ 113 I2C_WRITE(I2CDFSRR, i2c->i2c_dfsrr); /* sampling units */ 114 I2C_WRITE(I2CFDR, i2c->i2c_fdr); /* divider 3072 (0x31) */ 115 I2C_WRITE(I2CADR, i2c->i2c_adr); /* our slave address is 0x7f */ 116 I2C_WRITE(I2CSR, 0); /* clear status flags */ 117 118 #ifdef FDT 119 if (sc->sc_phandle != 0) { 120 fdtbus_register_i2c_controller(&sc->sc_i2c, sc->sc_phandle); 121 fdtbus_attach_i2cbus(self, sc->sc_phandle, &sc->sc_i2c, 122 iicbus_print); 123 } else 124 #endif 125 config_found_ia(self, "i2cbus", &iba, iicbus_print); 126 } 127 128 static int 129 motoi2c_acquire_bus(void *v, int flags) 130 { 131 struct motoi2c_softc * const sc = v; 132 133 I2C_WRITE(I2CCR, CR_MEN); /* enable the I2C module */ 134 135 return 0; 136 } 137 138 static void 139 motoi2c_release_bus(void *v, int flags) 140 { 141 struct motoi2c_softc * const sc = v; 142 143 I2C_WRITE(I2CCR, 0); /* reset before changing anything */ 144 } 145 146 static int 147 motoi2c_stop_wait(struct motoi2c_softc *sc) 148 { 149 u_int timo; 150 int error = 0; 151 152 timo = 1000; 153 while ((I2C_READ(I2CSR) & SR_MBB) != 0 && --timo) 154 DELAY(1); 155 156 if (timo == 0) { 157 DPRINTF(("%s: timeout (sr=%#x)\n", __func__, I2C_READ(I2CSR))); 158 error = ETIMEDOUT; 159 } 160 161 return error; 162 } 163 164 /* busy waiting for byte data transfer completion */ 165 static int 166 motoi2c_busy_wait(struct motoi2c_softc *sc, uint8_t cr) 167 { 168 uint8_t sr; 169 u_int timo; 170 int error = 0; 171 172 timo = 1000; 173 while (((sr = I2C_READ(I2CSR)) & SR_MIF) == 0 && --timo) 174 DELAY(10); 175 176 if (timo == 0) { 177 DPRINTF(("%s: timeout (sr=%#x, cr=%#x)\n", 178 __func__, sr, I2C_READ(I2CCR))); 179 error = ETIMEDOUT; 180 } 181 /* 182 * RXAK is only valid when transmitting. 183 */ 184 if ((cr & CR_MTX) && (sr & SR_RXAK)) { 185 DPRINTF(("%s: missing rx ack (%#x): spin=%u\n", 186 __func__, sr, 1000 - timo)); 187 error = EIO; 188 } 189 I2C_WRITE(I2CSR, 0); 190 return error; 191 } 192 193 int 194 motoi2c_intr(void *v) 195 { 196 struct motoi2c_softc * const sc = v; 197 198 panic("%s(%p)", __func__, sc); 199 200 return 0; 201 } 202 203 int 204 motoi2c_exec(void *v, i2c_op_t op, i2c_addr_t addr, 205 const void *cmdbuf, size_t cmdlen, 206 void *databuf, size_t datalen, 207 int flags) 208 { 209 struct motoi2c_softc * const sc = v; 210 uint8_t sr; 211 uint8_t cr; 212 int error; 213 214 sr = I2C_READ(I2CSR); 215 cr = I2C_READ(I2CCR); 216 217 #if 0 218 DPRINTF(("%s(%#x,%#x,%p,%zu,%p,%zu,%#x): sr=%#x cr=%#x\n", 219 __func__, op, addr, cmdbuf, cmdlen, databuf, datalen, flags, 220 sr, cr)); 221 #endif 222 223 if ((cr & CR_MSTA) == 0 && (sr & SR_MBB) != 0) { 224 /* wait for bus becoming available */ 225 error = motoi2c_stop_wait(sc); 226 if (error) 227 return ETIMEDOUT; 228 } 229 230 /* reset interrupt and arbitration-lost flags (all others are RO) */ 231 I2C_WRITE(I2CSR, 0); 232 sr = I2C_READ(I2CSR); 233 234 /* 235 * Generate start condition 236 */ 237 cr = CR_MEN | CR_MTX | CR_MSTA; 238 I2C_WRITE(I2CCR, cr); 239 240 DPRINTF(("%s: started: sr=%#x cr=%#x/%#x\n", 241 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 242 243 sr = I2C_READ(I2CSR); 244 if (sr & SR_MAL) { 245 DPRINTF(("%s: lost bus: sr=%#x cr=%#x/%#x\n", 246 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 247 I2C_WRITE(I2CCR, 0); 248 DELAY(10); 249 I2C_WRITE(I2CCR, CR_MEN | CR_MTX | CR_MSTA); 250 DELAY(10); 251 sr = I2C_READ(I2CSR); 252 if (sr & SR_MAL) { 253 error = EBUSY; 254 goto out; 255 } 256 DPRINTF(("%s: reacquired bus: sr=%#x cr=%#x/%#x\n", 257 __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR))); 258 } 259 260 /* send target address and transfer direction */ 261 uint8_t addr_byte = (addr << 1) 262 | (cmdlen == 0 && I2C_OP_READ_P(op) ? 1 : 0); 263 I2C_WRITE(I2CDR, addr_byte); 264 265 error = motoi2c_busy_wait(sc, cr); 266 if (error) { 267 DPRINTF(("%s: error sending address: %d\n", __func__, error)); 268 if (error == EIO) 269 error = ENXIO; 270 goto out; 271 } 272 273 const uint8_t *cmdptr = cmdbuf; 274 for (size_t i = 0; i < cmdlen; i++) { 275 I2C_WRITE(I2CDR, *cmdptr++); 276 277 error = motoi2c_busy_wait(sc, cr); 278 if (error) { 279 DPRINTF(("%s: error sending cmd byte %zu (cr=%#x/%#x):" 280 " %d\n", __func__, i, I2C_READ(I2CCR), cr, error)); 281 goto out; 282 } 283 } 284 285 if (cmdlen > 0 && I2C_OP_READ_P(op)) { 286 KASSERT(cr & CR_MTX); 287 KASSERT((cr & CR_TXAK) == 0); 288 I2C_WRITE(I2CCR, cr | CR_RSTA); 289 #if 0 290 DPRINTF(("%s: restarted(read): sr=%#x cr=%#x(%#x)\n", 291 __func__, I2C_READ(I2CSR), cr | CR_RSTA, I2C_READ(I2CCR))); 292 #endif 293 294 /* send target address and read transfer direction */ 295 addr_byte |= 1; 296 I2C_WRITE(I2CDR, addr_byte); 297 298 error = motoi2c_busy_wait(sc, cr); 299 if (error) { 300 if (error == EIO) 301 error = ENXIO; 302 goto out; 303 } 304 } 305 306 if (I2C_OP_READ_P(op)) { 307 uint8_t *dataptr = databuf; 308 cr &= ~CR_MTX; /* clear transmit flags */ 309 if (datalen <= 1) 310 cr |= CR_TXAK; 311 I2C_WRITE(I2CCR, cr); 312 DELAY(10); 313 (void)I2C_READ(I2CDR); /* dummy read */ 314 for (size_t i = 0; i < datalen; i++) { 315 /* 316 * If a master receiver wants to terminate a data 317 * transfer, it must inform the slave transmitter by 318 * not acknowledging the last byte of data (by setting 319 * the transmit acknowledge bit (I2CCR[TXAK])) before 320 * reading the next-to-last byte of data. 321 */ 322 error = motoi2c_busy_wait(sc, cr); 323 if (error) { 324 DPRINTF(("%s: error reading byte %zu: %d\n", 325 __func__, i, error)); 326 goto out; 327 } 328 if (i == datalen - 2) { 329 cr |= CR_TXAK; 330 I2C_WRITE(I2CCR, cr); 331 } else if (i == datalen - 1 && I2C_OP_STOP_P(op)) { 332 cr = CR_MEN | CR_TXAK; 333 I2C_WRITE(I2CCR, cr); 334 } 335 *dataptr++ = I2C_READ(I2CDR); 336 } 337 if (datalen == 0) { 338 if (I2C_OP_STOP_P(op)) { 339 cr = CR_MEN | CR_TXAK; 340 I2C_WRITE(I2CCR, cr); 341 } 342 (void)I2C_READ(I2CDR); /* dummy read */ 343 error = motoi2c_busy_wait(sc, cr); 344 if (error) { 345 DPRINTF(("%s: error reading dummy last byte:" 346 "%d\n", __func__, error)); 347 goto out; 348 } 349 } 350 } else { 351 const uint8_t *dataptr = databuf; 352 for (size_t i = 0; i < datalen; i++) { 353 I2C_WRITE(I2CDR, *dataptr++); 354 error = motoi2c_busy_wait(sc, cr); 355 if (error) { 356 DPRINTF(("%s: error sending data byte %zu:" 357 " %d\n", __func__, i, error)); 358 goto out; 359 } 360 } 361 } 362 363 out: 364 /* 365 * If we encountered an error condition or caller wants a STOP, 366 * send a STOP. 367 */ 368 if (error || (cr & CR_TXAK) || ((cr & CR_MSTA) && I2C_OP_STOP_P(op))) { 369 cr = CR_MEN; 370 I2C_WRITE(I2CCR, cr); 371 motoi2c_stop_wait(sc); 372 DPRINTF(("%s: stopping: cr=%#x/%#x\n", __func__, 373 cr, I2C_READ(I2CCR))); 374 } 375 376 DPRINTF(("%s: exit sr=%#x cr=%#x: %d\n", __func__, 377 I2C_READ(I2CSR), I2C_READ(I2CCR), error)); 378 379 return error; 380 } 381
Indexes created Tue Sep 23 23:09:58 GMT 2025