pcf8583.c revision 1.14
1 /* $NetBSD: pcf8583.c,v 1.14 2014/03/16 05:20:27 dholland Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Driver for the Philips PCF8583 Real Time Clock. 40 * 41 * This driver is partially derived from Ben Harris's PCF8583 driver 42 * for NetBSD/acorn26. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: pcf8583.c,v 1.14 2014/03/16 05:20:27 dholland Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/device.h> 51 #include <sys/kernel.h> 52 #include <sys/fcntl.h> 53 #include <sys/uio.h> 54 #include <sys/conf.h> 55 #include <sys/event.h> 56 57 #include <dev/clock_subr.h> 58 59 #include <dev/i2c/i2cvar.h> 60 #include <dev/i2c/pcf8583reg.h> 61 #include <dev/i2c/pcf8583var.h> 62 63 struct pcfrtc_softc { 64 device_t sc_dev; 65 i2c_tag_t sc_tag; 66 int sc_address; 67 int sc_open; 68 struct todr_chip_handle sc_todr; 69 }; 70 71 static int pcfrtc_match(device_t, cfdata_t, void *); 72 static void pcfrtc_attach(device_t, device_t, void *); 73 74 CFATTACH_DECL_NEW(pcfrtc, sizeof(struct pcfrtc_softc), 75 pcfrtc_match, pcfrtc_attach, NULL, NULL); 76 extern struct cfdriver pcfrtc_cd; 77 78 dev_type_open(pcfrtc_open); 79 dev_type_close(pcfrtc_close); 80 dev_type_read(pcfrtc_read); 81 dev_type_write(pcfrtc_write); 82 83 const struct cdevsw pcfrtc_cdevsw = { 84 .d_open = pcfrtc_open, 85 .d_close = pcfrtc_close, 86 .d_read = pcfrtc_read, 87 .d_write = pcfrtc_write, 88 .d_ioctl = noioctl, 89 .d_stop = nostop, 90 .d_tty = notty, 91 .d_poll = nopoll, 92 .d_mmap = nommap, 93 .d_kqfilter = nokqfilter, 94 .d_flag = D_OTHER 95 }; 96 97 static int pcfrtc_clock_read(struct pcfrtc_softc *, struct clock_ymdhms *, 98 uint8_t *); 99 static int pcfrtc_clock_write(struct pcfrtc_softc *, struct clock_ymdhms *, 100 uint8_t); 101 static int pcfrtc_gettime(struct todr_chip_handle *, struct timeval *); 102 static int pcfrtc_settime(struct todr_chip_handle *, struct timeval *); 103 104 int 105 pcfrtc_match(device_t parent, cfdata_t cf, void *aux) 106 { 107 struct i2c_attach_args *ia = aux; 108 109 if ((ia->ia_addr & PCF8583_ADDRMASK) == PCF8583_ADDR) 110 return (1); 111 112 return (0); 113 } 114 115 void 116 pcfrtc_attach(device_t parent, device_t self, void *aux) 117 { 118 struct pcfrtc_softc *sc = device_private(self); 119 struct i2c_attach_args *ia = aux; 120 uint8_t cmdbuf[1], csr; 121 122 sc->sc_tag = ia->ia_tag; 123 sc->sc_address = ia->ia_addr; 124 sc->sc_dev = self; 125 126 aprint_naive(": Real-time Clock/NVRAM\n"); 127 aprint_normal(": PCF8583 Real-time Clock/NVRAM\n"); 128 129 cmdbuf[0] = PCF8583_REG_CSR; 130 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 131 cmdbuf, 1, &csr, 1, 0) != 0) { 132 aprint_error_dev(self, "unable to read CSR\n"); 133 return; 134 } 135 aprint_normal_dev(sc->sc_dev, ""); 136 switch (csr & PCF8583_CSR_FN_MASK) { 137 case PCF8583_CSR_FN_32768HZ: 138 aprint_normal(" 32.768 kHz clock"); 139 break; 140 141 case PCF8583_CSR_FN_50HZ: 142 aprint_normal(" 50 Hz clock"); 143 break; 144 145 case PCF8583_CSR_FN_EVENT: 146 aprint_normal(" event counter"); 147 break; 148 149 case PCF8583_CSR_FN_TEST: 150 aprint_normal(" test mode"); 151 break; 152 } 153 if (csr & PCF8583_CSR_STOP) 154 aprint_normal(", stopped"); 155 if (csr & PCF8583_CSR_ALARMENABLE) 156 aprint_normal(", alarm enabled"); 157 aprint_normal("\n"); 158 159 sc->sc_open = 0; 160 161 sc->sc_todr.cookie = sc; 162 sc->sc_todr.todr_gettime = pcfrtc_gettime; 163 sc->sc_todr.todr_settime = pcfrtc_settime; 164 sc->sc_todr.todr_setwen = NULL; 165 166 todr_attach(&sc->sc_todr); 167 } 168 169 /*ARGSUSED*/ 170 int 171 pcfrtc_open(dev_t dev, int flag, int fmt, struct lwp *l) 172 { 173 struct pcfrtc_softc *sc; 174 175 if ((sc = device_lookup_private(&pcfrtc_cd, minor(dev))) == NULL) 176 return (ENXIO); 177 178 /* XXX: Locking */ 179 180 if (sc->sc_open) 181 return (EBUSY); 182 183 sc->sc_open = 1; 184 return (0); 185 } 186 187 /*ARGSUSED*/ 188 int 189 pcfrtc_close(dev_t dev, int flag, int fmt, struct lwp *l) 190 { 191 struct pcfrtc_softc *sc; 192 193 if ((sc = device_lookup_private(&pcfrtc_cd, minor(dev))) == NULL) 194 return (ENXIO); 195 196 sc->sc_open = 0; 197 return (0); 198 } 199 200 /*ARGSUSED*/ 201 int 202 pcfrtc_read(dev_t dev, struct uio *uio, int flags) 203 { 204 struct pcfrtc_softc *sc; 205 u_int8_t ch, cmdbuf[1]; 206 int a, error; 207 208 if ((sc = device_lookup_private(&pcfrtc_cd, minor(dev))) == NULL) 209 return (ENXIO); 210 211 if (uio->uio_offset >= PCF8583_NVRAM_SIZE) 212 return (EINVAL); 213 214 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 215 return (error); 216 217 while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) { 218 a = (int)uio->uio_offset; 219 cmdbuf[0] = a + PCF8583_NVRAM_START; 220 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 221 sc->sc_address, cmdbuf, 1, 222 &ch, 1, 0)) != 0) { 223 iic_release_bus(sc->sc_tag, 0); 224 aprint_error_dev(sc->sc_dev, 225 "pcfrtc_read: read failed at 0x%x\n", a); 226 return (error); 227 } 228 if ((error = uiomove(&ch, 1, uio)) != 0) { 229 iic_release_bus(sc->sc_tag, 0); 230 return (error); 231 } 232 } 233 234 iic_release_bus(sc->sc_tag, 0); 235 236 return (0); 237 } 238 239 /*ARGSUSED*/ 240 int 241 pcfrtc_write(dev_t dev, struct uio *uio, int flags) 242 { 243 struct pcfrtc_softc *sc; 244 u_int8_t cmdbuf[2]; 245 int a, error; 246 247 if ((sc = device_lookup_private(&pcfrtc_cd, minor(dev))) == NULL) 248 return (ENXIO); 249 250 if (uio->uio_offset >= PCF8583_NVRAM_SIZE) 251 return (EINVAL); 252 253 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 254 return (error); 255 256 while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) { 257 a = (int)uio->uio_offset; 258 cmdbuf[0] = a + PCF8583_NVRAM_START; 259 if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0) 260 break; 261 262 if ((error = iic_exec(sc->sc_tag, 263 uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP, 264 sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) { 265 aprint_error_dev(sc->sc_dev, 266 "pcfrtc_write: write failed at 0x%x\n", a); 267 return (error); 268 } 269 } 270 271 iic_release_bus(sc->sc_tag, 0); 272 273 return (error); 274 } 275 276 static int 277 pcfrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv) 278 { 279 struct pcfrtc_softc *sc = ch->cookie; 280 struct clock_ymdhms dt; 281 int err; 282 uint8_t centi; 283 284 if ((err = pcfrtc_clock_read(sc, &dt, ¢i))) 285 return err; 286 287 tv->tv_sec = clock_ymdhms_to_secs(&dt); 288 tv->tv_usec = centi * 10000; 289 290 return (0); 291 } 292 293 static int 294 pcfrtc_settime(struct todr_chip_handle *ch, struct timeval *tv) 295 { 296 struct pcfrtc_softc *sc = ch->cookie; 297 struct clock_ymdhms dt; 298 int err; 299 300 clock_secs_to_ymdhms(tv->tv_sec, &dt); 301 302 if ((err = pcfrtc_clock_write(sc, &dt, tv->tv_usec / 10000)) != 0) 303 return err; 304 305 return (0); 306 } 307 308 static const int pcf8583_rtc_offset[] = { 309 PCF8583_REG_CSR, 310 PCF8583_REG_CENTI, 311 PCF8583_REG_SEC, 312 PCF8583_REG_MIN, 313 PCF8583_REG_HOUR, 314 PCF8583_REG_YEARDATE, 315 PCF8583_REG_WKDYMON, 316 PCF8583_REG_TIMER, 317 0xc0, /* NVRAM -- year stored here */ 318 0xc1, /* NVRAM -- century stored here */ 319 }; 320 321 static int 322 pcfrtc_clock_read(struct pcfrtc_softc *sc, struct clock_ymdhms *dt, 323 uint8_t *centi) 324 { 325 u_int8_t bcd[10], cmdbuf[1]; 326 int i, err; 327 328 if ((err = iic_acquire_bus(sc->sc_tag, I2C_F_POLL))) { 329 aprint_error_dev(sc->sc_dev, 330 "pcfrtc_clock_read: failed to acquire I2C bus\n"); 331 return err; 332 } 333 334 /* Read each timekeeping register in order. */ 335 for (i = 0; i < 10; i++) { 336 cmdbuf[0] = pcf8583_rtc_offset[i]; 337 338 if ((err = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 339 sc->sc_address, cmdbuf, 1, 340 &bcd[i], 1, I2C_F_POLL))) { 341 iic_release_bus(sc->sc_tag, I2C_F_POLL); 342 aprint_error_dev(sc->sc_dev, 343 "pcfrtc_clock_read: failed to read rtc " 344 "at 0x%x\n", 345 pcf8583_rtc_offset[i]); 346 return err; 347 } 348 } 349 350 /* Done with I2C */ 351 iic_release_bus(sc->sc_tag, I2C_F_POLL); 352 353 /* 354 * Convert the PCF8583's register values into something useable 355 */ 356 *centi = FROMBCD(bcd[PCF8583_REG_CENTI]); 357 dt->dt_sec = FROMBCD(bcd[PCF8583_REG_SEC]); 358 dt->dt_min = FROMBCD(bcd[PCF8583_REG_MIN]); 359 dt->dt_hour = FROMBCD(bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_MASK); 360 if (bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_12H) { 361 dt->dt_hour %= 12; /* 12AM -> 0, 12PM -> 12 */ 362 if (bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_PM) 363 dt->dt_hour += 12; 364 } 365 366 dt->dt_day = FROMBCD(bcd[PCF8583_REG_YEARDATE] & PCF8583_DATE_MASK); 367 dt->dt_mon = FROMBCD(bcd[PCF8583_REG_WKDYMON] & PCF8583_MON_MASK); 368 369 dt->dt_year = bcd[8] + (bcd[9] * 100); 370 /* Try to notice if the year's rolled over. */ 371 if (bcd[PCF8583_REG_CSR] & PCF8583_CSR_MASK) 372 aprint_error_dev(sc->sc_dev, 373 "cannot check year in mask mode\n"); 374 else { 375 while (dt->dt_year % 4 != 376 (bcd[PCF8583_REG_YEARDATE] & 377 PCF8583_YEAR_MASK) >> PCF8583_YEAR_SHIFT) 378 dt->dt_year++; 379 } 380 381 return 0; 382 } 383 384 static int 385 pcfrtc_clock_write(struct pcfrtc_softc *sc, struct clock_ymdhms *dt, 386 uint8_t centi) 387 { 388 uint8_t bcd[10], cmdbuf[2]; 389 int i, err; 390 391 /* 392 * Convert our time representation into something the PCF8583 393 * can understand. 394 */ 395 bcd[PCF8583_REG_CENTI] = centi; 396 bcd[PCF8583_REG_SEC] = TOBCD(dt->dt_sec); 397 bcd[PCF8583_REG_MIN] = TOBCD(dt->dt_min); 398 bcd[PCF8583_REG_HOUR] = TOBCD(dt->dt_hour) & PCF8583_HOUR_MASK; 399 bcd[PCF8583_REG_YEARDATE] = TOBCD(dt->dt_day) | 400 ((dt->dt_year % 4) << PCF8583_YEAR_SHIFT); 401 bcd[PCF8583_REG_WKDYMON] = TOBCD(dt->dt_mon) | 402 ((dt->dt_wday % 4) << PCF8583_WKDY_SHIFT); 403 bcd[8] = dt->dt_year % 100; 404 bcd[9] = dt->dt_year / 100; 405 406 if ((err = iic_acquire_bus(sc->sc_tag, I2C_F_POLL))) { 407 aprint_error_dev(sc->sc_dev, 408 "pcfrtc_clock_write: failed to acquire I2C bus\n"); 409 return err; 410 } 411 412 for (i = 1; i < 10; i++) { 413 cmdbuf[0] = pcf8583_rtc_offset[i]; 414 if ((err = iic_exec(sc->sc_tag, 415 i != 9 ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP, 416 sc->sc_address, cmdbuf, 1, 417 &bcd[i], 1, I2C_F_POLL))) { 418 iic_release_bus(sc->sc_tag, I2C_F_POLL); 419 aprint_error_dev(sc->sc_dev, 420 "pcfrtc_clock_write: failed to write rtc " 421 " at 0x%x\n", 422 pcf8583_rtc_offset[i]); 423 return err; 424 } 425 } 426 427 iic_release_bus(sc->sc_tag, I2C_F_POLL); 428 429 return 0; 430 } 431 432 int 433 pcfrtc_bootstrap_read(i2c_tag_t tag, int i2caddr, int offset, 434 u_int8_t *rvp, size_t len) 435 { 436 u_int8_t cmdbuf[1]; 437 438 /* 439 * NOTE: "offset" is an absolute offset into the PCF8583 440 * address space, not relative to the NVRAM. 441 */ 442 443 if (len == 0) 444 return (0); 445 446 if (iic_acquire_bus(tag, I2C_F_POLL) != 0) 447 return (-1); 448 449 while (len) { 450 /* Read a single byte. */ 451 cmdbuf[0] = offset; 452 if (iic_exec(tag, I2C_OP_READ_WITH_STOP, i2caddr, 453 cmdbuf, 1, rvp, 1, I2C_F_POLL)) { 454 iic_release_bus(tag, I2C_F_POLL); 455 return (-1); 456 } 457 458 len--; 459 rvp++; 460 offset++; 461 } 462 463 iic_release_bus(tag, I2C_F_POLL); 464 return (0); 465 } 466 467 int 468 pcfrtc_bootstrap_write(i2c_tag_t tag, int i2caddr, int offset, 469 u_int8_t *rvp, size_t len) 470 { 471 u_int8_t cmdbuf[1]; 472 473 /* 474 * NOTE: "offset" is an absolute offset into the PCF8583 475 * address space, not relative to the NVRAM. 476 */ 477 478 if (len == 0) 479 return (0); 480 481 if (iic_acquire_bus(tag, I2C_F_POLL) != 0) 482 return (-1); 483 484 while (len) { 485 /* Write a single byte. */ 486 cmdbuf[0] = offset; 487 if (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, i2caddr, 488 cmdbuf, 1, rvp, 1, I2C_F_POLL)) { 489 iic_release_bus(tag, I2C_F_POLL); 490 return (-1); 491 } 492 493 len--; 494 rvp++; 495 offset++; 496 } 497 498 iic_release_bus(tag, I2C_F_POLL); 499 return (0); 500 } 501
Indexes created Tue Sep 23 20:09:58 GMT 2025