pcf8583.c revision 1.5
1 /* $NetBSD: pcf8583.c,v 1.5 2006/08/23 21:21:34 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Driver for the Philips PCF8583 Real Time Clock. 40 * 41 * This driver is partially derived from Ben Harris's PCF8583 driver 42 * for NetBSD/acorn26. 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 #include <sys/kernel.h> 49 #include <sys/fcntl.h> 50 #include <sys/uio.h> 51 #include <sys/conf.h> 52 #include <sys/event.h> 53 54 #include <dev/clock_subr.h> 55 56 #include <dev/i2c/i2cvar.h> 57 #include <dev/i2c/pcf8583reg.h> 58 #include <dev/i2c/pcf8583var.h> 59 60 struct pcfrtc_softc { 61 struct device sc_dev; 62 i2c_tag_t sc_tag; 63 int sc_address; 64 int sc_open; 65 struct todr_chip_handle sc_todr; 66 }; 67 68 static int pcfrtc_match(struct device *, struct cfdata *, void *); 69 static void pcfrtc_attach(struct device *, struct device *, void *); 70 71 CFATTACH_DECL(pcfrtc, sizeof(struct pcfrtc_softc), 72 pcfrtc_match, pcfrtc_attach, NULL, NULL); 73 extern struct cfdriver pcfrtc_cd; 74 75 dev_type_open(pcfrtc_open); 76 dev_type_close(pcfrtc_close); 77 dev_type_read(pcfrtc_read); 78 dev_type_write(pcfrtc_write); 79 80 const struct cdevsw pcfrtc_cdevsw = { 81 pcfrtc_open, pcfrtc_close, pcfrtc_read, pcfrtc_write, noioctl, 82 nostop, notty, nopoll, nommap, nokqfilter 83 }; 84 85 static int pcfrtc_clock_read(struct pcfrtc_softc *, struct clock_ymdhms *, 86 uint8_t *); 87 static int pcfrtc_clock_write(struct pcfrtc_softc *, struct clock_ymdhms *, 88 uint8_t); 89 static int pcfrtc_gettime(struct todr_chip_handle *, volatile struct timeval *); 90 static int pcfrtc_settime(struct todr_chip_handle *, volatile struct timeval *); 91 static int pcfrtc_getcal(struct todr_chip_handle *, int *); 92 static int pcfrtc_setcal(struct todr_chip_handle *, int); 93 94 int 95 pcfrtc_match(struct device *parent, struct cfdata *cf, void *aux) 96 { 97 struct i2c_attach_args *ia = aux; 98 99 if ((ia->ia_addr & PCF8583_ADDRMASK) == PCF8583_ADDR) 100 return (1); 101 102 return (0); 103 } 104 105 void 106 pcfrtc_attach(struct device *parent, struct device *self, void *aux) 107 { 108 struct pcfrtc_softc *sc = device_private(self); 109 struct i2c_attach_args *ia = aux; 110 uint8_t cmdbuf[1], csr; 111 112 sc->sc_tag = ia->ia_tag; 113 sc->sc_address = ia->ia_addr; 114 115 aprint_naive(": Real-time Clock/NVRAM\n"); 116 aprint_normal(": PCF8583 Real-time Clock/NVRAM\n"); 117 118 cmdbuf[0] = PCF8583_REG_CSR; 119 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 120 cmdbuf, 1, &csr, 1, 0) != 0) { 121 aprint_error("%s: unable to read CSR\n", sc->sc_dev.dv_xname); 122 return; 123 } 124 aprint_normal("%s: ", sc->sc_dev.dv_xname); 125 switch (csr & PCF8583_CSR_FN_MASK) { 126 case PCF8583_CSR_FN_32768HZ: 127 aprint_normal(" 32.768 kHz clock"); 128 break; 129 130 case PCF8583_CSR_FN_50HZ: 131 aprint_normal(" 50 Hz clock"); 132 break; 133 134 case PCF8583_CSR_FN_EVENT: 135 aprint_normal(" event counter"); 136 break; 137 138 case PCF8583_CSR_FN_TEST: 139 aprint_normal(" test mode"); 140 break; 141 } 142 if (csr & PCF8583_CSR_STOP) 143 aprint_normal(", stopped"); 144 if (csr & PCF8583_CSR_ALARMENABLE) 145 aprint_normal(", alarm enabled"); 146 aprint_normal("\n"); 147 148 sc->sc_open = 0; 149 150 sc->sc_todr.cookie = sc; 151 sc->sc_todr.todr_gettime = pcfrtc_gettime; 152 sc->sc_todr.todr_settime = pcfrtc_settime; 153 sc->sc_todr.todr_getcal = pcfrtc_getcal; 154 sc->sc_todr.todr_setcal = pcfrtc_setcal; 155 sc->sc_todr.todr_setwen = NULL; 156 157 todr_attach(&sc->sc_todr); 158 } 159 160 /*ARGSUSED*/ 161 int 162 pcfrtc_open(dev_t dev, int flag, int fmt, struct lwp *l) 163 { 164 struct pcfrtc_softc *sc; 165 166 if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL) 167 return (ENXIO); 168 169 /* XXX: Locking */ 170 171 if (sc->sc_open) 172 return (EBUSY); 173 174 sc->sc_open = 1; 175 return (0); 176 } 177 178 /*ARGSUSED*/ 179 int 180 pcfrtc_close(dev_t dev, int flag, int fmt, struct lwp *l) 181 { 182 struct pcfrtc_softc *sc; 183 184 if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL) 185 return (ENXIO); 186 187 sc->sc_open = 0; 188 return (0); 189 } 190 191 /*ARGSUSED*/ 192 int 193 pcfrtc_read(dev_t dev, struct uio *uio, int flags) 194 { 195 struct pcfrtc_softc *sc; 196 u_int8_t ch, cmdbuf[1]; 197 int a, error; 198 199 if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL) 200 return (ENXIO); 201 202 if (uio->uio_offset >= PCF8583_NVRAM_SIZE) 203 return (EINVAL); 204 205 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 206 return (error); 207 208 while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) { 209 a = (int)uio->uio_offset; 210 cmdbuf[0] = a + PCF8583_NVRAM_START; 211 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 212 sc->sc_address, cmdbuf, 1, 213 &ch, 1, 0)) != 0) { 214 iic_release_bus(sc->sc_tag, 0); 215 printf("%s: pcfrtc_read: read failed at 0x%x\n", 216 sc->sc_dev.dv_xname, a); 217 return (error); 218 } 219 if ((error = uiomove(&ch, 1, uio)) != 0) { 220 iic_release_bus(sc->sc_tag, 0); 221 return (error); 222 } 223 } 224 225 iic_release_bus(sc->sc_tag, 0); 226 227 return (0); 228 } 229 230 /*ARGSUSED*/ 231 int 232 pcfrtc_write(dev_t dev, struct uio *uio, int flags) 233 { 234 struct pcfrtc_softc *sc; 235 u_int8_t cmdbuf[2]; 236 int a, error; 237 238 if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL) 239 return (ENXIO); 240 241 if (uio->uio_offset >= PCF8583_NVRAM_SIZE) 242 return (EINVAL); 243 244 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 245 return (error); 246 247 while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) { 248 a = (int)uio->uio_offset; 249 cmdbuf[0] = a + PCF8583_NVRAM_START; 250 if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0) 251 break; 252 253 if ((error = iic_exec(sc->sc_tag, 254 uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP, 255 sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) { 256 printf("%s: pcfrtc_write: write failed at 0x%x\n", 257 sc->sc_dev.dv_xname, a); 258 return (error); 259 } 260 } 261 262 iic_release_bus(sc->sc_tag, 0); 263 264 return (error); 265 } 266 267 static int 268 pcfrtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv) 269 { 270 struct pcfrtc_softc *sc = ch->cookie; 271 struct clock_ymdhms dt; 272 int err; 273 uint8_t centi; 274 275 if ((err = pcfrtc_clock_read(sc, &dt, ¢i))) 276 return err; 277 278 tv->tv_sec = clock_ymdhms_to_secs(&dt); 279 tv->tv_usec = centi * 10000; 280 281 return (0); 282 } 283 284 static int 285 pcfrtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv) 286 { 287 struct pcfrtc_softc *sc = ch->cookie; 288 struct clock_ymdhms dt; 289 int err; 290 291 clock_secs_to_ymdhms(tv->tv_sec, &dt); 292 293 if ((err = pcfrtc_clock_write(sc, &dt, tv->tv_usec / 10000) == 0)) 294 return err; 295 296 return (0); 297 } 298 299 static int 300 pcfrtc_setcal(struct todr_chip_handle *ch, int cal) 301 { 302 303 return (EOPNOTSUPP); 304 } 305 306 static int 307 pcfrtc_getcal(struct todr_chip_handle *ch, int *cal) 308 { 309 310 return (EOPNOTSUPP); 311 } 312 313 static const int pcf8583_rtc_offset[] = { 314 PCF8583_REG_CSR, 315 PCF8583_REG_CENTI, 316 PCF8583_REG_SEC, 317 PCF8583_REG_MIN, 318 PCF8583_REG_HOUR, 319 PCF8583_REG_YEARDATE, 320 PCF8583_REG_WKDYMON, 321 PCF8583_REG_TIMER, 322 0xc0, /* NVRAM -- year stored here */ 323 0xc1, /* NVRAM -- century stored here */ 324 }; 325 326 static int 327 pcfrtc_clock_read(struct pcfrtc_softc *sc, struct clock_ymdhms *dt, 328 uint8_t *centi) 329 { 330 u_int8_t bcd[10], cmdbuf[1]; 331 int i, err; 332 333 if ((err = iic_acquire_bus(sc->sc_tag, I2C_F_POLL))) { 334 printf("%s: pcfrtc_clock_read: failed to acquire I2C bus\n", 335 sc->sc_dev.dv_xname); 336 return err; 337 } 338 339 /* Read each timekeeping register in order. */ 340 for (i = 0; i < 10; i++) { 341 cmdbuf[0] = pcf8583_rtc_offset[i]; 342 343 if ((err = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 344 sc->sc_address, cmdbuf, 1, 345 &bcd[i], 1, I2C_F_POLL))) { 346 iic_release_bus(sc->sc_tag, I2C_F_POLL); 347 printf("%s: pcfrtc_clock_read: failed to read rtc " 348 "at 0x%x\n", sc->sc_dev.dv_xname, 349 pcf8583_rtc_offset[i]); 350 return err; 351 } 352 } 353 354 /* Done with I2C */ 355 iic_release_bus(sc->sc_tag, I2C_F_POLL); 356 357 /* 358 * Convert the PCF8583's register values into something useable 359 */ 360 *centi = FROMBCD(bcd[PCF8583_REG_CENTI]); 361 dt->dt_sec = FROMBCD(bcd[PCF8583_REG_SEC]); 362 dt->dt_min = FROMBCD(bcd[PCF8583_REG_MIN]); 363 dt->dt_hour = FROMBCD(bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_MASK); 364 if (bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_12H) { 365 dt->dt_hour %= 12; /* 12AM -> 0, 12PM -> 12 */ 366 if (bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_PM) 367 dt->dt_hour += 12; 368 } 369 370 dt->dt_day = FROMBCD(bcd[PCF8583_REG_YEARDATE] & PCF8583_DATE_MASK); 371 dt->dt_mon = FROMBCD(bcd[PCF8583_REG_WKDYMON] & PCF8583_MON_MASK); 372 373 dt->dt_year = bcd[8] + (bcd[9] * 100); 374 /* Try to notice if the year's rolled over. */ 375 if (bcd[PCF8583_REG_CSR] & PCF8583_CSR_MASK) 376 printf("%s: cannot check year in mask mode\n", 377 sc->sc_dev.dv_xname); 378 else { 379 while (dt->dt_year % 4 != 380 (bcd[PCF8583_REG_YEARDATE] & 381 PCF8583_YEAR_MASK) >> PCF8583_YEAR_SHIFT) 382 dt->dt_year++; 383 } 384 385 return 0; 386 } 387 388 static int 389 pcfrtc_clock_write(struct pcfrtc_softc *sc, struct clock_ymdhms *dt, 390 uint8_t centi) 391 { 392 uint8_t bcd[10], cmdbuf[2]; 393 int i, err; 394 395 /* 396 * Convert our time representation into something the PCF8583 397 * can understand. 398 */ 399 bcd[PCF8583_REG_CENTI] = centi; 400 bcd[PCF8583_REG_SEC] = TOBCD(dt->dt_sec); 401 bcd[PCF8583_REG_MIN] = TOBCD(dt->dt_min); 402 bcd[PCF8583_REG_HOUR] = TOBCD(dt->dt_hour) & PCF8583_HOUR_MASK; 403 bcd[PCF8583_REG_YEARDATE] = TOBCD(dt->dt_day) | 404 ((dt->dt_year % 4) << PCF8583_YEAR_SHIFT); 405 bcd[PCF8583_REG_WKDYMON] = TOBCD(dt->dt_mon) | 406 ((dt->dt_wday % 4) << PCF8583_WKDY_SHIFT); 407 bcd[8] = dt->dt_year % 100; 408 bcd[9] = dt->dt_year / 100; 409 410 if ((err = iic_acquire_bus(sc->sc_tag, I2C_F_POLL))) { 411 printf("%s: pcfrtc_clock_write: failed to acquire I2C bus\n", 412 sc->sc_dev.dv_xname); 413 return err; 414 } 415 416 for (i = 1; i < 10; i++) { 417 cmdbuf[0] = pcf8583_rtc_offset[i]; 418 if ((err = iic_exec(sc->sc_tag, 419 i != 9 ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP, 420 sc->sc_address, cmdbuf, 1, 421 &bcd[i], 1, I2C_F_POLL))) { 422 iic_release_bus(sc->sc_tag, I2C_F_POLL); 423 printf("%s: pcfrtc_clock_write: failed to write rtc " 424 " at 0x%x\n", sc->sc_dev.dv_xname, 425 pcf8583_rtc_offset[i]); 426 return err; 427 } 428 } 429 430 iic_release_bus(sc->sc_tag, I2C_F_POLL); 431 432 return 0; 433 } 434 435 int 436 pcfrtc_bootstrap_read(i2c_tag_t tag, int i2caddr, int offset, 437 u_int8_t *rvp, size_t len) 438 { 439 u_int8_t cmdbuf[1]; 440 441 /* 442 * NOTE: "offset" is an absolute offset into the PCF8583 443 * address space, not relative to the NVRAM. 444 */ 445 446 if (len == 0) 447 return (0); 448 449 if (iic_acquire_bus(tag, I2C_F_POLL) != 0) 450 return (-1); 451 452 while (len) { 453 /* Read a single byte. */ 454 cmdbuf[0] = offset; 455 if (iic_exec(tag, I2C_OP_READ_WITH_STOP, i2caddr, 456 cmdbuf, 1, rvp, 1, I2C_F_POLL)) { 457 iic_release_bus(tag, I2C_F_POLL); 458 return (-1); 459 } 460 461 len--; 462 rvp++; 463 offset++; 464 } 465 466 iic_release_bus(tag, I2C_F_POLL); 467 return (0); 468 } 469 470 int 471 pcfrtc_bootstrap_write(i2c_tag_t tag, int i2caddr, int offset, 472 u_int8_t *rvp, size_t len) 473 { 474 u_int8_t cmdbuf[1]; 475 476 /* 477 * NOTE: "offset" is an absolute offset into the PCF8583 478 * address space, not relative to the NVRAM. 479 */ 480 481 if (len == 0) 482 return (0); 483 484 if (iic_acquire_bus(tag, I2C_F_POLL) != 0) 485 return (-1); 486 487 while (len) { 488 /* Write a single byte. */ 489 cmdbuf[0] = offset; 490 if (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, i2caddr, 491 cmdbuf, 1, rvp, 1, I2C_F_POLL)) { 492 iic_release_bus(tag, I2C_F_POLL); 493 return (-1); 494 } 495 496 len--; 497 rvp++; 498 offset++; 499 } 500 501 iic_release_bus(tag, I2C_F_POLL); 502 return (0); 503 } 504
Indexes created Thu Sep 25 08:09:54 GMT 2025