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rkpmic.c revision 1.3
      1  1.3  jmcneill /* $NetBSD: rkpmic.c,v 1.3 2019/07/03 10:21:41 jmcneill Exp $ */
      2  1.1  jmcneill 
      3  1.1  jmcneill /*-
      4  1.1  jmcneill  * Copyright (c) 2018 Jared McNeill <jmcneill (at) invisible.ca>
      5  1.1  jmcneill  * All rights reserved.
      6  1.1  jmcneill  *
      7  1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8  1.1  jmcneill  * modification, are permitted provided that the following conditions
      9  1.1  jmcneill  * are met:
     10  1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12  1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15  1.1  jmcneill  *
     16  1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     17  1.1  jmcneill  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  1.1  jmcneill  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  1.1  jmcneill  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     20  1.1  jmcneill  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  1.1  jmcneill  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  1.1  jmcneill  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  1.1  jmcneill  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  1.1  jmcneill  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  1.1  jmcneill  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  1.1  jmcneill  * POSSIBILITY OF SUCH DAMAGE.
     27  1.1  jmcneill  */
     28  1.1  jmcneill 
     29  1.1  jmcneill #include <sys/cdefs.h>
     30  1.3  jmcneill __KERNEL_RCSID(0, "$NetBSD: rkpmic.c,v 1.3 2019/07/03 10:21:41 jmcneill Exp $");
     31  1.1  jmcneill 
     32  1.1  jmcneill #include <sys/param.h>
     33  1.1  jmcneill #include <sys/systm.h>
     34  1.1  jmcneill #include <sys/kernel.h>
     35  1.1  jmcneill #include <sys/device.h>
     36  1.1  jmcneill #include <sys/conf.h>
     37  1.1  jmcneill #include <sys/bus.h>
     38  1.1  jmcneill #include <sys/kmem.h>
     39  1.1  jmcneill 
     40  1.1  jmcneill #include <dev/i2c/i2cvar.h>
     41  1.1  jmcneill 
     42  1.1  jmcneill #include <dev/fdt/fdtvar.h>
     43  1.1  jmcneill 
     44  1.1  jmcneill #define	CHIP_NAME_REG		0x17
     45  1.1  jmcneill #define	CHIP_VER_REG		0x18
     46  1.1  jmcneill 
     47  1.1  jmcneill struct rkpmic_ctrl {
     48  1.1  jmcneill 	const char *	name;
     49  1.1  jmcneill 	uint8_t		enable_reg;
     50  1.1  jmcneill 	uint8_t		enable_mask;
     51  1.1  jmcneill 	uint8_t		vsel_reg;
     52  1.1  jmcneill 	uint8_t		vsel_mask;
     53  1.1  jmcneill 	u_int		base;
     54  1.1  jmcneill 	u_int		step;
     55  1.2  jmcneill 	u_int		flags;
     56  1.2  jmcneill #define	F_ENABLE_WRITE_MASK	0x00
     57  1.1  jmcneill };
     58  1.1  jmcneill 
     59  1.1  jmcneill struct rkpmic_config {
     60  1.1  jmcneill 	const char *	name;
     61  1.1  jmcneill 	const struct rkpmic_ctrl *ctrl;
     62  1.1  jmcneill 	u_int		nctrl;
     63  1.1  jmcneill };
     64  1.1  jmcneill 
     65  1.2  jmcneill static const struct rkpmic_ctrl rk805_ctrls[] = {
     66  1.2  jmcneill 	/* DCDC */
     67  1.2  jmcneill 	{ .name = "DCDC_REG1",	.flags = F_ENABLE_WRITE_MASK,
     68  1.2  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(0),
     69  1.2  jmcneill 	  .vsel_reg = 0x2f,	.vsel_mask = __BITS(5,0),
     70  1.2  jmcneill 	  .base = 712500,	.step = 12500 },
     71  1.2  jmcneill 	{ .name = "DCDC_REG2",	.flags = F_ENABLE_WRITE_MASK,
     72  1.2  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(1),
     73  1.2  jmcneill 	  .vsel_reg = 0x33,	.vsel_mask = __BITS(5,0),
     74  1.2  jmcneill 	  .base = 712500,	.step = 12500 },
     75  1.2  jmcneill 	{ .name = "DCDC_REG3",	.flags = F_ENABLE_WRITE_MASK,
     76  1.2  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(2) },
     77  1.2  jmcneill 	{ .name = "DCDC_REG4",	.flags = F_ENABLE_WRITE_MASK,
     78  1.2  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(3),
     79  1.2  jmcneill 	  .vsel_reg = 0x38,	.vsel_mask = __BITS(3,0),
     80  1.2  jmcneill 	  .base = 800000,	.step = 100000 },
     81  1.2  jmcneill 
     82  1.2  jmcneill 	/* LDO */
     83  1.2  jmcneill 	{ .name = "LDO_REG1",	.flags = F_ENABLE_WRITE_MASK,
     84  1.2  jmcneill 	  .enable_reg = 0x27,	.enable_mask = __BIT(0),
     85  1.2  jmcneill 	  .vsel_reg = 0x3b,	.vsel_mask = __BITS(4,0),
     86  1.2  jmcneill 	  .base = 800000,	.step = 100000 },
     87  1.2  jmcneill 	{ .name = "LDO_REG2",	.flags = F_ENABLE_WRITE_MASK,
     88  1.2  jmcneill 	  .enable_reg = 0x27,	.enable_mask = __BIT(1),
     89  1.2  jmcneill 	  .vsel_reg = 0x3d,	.vsel_mask = __BITS(4,0),
     90  1.2  jmcneill 	  .base = 800000,	.step = 100000 },
     91  1.2  jmcneill 	{ .name = "LDO_REG3",	.flags = F_ENABLE_WRITE_MASK,
     92  1.2  jmcneill 	  .enable_reg = 0x27,	.enable_mask = __BIT(2),
     93  1.2  jmcneill 	  .vsel_reg = 0x3f,	.vsel_mask = __BITS(4,0),
     94  1.2  jmcneill 	  .base = 800000,	.step = 100000 },
     95  1.2  jmcneill };
     96  1.2  jmcneill 
     97  1.2  jmcneill static const struct rkpmic_config rk805_config = {
     98  1.2  jmcneill 	.name = "RK805",
     99  1.2  jmcneill 	.ctrl = rk805_ctrls,
    100  1.2  jmcneill 	.nctrl = __arraycount(rk805_ctrls),
    101  1.2  jmcneill };
    102  1.2  jmcneill 
    103  1.1  jmcneill static const struct rkpmic_ctrl rk808_ctrls[] = {
    104  1.1  jmcneill 	/* DCDC */
    105  1.1  jmcneill 	{ .name = "DCDC_REG1",
    106  1.1  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(0),
    107  1.1  jmcneill 	  .vsel_reg = 0x2f,	.vsel_mask = __BITS(5,0),
    108  1.1  jmcneill 	  .base = 712500,	.step = 12500 },
    109  1.1  jmcneill 	{ .name = "DCDC_REG2",
    110  1.1  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(1),
    111  1.1  jmcneill 	  .vsel_reg = 0x33,	.vsel_mask = __BITS(5,0),
    112  1.1  jmcneill 	  .base = 712500,	.step = 12500 },
    113  1.1  jmcneill 	{ .name = "DCDC_REG3",
    114  1.1  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(2) },
    115  1.1  jmcneill 	{ .name = "DCDC_REG4",
    116  1.1  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(3),
    117  1.1  jmcneill 	  .vsel_reg = 0x38,	.vsel_mask = __BITS(3,0),
    118  1.1  jmcneill 	  .base = 1800000,	.step = 100000 },
    119  1.1  jmcneill 
    120  1.1  jmcneill 	/* LDO */
    121  1.1  jmcneill 	{ .name = "LDO_REG1",
    122  1.1  jmcneill 	  .enable_reg = 0x24,	.enable_mask = __BIT(0),
    123  1.1  jmcneill 	  .vsel_reg = 0x3b,	.vsel_mask = __BITS(4,0),
    124  1.1  jmcneill 	  .base = 1800000,	.step = 100000 },
    125  1.1  jmcneill 	{ .name = "LDO_REG2",
    126  1.3  jmcneill 	  .enable_reg = 0x24,	.enable_mask = __BIT(1),
    127  1.1  jmcneill 	  .vsel_reg = 0x3d,	.vsel_mask = __BITS(4,0),
    128  1.1  jmcneill 	  .base = 1800000,	.step = 100000 },
    129  1.1  jmcneill 	{ .name = "LDO_REG3",
    130  1.3  jmcneill 	  .enable_reg = 0x24,	.enable_mask = __BIT(2),
    131  1.1  jmcneill 	  .vsel_reg = 0x3f,	.vsel_mask = __BITS(3,0),
    132  1.1  jmcneill 	  .base = 800000,	.step = 100000 },
    133  1.1  jmcneill 	{ .name = "LDO_REG4",
    134  1.3  jmcneill 	  .enable_reg = 0x24,	.enable_mask = __BIT(3),
    135  1.1  jmcneill 	  .vsel_reg = 0x41,	.vsel_mask = __BITS(4,0),
    136  1.1  jmcneill 	  .base = 1800000,	.step = 100000 },
    137  1.1  jmcneill 	{ .name = "LDO_REG5",
    138  1.3  jmcneill 	  .enable_reg = 0x24,	.enable_mask = __BIT(4),
    139  1.1  jmcneill 	  .vsel_reg = 0x43,	.vsel_mask = __BITS(4,0),
    140  1.1  jmcneill 	  .base = 1800000,	.step = 100000 },
    141  1.1  jmcneill 	{ .name = "LDO_REG6",
    142  1.3  jmcneill 	  .enable_reg = 0x24,	.enable_mask = __BIT(5),
    143  1.1  jmcneill 	  .vsel_reg = 0x45,	.vsel_mask = __BITS(4,0),
    144  1.1  jmcneill 	  .base = 800000,	.step = 100000 },
    145  1.1  jmcneill 	{ .name = "LDO_REG7",
    146  1.3  jmcneill 	  .enable_reg = 0x24,	.enable_mask = __BIT(6),
    147  1.1  jmcneill 	  .vsel_reg = 0x47,	.vsel_mask = __BITS(4,0),
    148  1.1  jmcneill 	  .base = 800000,	.step = 100000 },
    149  1.1  jmcneill 	{ .name = "LDO_REG8",
    150  1.3  jmcneill 	  .enable_reg = 0x24,	.enable_mask = __BIT(7),
    151  1.1  jmcneill 	  .vsel_reg = 0x49,	.vsel_mask = __BITS(4,0),
    152  1.1  jmcneill 	  .base = 1800000,	.step = 100000 },
    153  1.1  jmcneill 
    154  1.1  jmcneill 	/* SWITCH */
    155  1.1  jmcneill 	{ .name = "SWITCH_REG1",
    156  1.1  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(5) },
    157  1.1  jmcneill 	{ .name = "SWITCH_REG2",
    158  1.1  jmcneill 	  .enable_reg = 0x23,	.enable_mask = __BIT(6) },
    159  1.1  jmcneill };
    160  1.1  jmcneill 
    161  1.1  jmcneill static const struct rkpmic_config rk808_config = {
    162  1.1  jmcneill 	.name = "RK808",
    163  1.1  jmcneill 	.ctrl = rk808_ctrls,
    164  1.1  jmcneill 	.nctrl = __arraycount(rk808_ctrls),
    165  1.1  jmcneill };
    166  1.1  jmcneill 
    167  1.1  jmcneill struct rkpmic_softc {
    168  1.1  jmcneill 	device_t	sc_dev;
    169  1.1  jmcneill 	i2c_tag_t	sc_i2c;
    170  1.1  jmcneill 	i2c_addr_t	sc_addr;
    171  1.1  jmcneill 	int		sc_phandle;
    172  1.1  jmcneill 
    173  1.1  jmcneill 	struct rkpmic_config *sc_conf;
    174  1.1  jmcneill };
    175  1.1  jmcneill 
    176  1.1  jmcneill struct rkreg_softc {
    177  1.1  jmcneill 	device_t	sc_dev;
    178  1.1  jmcneill 	struct rkpmic_softc *sc_pmic;
    179  1.1  jmcneill 	const struct rkpmic_ctrl *sc_ctrl;
    180  1.1  jmcneill };
    181  1.1  jmcneill 
    182  1.1  jmcneill struct rkreg_attach_args {
    183  1.1  jmcneill 	const struct rkpmic_ctrl *reg_ctrl;
    184  1.1  jmcneill 	int		reg_phandle;
    185  1.1  jmcneill };
    186  1.1  jmcneill 
    187  1.1  jmcneill static const struct device_compatible_entry compat_data[] = {
    188  1.2  jmcneill 	{ "rockchip,rk805",	(uintptr_t)&rk805_config },
    189  1.1  jmcneill 	{ "rockchip,rk808",	(uintptr_t)&rk808_config },
    190  1.1  jmcneill 	{ NULL }
    191  1.1  jmcneill };
    192  1.1  jmcneill 
    193  1.1  jmcneill static uint8_t
    194  1.1  jmcneill rkpmic_read(struct rkpmic_softc *sc, uint8_t reg, int flags)
    195  1.1  jmcneill {
    196  1.1  jmcneill 	uint8_t val = 0;
    197  1.1  jmcneill 	int error;
    198  1.1  jmcneill 
    199  1.1  jmcneill 	error = iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, &val, flags);
    200  1.1  jmcneill 	if (error != 0)
    201  1.1  jmcneill 		aprint_error_dev(sc->sc_dev, "error reading reg %#x: %d\n", reg, error);
    202  1.1  jmcneill 
    203  1.1  jmcneill 	return val;
    204  1.1  jmcneill }
    205  1.1  jmcneill 
    206  1.1  jmcneill static void
    207  1.1  jmcneill rkpmic_write(struct rkpmic_softc *sc, uint8_t reg, uint8_t val, int flags)
    208  1.1  jmcneill {
    209  1.1  jmcneill 	int error;
    210  1.1  jmcneill 
    211  1.1  jmcneill 	error = iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, flags);
    212  1.1  jmcneill 	if (error != 0)
    213  1.1  jmcneill 		aprint_error_dev(sc->sc_dev, "error writing reg %#x: %d\n", reg, error);
    214  1.1  jmcneill }
    215  1.1  jmcneill 
    216  1.1  jmcneill #define	I2C_READ(sc, reg)	rkpmic_read((sc), (reg), I2C_F_POLL)
    217  1.1  jmcneill #define	I2C_WRITE(sc, reg, val)	rkpmic_write((sc), (reg), (val), I2C_F_POLL)
    218  1.1  jmcneill #define	I2C_LOCK(sc)		iic_acquire_bus((sc)->sc_i2c, I2C_F_POLL)
    219  1.1  jmcneill #define	I2C_UNLOCK(sc)		iic_release_bus((sc)->sc_i2c, I2C_F_POLL)
    220  1.1  jmcneill 
    221  1.1  jmcneill static int
    222  1.1  jmcneill rkpmic_match(device_t parent, cfdata_t match, void *aux)
    223  1.1  jmcneill {
    224  1.1  jmcneill 	struct i2c_attach_args *ia = aux;
    225  1.1  jmcneill 	int match_result;
    226  1.1  jmcneill 
    227  1.1  jmcneill 	if (iic_use_direct_match(ia, match, compat_data, &match_result))
    228  1.1  jmcneill 		return match_result;
    229  1.1  jmcneill 
    230  1.1  jmcneill 	return 0;
    231  1.1  jmcneill }
    232  1.1  jmcneill 
    233  1.1  jmcneill static void
    234  1.1  jmcneill rkpmic_attach(device_t parent, device_t self, void *aux)
    235  1.1  jmcneill {
    236  1.1  jmcneill 	struct rkpmic_softc * const sc = device_private(self);
    237  1.1  jmcneill 	struct i2c_attach_args *ia = aux;
    238  1.1  jmcneill 	struct rkreg_attach_args raa;
    239  1.1  jmcneill 	const struct device_compatible_entry *entry;
    240  1.1  jmcneill 	int child, regulators;
    241  1.1  jmcneill 	u_int chipid, n;
    242  1.1  jmcneill 
    243  1.1  jmcneill 	iic_compatible_match(ia, compat_data, &entry);
    244  1.1  jmcneill 
    245  1.1  jmcneill 	sc->sc_dev = self;
    246  1.1  jmcneill 	sc->sc_i2c = ia->ia_tag;
    247  1.1  jmcneill 	sc->sc_addr = ia->ia_addr;
    248  1.1  jmcneill 	sc->sc_phandle = ia->ia_cookie;
    249  1.1  jmcneill 	sc->sc_conf = (void *)entry->data;
    250  1.1  jmcneill 
    251  1.1  jmcneill 	aprint_naive("\n");
    252  1.1  jmcneill 	aprint_normal(": %s Power Management IC\n", sc->sc_conf->name);
    253  1.1  jmcneill 
    254  1.1  jmcneill 	I2C_LOCK(sc);
    255  1.1  jmcneill 	chipid = I2C_READ(sc, CHIP_NAME_REG) << 8;
    256  1.1  jmcneill 	chipid |= I2C_READ(sc, CHIP_VER_REG);
    257  1.1  jmcneill 	aprint_debug_dev(self, "Chip ID 0x%04x\n", chipid);
    258  1.1  jmcneill 	I2C_UNLOCK(sc);
    259  1.1  jmcneill 
    260  1.1  jmcneill 	regulators = of_find_firstchild_byname(sc->sc_phandle, "regulators");
    261  1.1  jmcneill 	if (regulators < 0)
    262  1.1  jmcneill 		return;
    263  1.1  jmcneill 
    264  1.1  jmcneill 	for (n = 0; n < sc->sc_conf->nctrl; n++) {
    265  1.1  jmcneill 		child = of_find_firstchild_byname(regulators, sc->sc_conf->ctrl[n].name);
    266  1.1  jmcneill 		if (child < 0)
    267  1.1  jmcneill 			continue;
    268  1.1  jmcneill 		raa.reg_ctrl = &sc->sc_conf->ctrl[n];
    269  1.1  jmcneill 		raa.reg_phandle = child;
    270  1.1  jmcneill 		config_found(self, &raa, NULL);
    271  1.1  jmcneill 	}
    272  1.1  jmcneill }
    273  1.1  jmcneill 
    274  1.1  jmcneill static int
    275  1.1  jmcneill rkreg_acquire(device_t dev)
    276  1.1  jmcneill {
    277  1.1  jmcneill 	return 0;
    278  1.1  jmcneill }
    279  1.1  jmcneill 
    280  1.1  jmcneill static void
    281  1.1  jmcneill rkreg_release(device_t dev)
    282  1.1  jmcneill {
    283  1.1  jmcneill }
    284  1.1  jmcneill 
    285  1.1  jmcneill static int
    286  1.1  jmcneill rkreg_enable(device_t dev, bool enable)
    287  1.1  jmcneill {
    288  1.1  jmcneill 	struct rkreg_softc * const sc = device_private(dev);
    289  1.1  jmcneill 	const struct rkpmic_ctrl *c = sc->sc_ctrl;
    290  1.1  jmcneill 	uint8_t val;
    291  1.1  jmcneill 
    292  1.1  jmcneill 	if (!c->enable_mask)
    293  1.1  jmcneill 		return EINVAL;
    294  1.1  jmcneill 
    295  1.1  jmcneill 	I2C_LOCK(sc->sc_pmic);
    296  1.2  jmcneill 	if (c->flags & F_ENABLE_WRITE_MASK)
    297  1.2  jmcneill 		val |= c->enable_mask << 4;
    298  1.2  jmcneill 	else
    299  1.2  jmcneill 		val = I2C_READ(sc->sc_pmic, c->enable_reg);
    300  1.1  jmcneill 	if (enable)
    301  1.1  jmcneill 		val |= c->enable_mask;
    302  1.1  jmcneill 	else
    303  1.1  jmcneill 		val &= ~c->enable_mask;
    304  1.1  jmcneill 	I2C_WRITE(sc->sc_pmic, c->enable_reg, val);
    305  1.1  jmcneill 	I2C_UNLOCK(sc->sc_pmic);
    306  1.1  jmcneill 
    307  1.1  jmcneill 	return 0;
    308  1.1  jmcneill }
    309  1.1  jmcneill 
    310  1.1  jmcneill static int
    311  1.1  jmcneill rkreg_set_voltage(device_t dev, u_int min_uvol, u_int max_uvol)
    312  1.1  jmcneill {
    313  1.1  jmcneill 	struct rkreg_softc * const sc = device_private(dev);
    314  1.1  jmcneill 	const struct rkpmic_ctrl *c = sc->sc_ctrl;
    315  1.1  jmcneill 	uint8_t val;
    316  1.1  jmcneill 	u_int vsel;
    317  1.1  jmcneill 
    318  1.1  jmcneill 	if (!c->vsel_mask)
    319  1.1  jmcneill 		return EINVAL;
    320  1.1  jmcneill 
    321  1.1  jmcneill 	if (min_uvol < c->base)
    322  1.1  jmcneill 		return ERANGE;
    323  1.1  jmcneill 
    324  1.1  jmcneill 	vsel = (min_uvol - c->base) / c->step;
    325  1.1  jmcneill 	if (vsel > __SHIFTOUT_MASK(c->vsel_mask))
    326  1.1  jmcneill 		return ERANGE;
    327  1.1  jmcneill 
    328  1.1  jmcneill 	I2C_LOCK(sc->sc_pmic);
    329  1.1  jmcneill 	val = I2C_READ(sc->sc_pmic, c->vsel_reg);
    330  1.1  jmcneill 	val &= ~c->vsel_mask;
    331  1.1  jmcneill 	val |= __SHIFTIN(vsel, c->vsel_mask);
    332  1.1  jmcneill 	I2C_WRITE(sc->sc_pmic, c->vsel_reg, val);
    333  1.1  jmcneill 	I2C_UNLOCK(sc->sc_pmic);
    334  1.1  jmcneill 
    335  1.1  jmcneill 	return 0;
    336  1.1  jmcneill }
    337  1.1  jmcneill 
    338  1.1  jmcneill static int
    339  1.1  jmcneill rkreg_get_voltage(device_t dev, u_int *puvol)
    340  1.1  jmcneill {
    341  1.1  jmcneill 	struct rkreg_softc * const sc = device_private(dev);
    342  1.1  jmcneill 	const struct rkpmic_ctrl *c = sc->sc_ctrl;
    343  1.1  jmcneill 	uint8_t val;
    344  1.1  jmcneill 
    345  1.1  jmcneill 	if (!c->vsel_mask)
    346  1.1  jmcneill 		return EINVAL;
    347  1.1  jmcneill 
    348  1.1  jmcneill 	I2C_LOCK(sc->sc_pmic);
    349  1.1  jmcneill 	val = I2C_READ(sc->sc_pmic, c->vsel_reg);
    350  1.1  jmcneill 	I2C_UNLOCK(sc->sc_pmic);
    351  1.1  jmcneill 
    352  1.1  jmcneill 	*puvol = __SHIFTOUT(val, c->vsel_mask) * c->step + c->base;
    353  1.1  jmcneill 
    354  1.1  jmcneill 	return 0;
    355  1.1  jmcneill }
    356  1.1  jmcneill 
    357  1.1  jmcneill static struct fdtbus_regulator_controller_func rkreg_funcs = {
    358  1.1  jmcneill 	.acquire = rkreg_acquire,
    359  1.1  jmcneill 	.release = rkreg_release,
    360  1.1  jmcneill 	.enable = rkreg_enable,
    361  1.1  jmcneill 	.set_voltage = rkreg_set_voltage,
    362  1.1  jmcneill 	.get_voltage = rkreg_get_voltage,
    363  1.1  jmcneill };
    364  1.1  jmcneill 
    365  1.1  jmcneill static int
    366  1.1  jmcneill rkreg_match(device_t parent, cfdata_t match, void *aux)
    367  1.1  jmcneill {
    368  1.1  jmcneill 	return 1;
    369  1.1  jmcneill }
    370  1.1  jmcneill 
    371  1.1  jmcneill static void
    372  1.1  jmcneill rkreg_attach(device_t parent, device_t self, void *aux)
    373  1.1  jmcneill {
    374  1.1  jmcneill 	struct rkreg_softc * const sc = device_private(self);
    375  1.1  jmcneill 	struct rkreg_attach_args *raa = aux;
    376  1.1  jmcneill 	const int phandle = raa->reg_phandle;
    377  1.1  jmcneill 	const char *name;
    378  1.1  jmcneill 
    379  1.1  jmcneill 	sc->sc_dev = self;
    380  1.1  jmcneill 	sc->sc_pmic = device_private(parent);
    381  1.1  jmcneill 	sc->sc_ctrl = raa->reg_ctrl;
    382  1.1  jmcneill 
    383  1.1  jmcneill 	fdtbus_register_regulator_controller(self, phandle,
    384  1.1  jmcneill 	    &rkreg_funcs);
    385  1.1  jmcneill 
    386  1.1  jmcneill 	aprint_naive("\n");
    387  1.1  jmcneill 	name = fdtbus_get_string(phandle, "regulator-name");
    388  1.1  jmcneill 	if (!name)
    389  1.1  jmcneill 		name = fdtbus_get_string(phandle, "name");
    390  1.1  jmcneill 	aprint_normal(": %s\n", name);
    391  1.1  jmcneill }
    392  1.1  jmcneill 
    393  1.1  jmcneill CFATTACH_DECL_NEW(rkpmic, sizeof(struct rkpmic_softc),
    394  1.1  jmcneill     rkpmic_match, rkpmic_attach, NULL, NULL);
    395  1.1  jmcneill 
    396  1.1  jmcneill CFATTACH_DECL_NEW(rkreg, sizeof(struct rkreg_softc),
    397  1.1  jmcneill     rkreg_match, rkreg_attach, NULL, NULL);
    398