rs5c372.c revision 1.1
1 /* $NetBSD: rs5c372.c,v 1.1 2005/08/16 11:09:12 nonaka Exp $ */ 2 3 /* 4 * Copyright (c) 2005 Kimihiro Nonaka 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 #include <sys/kernel.h> 33 #include <sys/fcntl.h> 34 #include <sys/uio.h> 35 #include <sys/conf.h> 36 #include <sys/event.h> 37 38 #include <dev/clock_subr.h> 39 40 #include <dev/i2c/i2cvar.h> 41 #include <dev/i2c/rs5c372reg.h> 42 43 struct rs5c372rtc_softc { 44 struct device sc_dev; 45 i2c_tag_t sc_tag; 46 int sc_address; 47 struct todr_chip_handle sc_todr; 48 }; 49 50 static int rs5c372rtc_match(struct device *, struct cfdata *, void *); 51 static void rs5c372rtc_attach(struct device *, struct device *, void *); 52 53 CFATTACH_DECL(rs5c372rtc, sizeof(struct rs5c372rtc_softc), 54 rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL); 55 56 static void rs5c372rtc_init(struct rs5c372rtc_softc *); 57 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *); 58 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *); 59 static int rs5c372rtc_gettime(struct todr_chip_handle *, volatile struct timeval *); 60 static int rs5c372rtc_settime(struct todr_chip_handle *, volatile struct timeval *); 61 static int rs5c372rtc_getcal(struct todr_chip_handle *, int *); 62 static int rs5c372rtc_setcal(struct todr_chip_handle *, int); 63 64 static int 65 rs5c372rtc_match(struct device *parent, struct cfdata *cf, void *arg) 66 { 67 struct i2c_attach_args *ia = arg; 68 69 if (ia->ia_addr == RS5C372_ADDR) 70 return (1); 71 return (0); 72 } 73 74 static void 75 rs5c372rtc_attach(struct device *parent, struct device *self, void *arg) 76 { 77 struct rs5c372rtc_softc *sc = (struct rs5c372rtc_softc *)self; 78 struct i2c_attach_args *ia = arg; 79 80 aprint_naive(": Real-time Clock\n"); 81 aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n"); 82 83 sc->sc_tag = ia->ia_tag; 84 sc->sc_address = ia->ia_addr; 85 sc->sc_todr.cookie = sc; 86 sc->sc_todr.todr_gettime = rs5c372rtc_gettime; 87 sc->sc_todr.todr_settime = rs5c372rtc_settime; 88 sc->sc_todr.todr_getcal = rs5c372rtc_getcal; 89 sc->sc_todr.todr_setcal = rs5c372rtc_setcal; 90 sc->sc_todr.todr_setwen = NULL; 91 92 todr_attach(&sc->sc_todr); 93 94 rs5c372rtc_init(sc); 95 } 96 97 static int 98 rs5c372rtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv) 99 { 100 struct rs5c372rtc_softc *sc = ch->cookie; 101 struct clock_ymdhms dt, check; 102 int retries; 103 104 memset(&dt, 0, sizeof(dt)); 105 memset(&check, 0, sizeof(check)); 106 107 /* 108 * Since we don't support Burst Read, we have to read the clock twice 109 * until we get two consecutive identical results. 110 */ 111 retries = 5; 112 do { 113 rs5c372rtc_clock_read(sc, &dt); 114 rs5c372rtc_clock_read(sc, &check); 115 } while (memcmp(&dt, &check, sizeof(check)) != 0 && --retries); 116 117 tv->tv_sec = clock_ymdhms_to_secs(&dt); 118 tv->tv_usec = 0; 119 120 return (0); 121 } 122 123 static int 124 rs5c372rtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv) 125 { 126 struct rs5c372rtc_softc *sc = ch->cookie; 127 struct clock_ymdhms dt; 128 129 clock_secs_to_ymdhms(tv->tv_sec, &dt); 130 131 if (rs5c372rtc_clock_write(sc, &dt) == 0) 132 return (-1); 133 134 return (0); 135 } 136 137 static int 138 rs5c372rtc_setcal(struct todr_chip_handle *ch, int cal) 139 { 140 141 return (EOPNOTSUPP); 142 } 143 144 static int 145 rs5c372rtc_getcal(struct todr_chip_handle *ch, int *cal) 146 { 147 148 return (EOPNOTSUPP); 149 } 150 151 static void 152 rs5c372rtc_init(struct rs5c372rtc_softc *sc) 153 { 154 uint8_t cmdbuf[2]; 155 156 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 157 printf("%s: rs5c372rtc_init: failed to acquire I2C bus\n", 158 sc->sc_dev.dv_xname); 159 return; 160 } 161 162 cmdbuf[0] = (RS5C372_CONTROL2 << 4); 163 cmdbuf[1] = RS5C372_CONTROL2_24HRS; 164 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 165 cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) { 166 iic_release_bus(sc->sc_tag, I2C_F_POLL); 167 printf("%s: rs5c372rtc_clock_read: failed to write control2\n", 168 sc->sc_dev.dv_xname); 169 return; 170 } 171 172 iic_release_bus(sc->sc_tag, I2C_F_POLL); 173 } 174 175 static int 176 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 177 { 178 uint8_t bcd[RS5C372_NRTC_REGS]; 179 uint8_t cmdbuf[1]; 180 181 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 182 printf("%s: rs5c372rtc_clock_read: failed to acquire I2C bus\n", 183 sc->sc_dev.dv_xname); 184 return (0); 185 } 186 187 cmdbuf[0] = (RS5C372_SECONDS << 4); 188 if (iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_address, 189 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) { 190 iic_release_bus(sc->sc_tag, I2C_F_POLL); 191 printf("%s: rs5c372rtc_clock_read: failed to read rtc\n", 192 sc->sc_dev.dv_xname); 193 return (0); 194 } 195 196 iic_release_bus(sc->sc_tag, I2C_F_POLL); 197 198 /* 199 * Convert the RS5C372's register values into something useable 200 */ 201 dt->dt_sec = FROMBCD(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK); 202 dt->dt_min = FROMBCD(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK); 203 dt->dt_hour = FROMBCD(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK); 204 dt->dt_day = FROMBCD(bcd[RS5C372_DATE] & RS5C372_DATE_MASK); 205 dt->dt_mon = FROMBCD(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK); 206 dt->dt_year = FROMBCD(bcd[RS5C372_YEAR]) + 2000; 207 208 return (1); 209 } 210 211 static int 212 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 213 { 214 uint8_t bcd[RS5C372_NRTC_REGS]; 215 uint8_t cmdbuf[1]; 216 217 /* 218 * Convert our time representation into something the RS5C372 219 * can understand. 220 */ 221 bcd[RS5C372_SECONDS] = TOBCD(dt->dt_sec); 222 bcd[RS5C372_MINUTES] = TOBCD(dt->dt_min); 223 bcd[RS5C372_HOURS] = TOBCD(dt->dt_hour); 224 bcd[RS5C372_DATE] = TOBCD(dt->dt_day); 225 bcd[RS5C372_DAY] = TOBCD(dt->dt_wday); 226 bcd[RS5C372_MONTH] = TOBCD(dt->dt_mon); 227 bcd[RS5C372_YEAR] = TOBCD(dt->dt_year % 100); 228 229 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 230 printf("%s: rs5c372rtc_clock_write: failed to " 231 "acquire I2C bus\n", sc->sc_dev.dv_xname); 232 return (0); 233 } 234 235 cmdbuf[0] = (RS5C372_SECONDS << 4); 236 if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 237 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) { 238 iic_release_bus(sc->sc_tag, I2C_F_POLL); 239 printf("%s: rs5c372rtc_clock_write: failed to write rtc\n", 240 sc->sc_dev.dv_xname); 241 return (0); 242 } 243 244 iic_release_bus(sc->sc_tag, I2C_F_POLL); 245 246 return (1); 247 } 248
Indexes created Tue Sep 23 23:09:58 GMT 2025