rs5c372.c revision 1.11 1 /* $NetBSD: rs5c372.c,v 1.11 2011/05/28 13:59:31 phx Exp $ */
2
3 /*
4 * Copyright (c) 2005 Kimihiro Nonaka
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: rs5c372.c,v 1.11 2011/05/28 13:59:31 phx Exp $");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/device.h>
35 #include <sys/kernel.h>
36 #include <sys/fcntl.h>
37 #include <sys/uio.h>
38 #include <sys/conf.h>
39 #include <sys/event.h>
40
41 #include <dev/clock_subr.h>
42
43 #include <dev/i2c/i2cvar.h>
44 #include <dev/i2c/rs5c372reg.h>
45
46 struct rs5c372rtc_softc {
47 device_t sc_dev;
48 i2c_tag_t sc_tag;
49 int sc_address;
50 struct todr_chip_handle sc_todr;
51 };
52
53 static int rs5c372rtc_match(device_t, cfdata_t, void *);
54 static void rs5c372rtc_attach(device_t, device_t, void *);
55
56 CFATTACH_DECL_NEW(rs5c372rtc, sizeof(struct rs5c372rtc_softc),
57 rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL);
58
59 static void rs5c372rtc_reg_write(struct rs5c372rtc_softc *, int, uint8_t);
60 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *);
61 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *);
62 static int rs5c372rtc_gettime(struct todr_chip_handle *, struct timeval *);
63 static int rs5c372rtc_settime(struct todr_chip_handle *, struct timeval *);
64
65 static int
66 rs5c372rtc_match(device_t parent, cfdata_t cf, void *arg)
67 {
68 struct i2c_attach_args *ia = arg;
69
70 if (ia->ia_name) {
71 /* direct config - check name */
72 if (strcmp(ia->ia_name, "rs5c372rtc") == 0)
73 return 1;
74 } else {
75 /* indirect config - check typical address */
76 if (ia->ia_addr == RS5C372_ADDR)
77 return 1;
78 }
79 return 0;
80 }
81
82 static void
83 rs5c372rtc_attach(device_t parent, device_t self, void *arg)
84 {
85 struct rs5c372rtc_softc *sc = device_private(self);
86 struct i2c_attach_args *ia = arg;
87
88 aprint_naive(": Real-time Clock\n");
89 aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n");
90
91 sc->sc_tag = ia->ia_tag;
92 sc->sc_address = ia->ia_addr;
93 sc->sc_dev = self;
94 sc->sc_todr.cookie = sc;
95 sc->sc_todr.todr_gettime = rs5c372rtc_gettime;
96 sc->sc_todr.todr_settime = rs5c372rtc_settime;
97 sc->sc_todr.todr_setwen = NULL;
98
99 todr_attach(&sc->sc_todr);
100
101 /* Initialize RTC */
102 rs5c372rtc_reg_write(sc, RS5C372_CONTROL2, RS5C372_CONTROL2_24HRS);
103 rs5c372rtc_reg_write(sc, RS5C372_CONTROL1, 0);
104 }
105
106 static int
107 rs5c372rtc_gettime(struct todr_chip_handle *ch, struct timeval *tv)
108 {
109 struct rs5c372rtc_softc *sc = ch->cookie;
110 struct clock_ymdhms dt;
111
112 memset(&dt, 0, sizeof(dt));
113
114 if (rs5c372rtc_clock_read(sc, &dt) == 0)
115 return (-1);
116
117 tv->tv_sec = clock_ymdhms_to_secs(&dt);
118 tv->tv_usec = 0;
119
120 return (0);
121 }
122
123 static int
124 rs5c372rtc_settime(struct todr_chip_handle *ch, struct timeval *tv)
125 {
126 struct rs5c372rtc_softc *sc = ch->cookie;
127 struct clock_ymdhms dt;
128
129 clock_secs_to_ymdhms(tv->tv_sec, &dt);
130
131 if (rs5c372rtc_clock_write(sc, &dt) == 0)
132 return (-1);
133
134 return (0);
135 }
136
137 static void
138 rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val)
139 {
140 uint8_t cmdbuf[2];
141
142 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
143 aprint_error_dev(sc->sc_dev,
144 "rs5c372rtc_reg_write: failed to acquire I2C bus\n");
145 return;
146 }
147
148 reg &= 0xf;
149 cmdbuf[0] = (reg << 4);
150 cmdbuf[1] = val;
151 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
152 cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
153 iic_release_bus(sc->sc_tag, I2C_F_POLL);
154 aprint_error_dev(sc->sc_dev,
155 "rs5c372rtc_reg_write: failed to write reg%d\n", reg);
156 return;
157 }
158
159 iic_release_bus(sc->sc_tag, I2C_F_POLL);
160 }
161
162 static int
163 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
164 {
165 uint8_t bcd[RS5C372_NRTC_REGS];
166 uint8_t cmdbuf[1];
167
168 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
169 aprint_error_dev(sc->sc_dev,
170 "rs5c372rtc_clock_read: failed to acquire I2C bus\n");
171 return (0);
172 }
173
174 cmdbuf[0] = (RS5C372_SECONDS << 4);
175 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
176 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
177 iic_release_bus(sc->sc_tag, I2C_F_POLL);
178 aprint_error_dev(sc->sc_dev,
179 "rs5c372rtc_clock_read: failed to read rtc\n");
180 return (0);
181 }
182
183 iic_release_bus(sc->sc_tag, I2C_F_POLL);
184
185 /*
186 * Convert the RS5C372's register values into something useable
187 */
188 dt->dt_sec = FROMBCD(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK);
189 dt->dt_min = FROMBCD(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK);
190 dt->dt_hour = FROMBCD(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK);
191 dt->dt_day = FROMBCD(bcd[RS5C372_DATE] & RS5C372_DATE_MASK);
192 dt->dt_mon = FROMBCD(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK);
193 dt->dt_year = FROMBCD(bcd[RS5C372_YEAR]) + 2000;
194
195 return (1);
196 }
197
198 static int
199 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
200 {
201 uint8_t bcd[RS5C372_NRTC_REGS];
202 uint8_t cmdbuf[1];
203
204 /*
205 * Convert our time representation into something the RS5C372
206 * can understand.
207 */
208 bcd[RS5C372_SECONDS] = TOBCD(dt->dt_sec);
209 bcd[RS5C372_MINUTES] = TOBCD(dt->dt_min);
210 bcd[RS5C372_HOURS] = TOBCD(dt->dt_hour);
211 bcd[RS5C372_DATE] = TOBCD(dt->dt_day);
212 bcd[RS5C372_DAY] = TOBCD(dt->dt_wday);
213 bcd[RS5C372_MONTH] = TOBCD(dt->dt_mon);
214 bcd[RS5C372_YEAR] = TOBCD(dt->dt_year % 100);
215
216 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
217 aprint_error_dev(sc->sc_dev, "rs5c372rtc_clock_write: failed to "
218 "acquire I2C bus\n");
219 return (0);
220 }
221
222 cmdbuf[0] = (RS5C372_SECONDS << 4);
223 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
224 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
225 iic_release_bus(sc->sc_tag, I2C_F_POLL);
226 aprint_error_dev(sc->sc_dev,
227 "rs5c372rtc_clock_write: failed to write rtc\n");
228 return (0);
229 }
230
231 iic_release_bus(sc->sc_tag, I2C_F_POLL);
232
233 return (1);
234 }
235