rs5c372.c revision 1.16
1 /* $NetBSD: rs5c372.c,v 1.16 2020/01/02 17:17:36 thorpej Exp $ */ 2 3 /*- 4 * Copyright (C) 2005 NONAKA Kimihiro <nonaka (at) netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: rs5c372.c,v 1.16 2020/01/02 17:17:36 thorpej Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 #include <sys/kernel.h> 35 #include <sys/fcntl.h> 36 #include <sys/uio.h> 37 #include <sys/conf.h> 38 #include <sys/event.h> 39 40 #include <dev/clock_subr.h> 41 42 #include <dev/i2c/i2cvar.h> 43 #include <dev/i2c/rs5c372reg.h> 44 45 struct rs5c372rtc_softc { 46 device_t sc_dev; 47 i2c_tag_t sc_tag; 48 int sc_address; 49 struct todr_chip_handle sc_todr; 50 }; 51 52 static int rs5c372rtc_match(device_t, cfdata_t, void *); 53 static void rs5c372rtc_attach(device_t, device_t, void *); 54 55 CFATTACH_DECL_NEW(rs5c372rtc, sizeof(struct rs5c372rtc_softc), 56 rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL); 57 58 static int rs5c372rtc_reg_write(struct rs5c372rtc_softc *, int, uint8_t); 59 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *); 60 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *); 61 static int rs5c372rtc_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 62 static int rs5c372rtc_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 63 64 static int 65 rs5c372rtc_match(device_t parent, cfdata_t cf, void *arg) 66 { 67 struct i2c_attach_args *ia = arg; 68 int match_result; 69 70 if (iic_use_direct_match(ia, cf, NULL, &match_result)) 71 return match_result; 72 73 /* indirect config - check typical address */ 74 if (ia->ia_addr == RS5C372_ADDR) 75 return I2C_MATCH_ADDRESS_ONLY; 76 77 return 0; 78 } 79 80 static void 81 rs5c372rtc_attach(device_t parent, device_t self, void *arg) 82 { 83 struct rs5c372rtc_softc *sc = device_private(self); 84 struct i2c_attach_args *ia = arg; 85 86 aprint_naive(": Real-time Clock\n"); 87 aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n"); 88 89 sc->sc_tag = ia->ia_tag; 90 sc->sc_address = ia->ia_addr; 91 sc->sc_dev = self; 92 sc->sc_todr.cookie = sc; 93 sc->sc_todr.todr_gettime_ymdhms = rs5c372rtc_gettime_ymdhms; 94 sc->sc_todr.todr_settime_ymdhms = rs5c372rtc_settime_ymdhms; 95 sc->sc_todr.todr_setwen = NULL; 96 97 todr_attach(&sc->sc_todr); 98 99 /* Initialize RTC */ 100 rs5c372rtc_reg_write(sc, RS5C372_CONTROL2, RS5C372_CONTROL2_24HRS); 101 rs5c372rtc_reg_write(sc, RS5C372_CONTROL1, 0); 102 } 103 104 static int 105 rs5c372rtc_gettime_ymdhms(todr_chip_handle_t ch, struct clock_ymdhms *dt) 106 { 107 struct rs5c372rtc_softc *sc = ch->cookie; 108 109 return rs5c372rtc_clock_read(sc, dt); 110 } 111 112 static int 113 rs5c372rtc_settime_ymdhms(todr_chip_handle_t ch, struct clock_ymdhms *dt) 114 { 115 struct rs5c372rtc_softc *sc = ch->cookie; 116 117 return rs5c372rtc_clock_write(sc, dt); 118 } 119 120 static int 121 rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val) 122 { 123 uint8_t cmdbuf[2]; 124 int error; 125 126 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 127 aprint_error_dev(sc->sc_dev, 128 "rs5c372rtc_reg_write: failed to acquire I2C bus\n"); 129 return error; 130 } 131 132 reg &= 0xf; 133 cmdbuf[0] = (reg << 4); 134 cmdbuf[1] = val; 135 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 136 sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 137 0)) != 0) { 138 iic_release_bus(sc->sc_tag, 0); 139 aprint_error_dev(sc->sc_dev, 140 "rs5c372rtc_reg_write: failed to write reg%d\n", reg); 141 return error; 142 } 143 144 iic_release_bus(sc->sc_tag, 0); 145 146 return 0; 147 } 148 149 static int 150 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 151 { 152 uint8_t bcd[RS5C372_NRTC_REGS]; 153 uint8_t cmdbuf[1]; 154 int error; 155 156 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 157 aprint_error_dev(sc->sc_dev, 158 "rs5c372rtc_clock_read: failed to acquire I2C bus\n"); 159 return (error); 160 } 161 162 cmdbuf[0] = (RS5C372_SECONDS << 4); 163 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 164 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, 0)) != 0) { 165 iic_release_bus(sc->sc_tag, 0); 166 aprint_error_dev(sc->sc_dev, 167 "rs5c372rtc_clock_read: failed to read rtc\n"); 168 return (error); 169 } 170 171 iic_release_bus(sc->sc_tag, 0); 172 173 /* 174 * Convert the RS5C372's register values into something useable 175 */ 176 dt->dt_sec = bcdtobin(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK); 177 dt->dt_min = bcdtobin(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK); 178 dt->dt_hour = bcdtobin(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK); 179 dt->dt_day = bcdtobin(bcd[RS5C372_DATE] & RS5C372_DATE_MASK); 180 dt->dt_mon = bcdtobin(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK); 181 dt->dt_year = bcdtobin(bcd[RS5C372_YEAR]) + 2000; 182 183 return (0); 184 } 185 186 static int 187 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 188 { 189 uint8_t bcd[RS5C372_NRTC_REGS]; 190 uint8_t cmdbuf[1]; 191 int error; 192 193 /* 194 * Convert our time representation into something the RS5C372 195 * can understand. 196 */ 197 bcd[RS5C372_SECONDS] = bintobcd(dt->dt_sec); 198 bcd[RS5C372_MINUTES] = bintobcd(dt->dt_min); 199 bcd[RS5C372_HOURS] = bintobcd(dt->dt_hour); 200 bcd[RS5C372_DATE] = bintobcd(dt->dt_day); 201 bcd[RS5C372_DAY] = bintobcd(dt->dt_wday); 202 bcd[RS5C372_MONTH] = bintobcd(dt->dt_mon); 203 bcd[RS5C372_YEAR] = bintobcd(dt->dt_year % 100); 204 205 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 206 aprint_error_dev(sc->sc_dev, "rs5c372rtc_clock_write: failed to " 207 "acquire I2C bus\n"); 208 return (error); 209 } 210 211 cmdbuf[0] = (RS5C372_SECONDS << 4); 212 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 213 sc->sc_address, cmdbuf, 1, bcd, 214 RS5C372_NRTC_REGS, 0)) != 0) { 215 iic_release_bus(sc->sc_tag, 0); 216 aprint_error_dev(sc->sc_dev, 217 "rs5c372rtc_clock_write: failed to write rtc\n"); 218 return (error); 219 } 220 221 iic_release_bus(sc->sc_tag, 0); 222 223 return (0); 224 } 225
Indexes created Wed Sep 24 02:09:48 GMT 2025