rs5c372.c revision 1.2
1 /* $NetBSD: rs5c372.c,v 1.2 2005/08/16 16:33:50 nonaka Exp $ */ 2 3 /* 4 * Copyright (c) 2005 Kimihiro Nonaka 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 #include <sys/kernel.h> 33 #include <sys/fcntl.h> 34 #include <sys/uio.h> 35 #include <sys/conf.h> 36 #include <sys/event.h> 37 38 #include <dev/clock_subr.h> 39 40 #include <dev/i2c/i2cvar.h> 41 #include <dev/i2c/rs5c372reg.h> 42 43 struct rs5c372rtc_softc { 44 struct device sc_dev; 45 i2c_tag_t sc_tag; 46 int sc_address; 47 struct todr_chip_handle sc_todr; 48 }; 49 50 static int rs5c372rtc_match(struct device *, struct cfdata *, void *); 51 static void rs5c372rtc_attach(struct device *, struct device *, void *); 52 53 CFATTACH_DECL(rs5c372rtc, sizeof(struct rs5c372rtc_softc), 54 rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL); 55 56 static void rs5c372rtc_reg_write(struct rs5c372rtc_softc *, int, uint8_t); 57 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *); 58 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *); 59 static int rs5c372rtc_gettime(struct todr_chip_handle *, volatile struct timeval *); 60 static int rs5c372rtc_settime(struct todr_chip_handle *, volatile struct timeval *); 61 static int rs5c372rtc_getcal(struct todr_chip_handle *, int *); 62 static int rs5c372rtc_setcal(struct todr_chip_handle *, int); 63 64 static int 65 rs5c372rtc_match(struct device *parent, struct cfdata *cf, void *arg) 66 { 67 struct i2c_attach_args *ia = arg; 68 69 if (ia->ia_addr == RS5C372_ADDR) 70 return (1); 71 return (0); 72 } 73 74 static void 75 rs5c372rtc_attach(struct device *parent, struct device *self, void *arg) 76 { 77 struct rs5c372rtc_softc *sc = (struct rs5c372rtc_softc *)self; 78 struct i2c_attach_args *ia = arg; 79 80 aprint_naive(": Real-time Clock\n"); 81 aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n"); 82 83 sc->sc_tag = ia->ia_tag; 84 sc->sc_address = ia->ia_addr; 85 sc->sc_todr.cookie = sc; 86 sc->sc_todr.todr_gettime = rs5c372rtc_gettime; 87 sc->sc_todr.todr_settime = rs5c372rtc_settime; 88 sc->sc_todr.todr_getcal = rs5c372rtc_getcal; 89 sc->sc_todr.todr_setcal = rs5c372rtc_setcal; 90 sc->sc_todr.todr_setwen = NULL; 91 92 todr_attach(&sc->sc_todr); 93 94 /* Initialize RTC */ 95 rs5c372rtc_reg_write(sc, RS5C372_CONTROL2, RS5C372_CONTROL2_24HRS); 96 rs5c372rtc_reg_write(sc, RS5C372_CONTROL1, 0); 97 } 98 99 static int 100 rs5c372rtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv) 101 { 102 struct rs5c372rtc_softc *sc = ch->cookie; 103 struct clock_ymdhms dt, check; 104 int retries; 105 106 memset(&dt, 0, sizeof(dt)); 107 memset(&check, 0, sizeof(check)); 108 109 /* 110 * Since we don't support Burst Read, we have to read the clock twice 111 * until we get two consecutive identical results. 112 */ 113 retries = 5; 114 do { 115 rs5c372rtc_clock_read(sc, &dt); 116 rs5c372rtc_clock_read(sc, &check); 117 } while (memcmp(&dt, &check, sizeof(check)) != 0 && --retries); 118 119 tv->tv_sec = clock_ymdhms_to_secs(&dt); 120 tv->tv_usec = 0; 121 122 return (0); 123 } 124 125 static int 126 rs5c372rtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv) 127 { 128 struct rs5c372rtc_softc *sc = ch->cookie; 129 struct clock_ymdhms dt; 130 131 clock_secs_to_ymdhms(tv->tv_sec, &dt); 132 133 if (rs5c372rtc_clock_write(sc, &dt) == 0) 134 return (-1); 135 136 return (0); 137 } 138 139 static int 140 rs5c372rtc_setcal(struct todr_chip_handle *ch, int cal) 141 { 142 143 return (EOPNOTSUPP); 144 } 145 146 static int 147 rs5c372rtc_getcal(struct todr_chip_handle *ch, int *cal) 148 { 149 150 return (EOPNOTSUPP); 151 } 152 153 static void 154 rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val) 155 { 156 uint8_t cmdbuf[2]; 157 158 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 159 printf("%s: rs5c372rtc_reg_write: failed to acquire I2C bus\n", 160 sc->sc_dev.dv_xname); 161 return; 162 } 163 164 reg &= 0xf; 165 cmdbuf[0] = (reg << 4); 166 cmdbuf[1] = val; 167 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 168 cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) { 169 iic_release_bus(sc->sc_tag, I2C_F_POLL); 170 printf("%s: rs5c372rtc_reg_write: failed to write reg%d\n", 171 sc->sc_dev.dv_xname, reg); 172 return; 173 } 174 175 iic_release_bus(sc->sc_tag, I2C_F_POLL); 176 } 177 178 static int 179 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 180 { 181 uint8_t bcd[RS5C372_NRTC_REGS]; 182 uint8_t cmdbuf[1]; 183 184 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 185 printf("%s: rs5c372rtc_clock_read: failed to acquire I2C bus\n", 186 sc->sc_dev.dv_xname); 187 return (0); 188 } 189 190 cmdbuf[0] = (RS5C372_SECONDS << 4); 191 if (iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_address, 192 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) { 193 iic_release_bus(sc->sc_tag, I2C_F_POLL); 194 printf("%s: rs5c372rtc_clock_read: failed to read rtc\n", 195 sc->sc_dev.dv_xname); 196 return (0); 197 } 198 199 iic_release_bus(sc->sc_tag, I2C_F_POLL); 200 201 /* 202 * Convert the RS5C372's register values into something useable 203 */ 204 dt->dt_sec = FROMBCD(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK); 205 dt->dt_min = FROMBCD(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK); 206 dt->dt_hour = FROMBCD(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK); 207 dt->dt_day = FROMBCD(bcd[RS5C372_DATE] & RS5C372_DATE_MASK); 208 dt->dt_mon = FROMBCD(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK); 209 dt->dt_year = FROMBCD(bcd[RS5C372_YEAR]) + 2000; 210 211 return (1); 212 } 213 214 static int 215 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 216 { 217 uint8_t bcd[RS5C372_NRTC_REGS]; 218 uint8_t cmdbuf[1]; 219 220 /* 221 * Convert our time representation into something the RS5C372 222 * can understand. 223 */ 224 bcd[RS5C372_SECONDS] = TOBCD(dt->dt_sec); 225 bcd[RS5C372_MINUTES] = TOBCD(dt->dt_min); 226 bcd[RS5C372_HOURS] = TOBCD(dt->dt_hour); 227 bcd[RS5C372_DATE] = TOBCD(dt->dt_day); 228 bcd[RS5C372_DAY] = TOBCD(dt->dt_wday); 229 bcd[RS5C372_MONTH] = TOBCD(dt->dt_mon); 230 bcd[RS5C372_YEAR] = TOBCD(dt->dt_year % 100); 231 232 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 233 printf("%s: rs5c372rtc_clock_write: failed to " 234 "acquire I2C bus\n", sc->sc_dev.dv_xname); 235 return (0); 236 } 237 238 cmdbuf[0] = (RS5C372_SECONDS << 4); 239 if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address, 240 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) { 241 iic_release_bus(sc->sc_tag, I2C_F_POLL); 242 printf("%s: rs5c372rtc_clock_write: failed to write rtc\n", 243 sc->sc_dev.dv_xname); 244 return (0); 245 } 246 247 iic_release_bus(sc->sc_tag, I2C_F_POLL); 248 249 return (1); 250 } 251
Indexes created Tue Sep 23 22:09:46 GMT 2025