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rs5c372.c revision 1.8
      1 /*	$NetBSD: rs5c372.c,v 1.8 2008/04/06 20:25:59 cegger Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2005 Kimihiro Nonaka
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: rs5c372.c,v 1.8 2008/04/06 20:25:59 cegger Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/systm.h>
     34 #include <sys/device.h>
     35 #include <sys/kernel.h>
     36 #include <sys/fcntl.h>
     37 #include <sys/uio.h>
     38 #include <sys/conf.h>
     39 #include <sys/event.h>
     40 
     41 #include <dev/clock_subr.h>
     42 
     43 #include <dev/i2c/i2cvar.h>
     44 #include <dev/i2c/rs5c372reg.h>
     45 
     46 struct rs5c372rtc_softc {
     47 	struct device sc_dev;
     48 	i2c_tag_t sc_tag;
     49 	int sc_address;
     50 	struct todr_chip_handle sc_todr;
     51 };
     52 
     53 static int rs5c372rtc_match(struct device *, struct cfdata *, void *);
     54 static void rs5c372rtc_attach(struct device *, struct device *, void *);
     55 
     56 CFATTACH_DECL(rs5c372rtc, sizeof(struct rs5c372rtc_softc),
     57     rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL);
     58 
     59 static void rs5c372rtc_reg_write(struct rs5c372rtc_softc *, int, uint8_t);
     60 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *);
     61 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *);
     62 static int rs5c372rtc_gettime(struct todr_chip_handle *, volatile struct timeval *);
     63 static int rs5c372rtc_settime(struct todr_chip_handle *, volatile struct timeval *);
     64 
     65 static int
     66 rs5c372rtc_match(struct device *parent, struct cfdata *cf, void *arg)
     67 {
     68 	struct i2c_attach_args *ia = arg;
     69 
     70 	if (ia->ia_addr == RS5C372_ADDR)
     71 		return (1);
     72 	return (0);
     73 }
     74 
     75 static void
     76 rs5c372rtc_attach(struct device *parent, struct device *self, void *arg)
     77 {
     78 	struct rs5c372rtc_softc *sc = device_private(self);
     79 	struct i2c_attach_args *ia = arg;
     80 
     81 	aprint_naive(": Real-time Clock\n");
     82 	aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n");
     83 
     84 	sc->sc_tag = ia->ia_tag;
     85 	sc->sc_address = ia->ia_addr;
     86 	sc->sc_todr.cookie = sc;
     87 	sc->sc_todr.todr_gettime = rs5c372rtc_gettime;
     88 	sc->sc_todr.todr_settime = rs5c372rtc_settime;
     89 	sc->sc_todr.todr_setwen = NULL;
     90 
     91 	todr_attach(&sc->sc_todr);
     92 
     93 	/* Initialize RTC */
     94 	rs5c372rtc_reg_write(sc, RS5C372_CONTROL2, RS5C372_CONTROL2_24HRS);
     95 	rs5c372rtc_reg_write(sc, RS5C372_CONTROL1, 0);
     96 }
     97 
     98 static int
     99 rs5c372rtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv)
    100 {
    101 	struct rs5c372rtc_softc *sc = ch->cookie;
    102 	struct clock_ymdhms dt;
    103 
    104 	memset(&dt, 0, sizeof(dt));
    105 
    106 	if (rs5c372rtc_clock_read(sc, &dt) == 0)
    107 		return (-1);
    108 
    109 	tv->tv_sec = clock_ymdhms_to_secs(&dt);
    110 	tv->tv_usec = 0;
    111 
    112 	return (0);
    113 }
    114 
    115 static int
    116 rs5c372rtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv)
    117 {
    118 	struct rs5c372rtc_softc *sc = ch->cookie;
    119 	struct clock_ymdhms dt;
    120 
    121 	clock_secs_to_ymdhms(tv->tv_sec, &dt);
    122 
    123 	if (rs5c372rtc_clock_write(sc, &dt) == 0)
    124 		return (-1);
    125 
    126 	return (0);
    127 }
    128 
    129 static void
    130 rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val)
    131 {
    132 	uint8_t cmdbuf[2];
    133 
    134 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
    135 		aprint_error_dev(&sc->sc_dev, "rs5c372rtc_reg_write: failed to acquire I2C bus\n");
    136 		return;
    137 	}
    138 
    139 	reg &= 0xf;
    140 	cmdbuf[0] = (reg << 4);
    141 	cmdbuf[1] = val;
    142 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
    143 	             cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
    144 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
    145 		aprint_error_dev(&sc->sc_dev, "rs5c372rtc_reg_write: failed to write reg%d\n", reg);
    146 		return;
    147 	}
    148 
    149 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
    150 }
    151 
    152 static int
    153 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
    154 {
    155 	uint8_t bcd[RS5C372_NRTC_REGS];
    156 	uint8_t cmdbuf[1];
    157 
    158 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
    159 		aprint_error_dev(&sc->sc_dev, "rs5c372rtc_clock_read: failed to acquire I2C bus\n");
    160 		return (0);
    161 	}
    162 
    163 	cmdbuf[0] = (RS5C372_SECONDS << 4);
    164 	if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
    165 	             cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
    166 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
    167 		aprint_error_dev(&sc->sc_dev, "rs5c372rtc_clock_read: failed to read rtc\n");
    168 		return (0);
    169 	}
    170 
    171 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
    172 
    173 	/*
    174 	 * Convert the RS5C372's register values into something useable
    175 	 */
    176 	dt->dt_sec = FROMBCD(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK);
    177 	dt->dt_min = FROMBCD(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK);
    178 	dt->dt_hour = FROMBCD(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK);
    179 	dt->dt_day = FROMBCD(bcd[RS5C372_DATE] & RS5C372_DATE_MASK);
    180 	dt->dt_mon = FROMBCD(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK);
    181 	dt->dt_year = FROMBCD(bcd[RS5C372_YEAR]) + 2000;
    182 
    183 	return (1);
    184 }
    185 
    186 static int
    187 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
    188 {
    189 	uint8_t bcd[RS5C372_NRTC_REGS];
    190 	uint8_t cmdbuf[1];
    191 
    192 	/*
    193 	 * Convert our time representation into something the RS5C372
    194 	 * can understand.
    195 	 */
    196 	bcd[RS5C372_SECONDS] = TOBCD(dt->dt_sec);
    197 	bcd[RS5C372_MINUTES] = TOBCD(dt->dt_min);
    198 	bcd[RS5C372_HOURS] = TOBCD(dt->dt_hour);
    199 	bcd[RS5C372_DATE] = TOBCD(dt->dt_day);
    200 	bcd[RS5C372_DAY] = TOBCD(dt->dt_wday);
    201 	bcd[RS5C372_MONTH] = TOBCD(dt->dt_mon);
    202 	bcd[RS5C372_YEAR] = TOBCD(dt->dt_year % 100);
    203 
    204 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
    205 		aprint_error_dev(&sc->sc_dev, "rs5c372rtc_clock_write: failed to "
    206 		    "acquire I2C bus\n");
    207 		return (0);
    208 	}
    209 
    210 	cmdbuf[0] = (RS5C372_SECONDS << 4);
    211 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
    212 	             cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
    213 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
    214 		aprint_error_dev(&sc->sc_dev, "rs5c372rtc_clock_write: failed to write rtc\n");
    215 		return (0);
    216 	}
    217 
    218 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
    219 
    220 	return (1);
    221 }
    222