1 1.13 msaitoh /* $NetBSD: sdtemp_reg.h,v 1.13 2018/02/22 10:09:12 msaitoh Exp $ */ 2 1.1 pgoyette 3 1.1 pgoyette /* 4 1.1 pgoyette * Copyright (c) 2009 The NetBSD Foundation, Inc. 5 1.1 pgoyette * All rights reserved. 6 1.1 pgoyette * 7 1.1 pgoyette * This code is derived from software contributed to The NetBSD Foundation 8 1.1 pgoyette * by Paul Goyette. 9 1.1 pgoyette * 10 1.1 pgoyette * Redistribution and use in source and binary forms, with or without 11 1.1 pgoyette * modification, are permitted provided that the following conditions 12 1.1 pgoyette * are met: 13 1.1 pgoyette * 1. Redistributions of source code must retain the above copyright 14 1.1 pgoyette * notice, this list of conditions and the following disclaimer. 15 1.1 pgoyette * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 pgoyette * notice, this list of conditions and the following disclaimer in the 17 1.1 pgoyette * documentation and/or other materials provided with the distribution. 18 1.1 pgoyette * 19 1.1 pgoyette * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 pgoyette * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 pgoyette * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 pgoyette * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 pgoyette * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 pgoyette * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 pgoyette * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 pgoyette * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 pgoyette * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 pgoyette * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 pgoyette * POSSIBILITY OF SUCH DAMAGE. 30 1.1 pgoyette */ 31 1.1 pgoyette 32 1.1 pgoyette #ifndef _DEV_I2C_SDTEMPREG_H 33 1.1 pgoyette #define _DEV_I2C_SDTEMPREG_H 34 1.1 pgoyette 35 1.1 pgoyette /* 36 1.1 pgoyette * Following definitions derived from JEDEC Standard 21-C section 4.7 37 1.1 pgoyette * available at http://www.jedec.org/download/search/4_07R15.pdf 38 1.1 pgoyette */ 39 1.6 soren #define SDTEMP_ADDRMASK 0x3f8 40 1.1 pgoyette #define SDTEMP_ADDR 0x18 /* I2C address 001 1xxx */ 41 1.1 pgoyette 42 1.1 pgoyette #define SDTEMP_REG_CAPABILITY 0x00 43 1.1 pgoyette #define SDTEMP_REG_CONFIG 0x01 44 1.1 pgoyette #define SDTEMP_REG_UPPER_LIM 0x02 45 1.1 pgoyette #define SDTEMP_REG_LOWER_LIM 0x03 46 1.1 pgoyette #define SDTEMP_REG_CRIT_LIM 0x04 47 1.1 pgoyette #define SDTEMP_REG_AMBIENT_TEMP 0x05 48 1.1 pgoyette #define SDTEMP_REG_MFG_ID 0x06 49 1.1 pgoyette #define SDTEMP_REG_DEV_REV 0x07 50 1.1 pgoyette 51 1.1 pgoyette #define SDTEMP_CAP_HAS_ALARM 0x0001 52 1.1 pgoyette #define SDTEMP_CAP_ACCURACY_1C 0x0002 53 1.1 pgoyette #define SDTEMP_CAP_WIDER_RANGE 0x0004 54 1.1 pgoyette #define SDTEMP_CAP_RESOLUTION 0x0018 55 1.9 msaitoh #define SDTEMP_CAP_RESOLUTION_MAX 0x0003 /* 0.0625C */ 56 1.9 msaitoh #define SDTEMP_CAP_VHV 0x0020 57 1.9 msaitoh #define SDTEMP_CAP_TMOUT 0x0040 58 1.9 msaitoh #define SDTEMP_CAP_EVSD 0x0080 59 1.9 msaitoh 60 1.1 pgoyette 61 1.1 pgoyette #define SDTEMP_CONFIG_EVENT_MODE 0x0001 62 1.1 pgoyette #define SDTEMP_CONFIG_EVENT_POL_AH 0x0002 63 1.1 pgoyette #define SDTEMP_CONFIG_EVENT_CRIT_ONLY 0x0004 64 1.1 pgoyette #define SDTEMP_CONFIG_EVENT_ENABLED 0x0008 65 1.1 pgoyette #define SDTEMP_CONFIG_EVENT_STATUS 0x0010 66 1.1 pgoyette #define SDTEMP_CONFIG_INT_CLEAR 0x0020 67 1.1 pgoyette #define SDTEMP_CONFIG_WINDOW_LOCKED 0x0040 68 1.1 pgoyette #define SDTEMP_CONFIG_CRITICAL_LOCKED 0x0080 69 1.1 pgoyette #define SDTEMP_CONFIG_SHUTDOWN_MODE 0x0100 70 1.1 pgoyette #define SDTEMP_CONFIG_HYSTERESIS 0x0600 71 1.1 pgoyette 72 1.1 pgoyette #define SDTEMP_HYSTERESIS_NONE 0x0000 73 1.1 pgoyette #define SDTEMP_HYSTERESIS_15 0x0200 74 1.1 pgoyette #define SDTEMP_HYSTERESIS_30 0x0400 75 1.1 pgoyette #define SDTEMP_HYSTERESIS_60 0x0600 76 1.1 pgoyette 77 1.1 pgoyette /* 78 1.2 pgoyette * Temperature is a 13-bit value in the range of -256 <= x < +256 degrees. 79 1.1 pgoyette * Maximum resolution is 0.0625C (1/16th degree, 4 bits), but some devices 80 1.1 pgoyette * may have only 0.2500C or 0.1250C (1 or 2 bits), and some devices may not 81 1.1 pgoyette * be able to represent negative values (not that we'd expect them, anyway). 82 1.1 pgoyette */ 83 1.1 pgoyette #define SDTEMP_TEMP_MASK 0x0FFF 84 1.1 pgoyette #define SDTEMP_TEMP_NEGATIVE 0x1000 85 1.1 pgoyette #define SDTEMP_TEMP_SIGN_EXT 0xF000 86 1.1 pgoyette 87 1.1 pgoyette /* 88 1.2 pgoyette * Status bits set in SDTEMP_REG_AMBIENT_TEMP only 89 1.1 pgoyette */ 90 1.1 pgoyette #define SDTEMP_ABOVE_CRIT 0x8000 91 1.1 pgoyette #define SDTEMP_ABOVE_UPPER 0x4000 92 1.1 pgoyette #define SDTEMP_BELOW_LOWER 0x2000 93 1.1 pgoyette 94 1.1 pgoyette /* 95 1.1 pgoyette * Devices known to conform to JEDEC JC42.4 96 1.1 pgoyette */ 97 1.9 msaitoh 98 1.10 msaitoh /* TSE2004av definitions (JEDEC Standard No. 21-C Page 4.1.6) */ 99 1.10 msaitoh #define TSE2004AV_ID 0x2200 100 1.10 msaitoh #define TSE2004AV_MASK 0xff00 /* ID is upper 8bits */ 101 1.10 msaitoh #define TSE2004AV_REV 0x00ff /* Revision is lower 8bits */ 102 1.10 msaitoh #define SDTEMP_IS_TSE2004AV(dev) (((dev) & TSE2004AV_MASK) == TSE2004AV_ID) 103 1.10 msaitoh 104 1.9 msaitoh /* Atmel */ 105 1.9 msaitoh #define AT_MANUFACTURER_ID 0x001f 106 1.9 msaitoh #define AT_30TS00_DEVICE_ID 0x8201 /* Also matches 002A and 002B */ 107 1.9 msaitoh #define AT_30TS00_MASK 0xFFFF 108 1.9 msaitoh 109 1.9 msaitoh #define AT2_MANUFACTURER_ID 0x1114 110 1.9 msaitoh #define AT2_30TSE004_DEVICE_ID 0x2200 111 1.9 msaitoh #define AT2_30TSE004_MASK 0xFFFF 112 1.9 msaitoh 113 1.9 msaitoh /* Giantec Semiconductor */ 114 1.9 msaitoh #define GT_MANUFACTURER_ID 0x1C68 115 1.9 msaitoh #define GT_30TS00_DEVICE_ID 0x2201 116 1.9 msaitoh #define GT_30TS00_MASK 0xFFFF 117 1.9 msaitoh 118 1.9 msaitoh #define GT2_MANUFACTURER_ID 0x132D 119 1.9 msaitoh #define GT2_34TS02_DEVICE_ID 0x3300 120 1.9 msaitoh #define GT2_34TS02_MASK 0xFFFF 121 1.9 msaitoh 122 1.9 msaitoh /* Maxim */ 123 1.1 pgoyette #define MAXIM_MANUFACTURER_ID 0x004D 124 1.3 pgoyette #define MAX_6604_DEVICE_ID 0x3E00 125 1.13 msaitoh #define MAX_6604_2_DEVICE_ID 0x5400 126 1.3 pgoyette #define MAX_6604_MASK 0xFFFF 127 1.1 pgoyette 128 1.9 msaitoh /* Microchip */ 129 1.1 pgoyette #define MCP_MANUFACTURER_ID 0x0054 130 1.9 msaitoh #define MCP_9804_DEVICE_ID 0x0200 131 1.9 msaitoh #define MCP_9804_MASK 0xFFFC 132 1.3 pgoyette #define MCP_9805_DEVICE_ID 0x0000 /* Also matches MCP9843 */ 133 1.3 pgoyette #define MCP_9805_MASK 0xFFFE 134 1.3 pgoyette #define MCP_98242_DEVICE_ID 0x2000 135 1.3 pgoyette #define MCP_98242_MASK 0xFFFC 136 1.3 pgoyette #define MCP_98243_DEVICE_ID 0x2100 137 1.3 pgoyette #define MCP_98243_MASK 0xFFFC 138 1.9 msaitoh #define MCP_98244_DEVICE_ID 0x2200 139 1.9 msaitoh #define MCP_98244_MASK 0xFFFC 140 1.13 msaitoh #define MCP2_MANUFACTURER_ID 0x1055 /* PCI-SIG manufacturer ID */ 141 1.13 msaitoh #define MCP2_EMC1501_DEVICE_ID 0x0842 142 1.13 msaitoh #define MCP2_EMC1501_MASK 0xFFFF 143 1.9 msaitoh 144 1.9 msaitoh #define SDTEMP_REG_MCP_RESOLUTION_9804 0x08 /* 9804, 9824[23] */ 145 1.9 msaitoh #define SDTEMP_REG_MCP_RESOLUTION_98244 0x09 /* 98244 */ 146 1.1 pgoyette 147 1.9 msaitoh /* NXP Semiconductors */ 148 1.1 pgoyette /* According to datasheets, SE97 and SE98 have same ID */ 149 1.1 pgoyette #define NXP_MANUFACTURER_ID 0x1131 150 1.3 pgoyette #define NXP_SE98_DEVICE_ID 0xA100 151 1.3 pgoyette #define NXP_SE98_MASK 0xFFFC 152 1.3 pgoyette #define NXP_SE97_DEVICE_ID 0xA200 153 1.3 pgoyette #define NXP_SE97_MASK 0xFFFC 154 1.1 pgoyette 155 1.9 msaitoh /* Analog Devices */ 156 1.1 pgoyette #define ADT_MANUFACTURER_ID 0x11D4 157 1.13 msaitoh #define ADT_7408_DEVICE_ID 0x0800 /* e.g. 0x0801 */ 158 1.13 msaitoh #define ADT_7408_MASK 0xFFF0 159 1.1 pgoyette 160 1.9 msaitoh /* IDT */ 161 1.5 pgoyette #define IDT_MANUFACTURER_ID 0x00B3 162 1.4 pgoyette #define IDT_TS3000B3_DEVICE_ID 0x2903 /* Also matches TSE2002B3 */ 163 1.4 pgoyette #define IDT_TS3000B3_MASK 0xFFFF 164 1.9 msaitoh #define IDT_TS3000GB0_DEVICE_ID 0x2913 165 1.9 msaitoh #define IDT_TS3000GB0_MASK 0xFFFF 166 1.11 msaitoh #define IDT_TS3000GB2_DEVICE_ID 0x2912 /* Also matched TSE2002GB2 */ 167 1.9 msaitoh #define IDT_TS3000GB2_MASK 0xFFFF 168 1.9 msaitoh #define IDT_TS3001GB2_DEVICE_ID 0x3001 169 1.9 msaitoh #define IDT_TS3001GB2_MASK 0xFFFF 170 1.9 msaitoh #define IDT_TSE2004GB2_DEVICE_ID 0x2214 171 1.9 msaitoh #define IDT_TSE2004GB2_MASK 0xFFFF 172 1.9 msaitoh 173 1.9 msaitoh #define SDTEMP_REG_IDT_RESOLUTION 0x08 /* 2002 */ 174 1.4 pgoyette 175 1.9 msaitoh /* STmicroelectronics */ 176 1.1 pgoyette #define STTS_MANUFACTURER_ID 0x104A 177 1.3 pgoyette #define STTS_424_DEVICE_ID 0x0101 178 1.3 pgoyette #define STTS_424_MASK 0xFFFF 179 1.3 pgoyette #define STTS_424E_DEVICE_ID 0x0000 180 1.3 pgoyette #define STTS_424E_MASK 0xFFFE 181 1.7 mlelstv #define STTS_3000_DEVICE_ID 0x0200 182 1.7 mlelstv #define STTS_3000_MASK 0xFFFF 183 1.7 mlelstv #define STTS_2002_DEVICE_ID 0x0300 184 1.7 mlelstv #define STTS_2002_MASK 0xFFFF 185 1.7 mlelstv #define STTS_2004_DEVICE_ID 0x2201 186 1.7 mlelstv #define STTS_2004_MASK 0xFFFF 187 1.1 pgoyette 188 1.9 msaitoh /* On Semiconductor (Catalyst) */ 189 1.1 pgoyette /* According to datasheets, both the CAT6095 and CAT34TS02 have the same ID */ 190 1.1 pgoyette #define CAT_MANUFACTURER_ID 0x1B09 191 1.3 pgoyette #define CAT_34TS02_DEVICE_ID 0x0800 192 1.3 pgoyette #define CAT_34TS02_MASK 0xFFE0 193 1.8 msaitoh #define CAT_34TS02C_DEVICE_ID 0x0a00 194 1.12 nonaka #define CAT_34TS02C_MASK 0xFFFE 195 1.9 msaitoh #define CAT_34TS04_DEVICE_ID 0x2200 196 1.9 msaitoh #define CAT_34TS04_MASK 0xFFFF 197 1.1 pgoyette 198 1.1 pgoyette #endif /* _DEV_I2C_SDTEMPREG_H */ 199