spdmem_i2c.c revision 1.11
11.11Smlelstv/* $NetBSD: spdmem_i2c.c,v 1.11 2015/12/07 09:41:37 mlelstv Exp $ */ 21.1Spgoyette 31.1Spgoyette/* 41.1Spgoyette * Copyright (c) 2007 Nicolas Joly 51.1Spgoyette * Copyright (c) 2007 Paul Goyette 61.1Spgoyette * Copyright (c) 2007 Tobias Nygren 71.11Smlelstv * Copyright (c) 2015 Michael van Elst 81.1Spgoyette * All rights reserved. 91.1Spgoyette * 101.1Spgoyette * Redistribution and use in source and binary forms, with or without 111.1Spgoyette * modification, are permitted provided that the following conditions 121.1Spgoyette * are met: 131.1Spgoyette * 1. Redistributions of source code must retain the above copyright 141.1Spgoyette * notice, this list of conditions and the following disclaimer. 151.1Spgoyette * 2. Redistributions in binary form must reproduce the above copyright 161.1Spgoyette * notice, this list of conditions and the following disclaimer in the 171.1Spgoyette * documentation and/or other materials provided with the distribution. 181.1Spgoyette * 3. The name of the author may not be used to endorse or promote products 191.1Spgoyette * derived from this software without specific prior written permission. 201.1Spgoyette * 211.1Spgoyette * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS 221.1Spgoyette * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 231.1Spgoyette * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 241.1Spgoyette * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 251.1Spgoyette * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 261.1Spgoyette * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 271.1Spgoyette * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 281.1Spgoyette * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 291.1Spgoyette * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 301.1Spgoyette * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 311.1Spgoyette * POSSIBILITY OF SUCH DAMAGE. 321.1Spgoyette */ 331.1Spgoyette 341.1Spgoyette/* 351.1Spgoyette * Serial Presence Detect (SPD) memory identification 361.11Smlelstv * 371.11Smlelstv * JEDEC standard No. 21-C 381.11Smlelstv * JEDEC document 4_01_06R24 391.11Smlelstv * - Definitions of the EE1004-v 4 Kbit Serial Presence Detect EEPROM [...] 401.1Spgoyette */ 411.1Spgoyette 421.1Spgoyette#include <sys/cdefs.h> 431.11Smlelstv__KERNEL_RCSID(0, "$NetBSD: spdmem_i2c.c,v 1.11 2015/12/07 09:41:37 mlelstv Exp $"); 441.1Spgoyette 451.1Spgoyette#include <sys/param.h> 461.1Spgoyette#include <sys/device.h> 471.1Spgoyette#include <sys/endian.h> 481.2Spgoyette#include <sys/module.h> 491.1Spgoyette#include <sys/sysctl.h> 501.1Spgoyette#include <machine/bswap.h> 511.1Spgoyette 521.1Spgoyette#include <dev/i2c/i2cvar.h> 531.1Spgoyette#include <dev/ic/spdmemreg.h> 541.1Spgoyette#include <dev/ic/spdmemvar.h> 551.1Spgoyette 561.1Spgoyette/* Constants for matching i2c bus address */ 571.11Smlelstv#define SPDMEM_I2C_ADDRMASK 0xfff8 581.1Spgoyette#define SPDMEM_I2C_ADDR 0x50 591.11Smlelstv#define SPDCTL_I2C_ADDR 0x30 601.11Smlelstv 611.11Smlelstv/* set write protection */ 621.11Smlelstv#define SPDCTL_SWP0 (SPDCTL_I2C_ADDR + 1) 631.11Smlelstv#define SPDCTL_SWP1 (SPDCTL_I2C_ADDR + 4) 641.11Smlelstv#define SPDCTL_SWP2 (SPDCTL_I2C_ADDR + 5) 651.11Smlelstv#define SPDCTL_SWP3 (SPDCTL_I2C_ADDR + 0) 661.11Smlelstv 671.11Smlelstv/* clear write protections */ 681.11Smlelstv#define SPDCTL_CWP (SPDCTL_I2C_ADDR + 3) 691.11Smlelstv 701.11Smlelstv/* read protection status */ 711.11Smlelstv#define SPDCTL_RPS0 (SPDCTL_I2C_ADDR + 1) 721.11Smlelstv#define SPDCTL_RPS1 (SPDCTL_I2C_ADDR + 4) 731.11Smlelstv#define SPDCTL_RPS2 (SPDCTL_I2C_ADDR + 5) 741.11Smlelstv#define SPDCTL_RPS3 (SPDCTL_I2C_ADDR + 0) 751.11Smlelstv 761.11Smlelstv/* select page address */ 771.11Smlelstv#define SPDCTL_SPA0 (SPDCTL_I2C_ADDR + 6) 781.11Smlelstv#define SPDCTL_SPA1 (SPDCTL_I2C_ADDR + 7) 791.11Smlelstv 801.11Smlelstv/* read page address */ 811.11Smlelstv#define SPDCTL_RPA (SPDCTL_I2C_ADDR + 6) 821.1Spgoyette 831.1Spgoyettestruct spdmem_i2c_softc { 841.1Spgoyette struct spdmem_softc sc_base; 851.1Spgoyette i2c_tag_t sc_tag; 861.11Smlelstv i2c_addr_t sc_addr; /* EEPROM */ 871.11Smlelstv i2c_addr_t sc_page0; 881.11Smlelstv i2c_addr_t sc_page1; 891.1Spgoyette}; 901.1Spgoyette 911.2Spgoyettestatic int spdmem_i2c_match(device_t, cfdata_t, void *); 921.1Spgoyettestatic void spdmem_i2c_attach(device_t, device_t, void *); 931.2Spgoyettestatic int spdmem_i2c_detach(device_t, int); 941.2Spgoyette 951.2SpgoyetteCFATTACH_DECL_NEW(spdmem_iic, sizeof(struct spdmem_i2c_softc), 961.2Spgoyette spdmem_i2c_match, spdmem_i2c_attach, spdmem_i2c_detach, NULL); 971.1Spgoyette 981.11Smlelstvstatic uint8_t spdmem_i2c_read(struct spdmem_softc *, uint16_t); 991.1Spgoyette 1001.1Spgoyettestatic int 1011.1Spgoyettespdmem_i2c_match(device_t parent, cfdata_t match, void *aux) 1021.1Spgoyette{ 1031.1Spgoyette struct i2c_attach_args *ia = aux; 1041.1Spgoyette struct spdmem_i2c_softc sc; 1051.1Spgoyette 1061.1Spgoyette if (ia->ia_name) { 1071.1Spgoyette /* add other names as we find more firmware variations */ 1081.4Snakayama if (strcmp(ia->ia_name, "dimm-spd") && 1091.4Snakayama strcmp(ia->ia_name, "dimm")) 1101.1Spgoyette return 0; 1111.1Spgoyette } 1121.1Spgoyette 1131.1Spgoyette /* only do this lame test when not using direct config */ 1141.1Spgoyette if (ia->ia_name == NULL) { 1151.1Spgoyette if ((ia->ia_addr & SPDMEM_I2C_ADDRMASK) != SPDMEM_I2C_ADDR) 1161.1Spgoyette return 0; 1171.1Spgoyette } 1181.1Spgoyette 1191.1Spgoyette sc.sc_tag = ia->ia_tag; 1201.1Spgoyette sc.sc_addr = ia->ia_addr; 1211.11Smlelstv sc.sc_page0 = SPDCTL_SPA0; 1221.11Smlelstv sc.sc_page1 = SPDCTL_SPA1; 1231.1Spgoyette sc.sc_base.sc_read = spdmem_i2c_read; 1241.1Spgoyette 1251.1Spgoyette return spdmem_common_probe(&sc.sc_base); 1261.1Spgoyette} 1271.1Spgoyette 1281.1Spgoyettestatic void 1291.1Spgoyettespdmem_i2c_attach(device_t parent, device_t self, void *aux) 1301.1Spgoyette{ 1311.1Spgoyette struct spdmem_i2c_softc *sc = device_private(self); 1321.1Spgoyette struct i2c_attach_args *ia = aux; 1331.1Spgoyette 1341.1Spgoyette sc->sc_tag = ia->ia_tag; 1351.1Spgoyette sc->sc_addr = ia->ia_addr; 1361.11Smlelstv sc->sc_page0 = SPDCTL_SPA0; 1371.11Smlelstv sc->sc_page1 = SPDCTL_SPA1; 1381.1Spgoyette sc->sc_base.sc_read = spdmem_i2c_read; 1391.1Spgoyette 1401.1Spgoyette if (!pmf_device_register(self, NULL, NULL)) 1411.1Spgoyette aprint_error_dev(self, "couldn't establish power handler\n"); 1421.1Spgoyette 1431.1Spgoyette spdmem_common_attach(&sc->sc_base, self); 1441.1Spgoyette} 1451.1Spgoyette 1461.2Spgoyettestatic int 1471.2Spgoyettespdmem_i2c_detach(device_t self, int flags) 1481.2Spgoyette{ 1491.2Spgoyette struct spdmem_i2c_softc *sc = device_private(self); 1501.2Spgoyette 1511.2Spgoyette pmf_device_deregister(self); 1521.2Spgoyette 1531.2Spgoyette return spdmem_common_detach(&sc->sc_base, self); 1541.2Spgoyette} 1551.2Spgoyette 1561.1Spgoyettestatic uint8_t 1571.11Smlelstvspdmem_i2c_read(struct spdmem_softc *softc, uint16_t addr) 1581.1Spgoyette{ 1591.11Smlelstv uint8_t reg, val; 1601.1Spgoyette struct spdmem_i2c_softc *sc = (struct spdmem_i2c_softc *)softc; 1611.11Smlelstv static uint8_t dummy = 0; 1621.11Smlelstv 1631.11Smlelstv reg = addr & 0xff; 1641.1Spgoyette 1651.1Spgoyette iic_acquire_bus(sc->sc_tag, 0); 1661.11Smlelstv 1671.11Smlelstv if (addr & 0x100) { 1681.11Smlelstv iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_page1, 1691.11Smlelstv &dummy, 1, NULL, 0, I2C_F_POLL); 1701.11Smlelstv iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, 1711.11Smlelstv ®, 1, &val, 1, I2C_F_POLL); 1721.11Smlelstv iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_page0, 1731.11Smlelstv &dummy, 1, NULL, 0, I2C_F_POLL); 1741.11Smlelstv } else { 1751.11Smlelstv iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, 1761.11Smlelstv ®, 1, &val, 1, I2C_F_POLL); 1771.11Smlelstv } 1781.11Smlelstv 1791.1Spgoyette iic_release_bus(sc->sc_tag, 0); 1801.1Spgoyette 1811.1Spgoyette return val; 1821.1Spgoyette} 1831.2Spgoyette 1841.10SjmcneillMODULE(MODULE_CLASS_DRIVER, spdmem, "i2cexec"); 1851.2Spgoyette 1861.2Spgoyette#ifdef _MODULE 1871.2Spgoyette#include "ioconf.c" 1881.2Spgoyette#endif 1891.2Spgoyette 1901.2Spgoyettestatic int 1911.2Spgoyettespdmem_modcmd(modcmd_t cmd, void *opaque) 1921.2Spgoyette{ 1931.2Spgoyette int error = 0; 1941.5Spgoyette#ifdef _MODULE 1951.5Spgoyette static struct sysctllog *spdmem_sysctl_clog; 1961.5Spgoyette#endif 1971.2Spgoyette 1981.2Spgoyette switch (cmd) { 1991.2Spgoyette case MODULE_CMD_INIT: 2001.2Spgoyette#ifdef _MODULE 2011.2Spgoyette error = config_init_component(cfdriver_ioconf_spdmem, 2021.2Spgoyette cfattach_ioconf_spdmem, cfdata_ioconf_spdmem); 2031.2Spgoyette#endif 2041.2Spgoyette return error; 2051.2Spgoyette case MODULE_CMD_FINI: 2061.2Spgoyette#ifdef _MODULE 2071.2Spgoyette error = config_fini_component(cfdriver_ioconf_spdmem, 2081.2Spgoyette cfattach_ioconf_spdmem, cfdata_ioconf_spdmem); 2091.5Spgoyette sysctl_teardown(&spdmem_sysctl_clog); 2101.2Spgoyette#endif 2111.2Spgoyette return error; 2121.2Spgoyette default: 2131.2Spgoyette return ENOTTY; 2141.2Spgoyette } 2151.2Spgoyette} 216