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ssdfb_i2c.c revision 1.3
      1  1.3  tnn /* $NetBSD: ssdfb_i2c.c,v 1.3 2019/05/28 17:17:16 tnn Exp $ */
      2  1.1  tnn 
      3  1.1  tnn /*
      4  1.1  tnn  * Copyright (c) 2019 The NetBSD Foundation, Inc.
      5  1.1  tnn  * All rights reserved.
      6  1.1  tnn  *
      7  1.1  tnn  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  tnn  * by Tobias Nygren.
      9  1.1  tnn  *
     10  1.1  tnn  * Redistribution and use in source and binary forms, with or without
     11  1.1  tnn  * modification, are permitted provided that the following conditions
     12  1.1  tnn  * are met:
     13  1.1  tnn  * 1. Redistributions of source code must retain the above copyright
     14  1.1  tnn  *    notice, this list of conditions and the following disclaimer.
     15  1.1  tnn  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  tnn  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  tnn  *    documentation and/or other materials provided with the distribution.
     18  1.1  tnn  *
     19  1.1  tnn  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1  tnn  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1  tnn  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1  tnn  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1  tnn  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1  tnn  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1  tnn  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1  tnn  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1  tnn  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1  tnn  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1  tnn  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1  tnn  */
     31  1.1  tnn 
     32  1.1  tnn #include <sys/cdefs.h>
     33  1.3  tnn __KERNEL_RCSID(0, "$NetBSD: ssdfb_i2c.c,v 1.3 2019/05/28 17:17:16 tnn Exp $");
     34  1.1  tnn 
     35  1.1  tnn #include <sys/param.h>
     36  1.1  tnn #include <sys/device.h>
     37  1.1  tnn #include <dev/wscons/wsdisplayvar.h>
     38  1.1  tnn #include <dev/rasops/rasops.h>
     39  1.1  tnn #include <dev/i2c/i2cvar.h>
     40  1.1  tnn #include <dev/ic/ssdfbvar.h>
     41  1.1  tnn 
     42  1.1  tnn struct ssdfb_i2c_softc {
     43  1.1  tnn 	struct		ssdfb_softc sc;
     44  1.1  tnn 	i2c_tag_t	sc_i2c_tag;
     45  1.1  tnn 	i2c_addr_t	sc_i2c_addr;
     46  1.1  tnn };
     47  1.1  tnn 
     48  1.1  tnn static int	ssdfb_i2c_match(device_t, cfdata_t, void *);
     49  1.1  tnn static void	ssdfb_i2c_attach(device_t, device_t, void *);
     50  1.1  tnn static int	ssdfb_i2c_detach(device_t, int);
     51  1.1  tnn 
     52  1.1  tnn static int	ssdfb_i2c_cmd(void *, uint8_t *, size_t, bool);
     53  1.1  tnn static int	ssdfb_i2c_transfer_rect(void *, uint8_t, uint8_t, uint8_t,
     54  1.1  tnn 				uint8_t, uint8_t *, size_t, bool);
     55  1.1  tnn static int	ssdfb_i2c_transfer_rect_ssd1306(void *, uint8_t, uint8_t,
     56  1.1  tnn 				uint8_t, uint8_t, uint8_t *, size_t, bool);
     57  1.1  tnn static int	ssdfb_i2c_transfer_rect_sh1106(void *, uint8_t, uint8_t,
     58  1.1  tnn 				uint8_t, uint8_t, uint8_t *, size_t, bool);
     59  1.1  tnn static int	ssdfb_smbus_transfer_rect(void *, uint8_t, uint8_t, uint8_t,
     60  1.1  tnn 				uint8_t, uint8_t *, size_t, bool);
     61  1.1  tnn 
     62  1.1  tnn CFATTACH_DECL_NEW(ssdfb_iic, sizeof(struct ssdfb_i2c_softc),
     63  1.1  tnn     ssdfb_i2c_match, ssdfb_i2c_attach, ssdfb_i2c_detach, NULL);
     64  1.1  tnn 
     65  1.1  tnn static const struct device_compatible_entry compat_data[] = {
     66  1.1  tnn 	{ "solomon,ssd1306fb-i2c",	0 },
     67  1.1  tnn 	{ "sino,sh1106fb-i2c",		0 },
     68  1.1  tnn 	{ NULL,				0 }
     69  1.1  tnn };
     70  1.1  tnn 
     71  1.1  tnn static int
     72  1.1  tnn ssdfb_i2c_match(device_t parent, cfdata_t match, void *aux)
     73  1.1  tnn {
     74  1.1  tnn 	struct i2c_attach_args *ia = aux;
     75  1.1  tnn 	int match_result;
     76  1.1  tnn 
     77  1.1  tnn 	if (iic_use_direct_match(ia, match, compat_data, &match_result))
     78  1.1  tnn 		return match_result;
     79  1.1  tnn 
     80  1.1  tnn 	switch (ia->ia_addr) {
     81  1.1  tnn 	case SSDFB_I2C_DEFAULT_ADDR:
     82  1.1  tnn 	case SSDFB_I2C_ALTERNATIVE_ADDR:
     83  1.1  tnn 		return I2C_MATCH_ADDRESS_ONLY;
     84  1.1  tnn 	}
     85  1.1  tnn 
     86  1.1  tnn 	return 0;
     87  1.1  tnn }
     88  1.1  tnn 
     89  1.1  tnn static void
     90  1.1  tnn ssdfb_i2c_attach(device_t parent, device_t self, void *aux)
     91  1.1  tnn {
     92  1.1  tnn 	struct ssdfb_i2c_softc *sc = device_private(self);
     93  1.1  tnn 	struct cfdata *cf = device_cfdata(self);
     94  1.1  tnn 	struct i2c_attach_args *ia = aux;
     95  1.1  tnn 	int flags = cf->cf_flags;
     96  1.1  tnn 	int i;
     97  1.1  tnn 
     98  1.1  tnn 	if ((flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) == SSDFB_PRODUCT_UNKNOWN) {
     99  1.1  tnn 		for (i = 0; i < ia->ia_ncompat; i++) {
    100  1.1  tnn 			if (strncmp("solomon,ssd1306", ia->ia_compat[i], 15)
    101  1.1  tnn 			    == 0) {
    102  1.1  tnn 				flags |= SSDFB_PRODUCT_SSD1306_GENERIC;
    103  1.1  tnn 				break;
    104  1.1  tnn 			}
    105  1.1  tnn 			else if (strncmp("sino,sh1106", ia->ia_compat[i], 11)
    106  1.1  tnn 			    == 0) {
    107  1.1  tnn 				flags |= SSDFB_PRODUCT_SH1106_GENERIC;
    108  1.1  tnn 				break;
    109  1.1  tnn 			}
    110  1.1  tnn 		}
    111  1.1  tnn 	}
    112  1.1  tnn 	if ((flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) == SSDFB_PRODUCT_UNKNOWN)
    113  1.1  tnn 		flags |= SSDFB_PRODUCT_SSD1306_GENERIC;
    114  1.1  tnn 
    115  1.1  tnn 	sc->sc.sc_dev = self;
    116  1.1  tnn 	sc->sc_i2c_tag = ia->ia_tag;
    117  1.1  tnn 	sc->sc_i2c_addr = ia->ia_addr;
    118  1.1  tnn 	sc->sc.sc_cookie = (void *)sc;
    119  1.1  tnn 	sc->sc.sc_cmd = ssdfb_i2c_cmd;
    120  1.1  tnn 	sc->sc.sc_transfer_rect = ssdfb_i2c_transfer_rect;
    121  1.1  tnn 
    122  1.1  tnn 	ssdfb_attach(&sc->sc, flags);
    123  1.1  tnn }
    124  1.1  tnn 
    125  1.1  tnn static int
    126  1.1  tnn ssdfb_i2c_detach(device_t self, int flags)
    127  1.1  tnn {
    128  1.1  tnn 	struct ssdfb_i2c_softc *sc = device_private(self);
    129  1.1  tnn 
    130  1.1  tnn 	return ssdfb_detach(&sc->sc);
    131  1.1  tnn }
    132  1.1  tnn 
    133  1.1  tnn static int
    134  1.1  tnn ssdfb_i2c_cmd(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    135  1.1  tnn {
    136  1.1  tnn 	struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
    137  1.1  tnn 	int flags = usepoll ? I2C_F_POLL : 0;
    138  1.1  tnn 	uint8_t cb = 0;
    139  1.1  tnn 	int error;
    140  1.1  tnn 
    141  1.1  tnn 	error = iic_acquire_bus(sc->sc_i2c_tag, flags);
    142  1.1  tnn 	if (error)
    143  1.1  tnn 		return error;
    144  1.1  tnn 	error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    145  1.1  tnn 	    sc->sc_i2c_addr, &cb, sizeof(cb), cmd, len, flags);
    146  1.1  tnn 	(void) iic_release_bus(sc->sc_i2c_tag, flags);
    147  1.1  tnn 
    148  1.1  tnn 	return error;
    149  1.1  tnn }
    150  1.1  tnn 
    151  1.1  tnn static int
    152  1.1  tnn ssdfb_i2c_transfer_rect(void *cookie, uint8_t fromcol, uint8_t tocol,
    153  1.1  tnn     uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
    154  1.1  tnn {
    155  1.1  tnn 	struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
    156  1.1  tnn 	int flags = usepoll ? I2C_F_POLL : 0;
    157  1.1  tnn 	uint8_t cb = SSDFB_I2C_CTRL_BYTE_DATA_MASK;
    158  1.2  tnn 	uint8_t data[] = {0, 0, 0};
    159  1.1  tnn 	uint8_t cmd[2];
    160  1.1  tnn 	int error;
    161  1.1  tnn 
    162  1.1  tnn 	/*
    163  1.1  tnn 	 * Test if large transfers are supported by the parent i2c bus and
    164  1.1  tnn 	 * pick the fastest transfer routine for subsequent invocations.
    165  1.1  tnn 	 */
    166  1.1  tnn 	switch (sc->sc.sc_p->p_controller_id) {
    167  1.1  tnn 	case SSDFB_CONTROLLER_SSD1306:
    168  1.1  tnn 		sc->sc.sc_transfer_rect = ssdfb_i2c_transfer_rect_ssd1306;
    169  1.1  tnn 		break;
    170  1.1  tnn 	case SSDFB_CONTROLLER_SH1106:
    171  1.1  tnn 		sc->sc.sc_transfer_rect = ssdfb_i2c_transfer_rect_sh1106;
    172  1.1  tnn 		break;
    173  1.1  tnn 	default:
    174  1.1  tnn 		sc->sc.sc_transfer_rect = ssdfb_smbus_transfer_rect;
    175  1.1  tnn 		break;
    176  1.1  tnn 	}
    177  1.1  tnn 
    178  1.1  tnn 	if (sc->sc.sc_transfer_rect != ssdfb_smbus_transfer_rect) {
    179  1.1  tnn 		error = iic_acquire_bus(sc->sc_i2c_tag, flags);
    180  1.1  tnn 		if (error)
    181  1.1  tnn 			return error;
    182  1.1  tnn 		error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    183  1.1  tnn 		    sc->sc_i2c_addr, &cb, sizeof(cb), data, sizeof(data), flags);
    184  1.1  tnn 		(void) iic_release_bus(sc->sc_i2c_tag, flags);
    185  1.1  tnn 		if (error) {
    186  1.1  tnn 			sc->sc.sc_transfer_rect = ssdfb_smbus_transfer_rect;
    187  1.1  tnn 		}
    188  1.1  tnn 	}
    189  1.1  tnn 
    190  1.1  tnn 	/*
    191  1.1  tnn 	 * Set addressing mode for SSD1306.
    192  1.1  tnn 	 */
    193  1.1  tnn 	if (sc->sc.sc_p->p_controller_id == SSDFB_CONTROLLER_SSD1306) {
    194  1.1  tnn 		cmd[0] = SSD1306_CMD_SET_MEMORY_ADDRESSING_MODE;
    195  1.1  tnn 		cmd[1] = sc->sc.sc_transfer_rect
    196  1.1  tnn 		    == ssdfb_i2c_transfer_rect_ssd1306
    197  1.1  tnn 		    ? SSD1306_MEMORY_ADDRESSING_MODE_HORIZONTAL
    198  1.1  tnn 		    : SSD1306_MEMORY_ADDRESSING_MODE_PAGE;
    199  1.1  tnn 		error = ssdfb_i2c_cmd(cookie, cmd, sizeof(cmd), usepoll);
    200  1.1  tnn 		if (error)
    201  1.1  tnn 			return error;
    202  1.1  tnn 	}
    203  1.1  tnn 
    204  1.1  tnn 	return sc->sc.sc_transfer_rect(cookie, fromcol, tocol, frompage, topage,
    205  1.1  tnn 	    p, stride, usepoll);
    206  1.1  tnn }
    207  1.1  tnn 
    208  1.1  tnn 
    209  1.1  tnn static int
    210  1.1  tnn ssdfb_i2c_transfer_rect_ssd1306(void *cookie, uint8_t fromcol, uint8_t tocol,
    211  1.1  tnn     uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
    212  1.1  tnn {
    213  1.1  tnn 	struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
    214  1.1  tnn 	int flags = usepoll ? I2C_F_POLL : 0;
    215  1.1  tnn 	uint8_t cc = 0;
    216  1.1  tnn 	uint8_t cb = SSDFB_I2C_CTRL_BYTE_DATA_MASK;
    217  1.3  tnn 	size_t len = tocol + 1 - fromcol;
    218  1.1  tnn 	int error;
    219  1.1  tnn 	/*
    220  1.1  tnn 	 * SSD1306 does not implement the Continuation bit correctly.
    221  1.1  tnn 	 * The SH1106 protocol defines that a control byte WITH Co
    222  1.1  tnn 	 * set must be inserted between each command. But SSD1306
    223  1.1  tnn 	 * fails to parse the commands if we do that.
    224  1.1  tnn 	 */
    225  1.1  tnn 	uint8_t cmds[] = {
    226  1.1  tnn 		SSD1306_CMD_SET_COLUMN_ADDRESS,
    227  1.1  tnn 		fromcol, tocol,
    228  1.1  tnn 		SSD1306_CMD_SET_PAGE_ADDRESS,
    229  1.1  tnn 		frompage, topage
    230  1.1  tnn 	};
    231  1.1  tnn 
    232  1.1  tnn 	error = iic_acquire_bus(sc->sc_i2c_tag, flags);
    233  1.1  tnn 	if (error)
    234  1.1  tnn 		return error;
    235  1.1  tnn 	error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    236  1.1  tnn 	    sc->sc_i2c_addr, &cc, sizeof(cc), cmds, sizeof(cmds), flags);
    237  1.1  tnn 	if (error)
    238  1.1  tnn 		goto out;
    239  1.1  tnn 	while (frompage <= topage) {
    240  1.1  tnn 		error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    241  1.1  tnn 		    sc->sc_i2c_addr, &cb, sizeof(cb), p, len, flags);
    242  1.1  tnn 		if (error)
    243  1.1  tnn 			goto out;
    244  1.1  tnn 		frompage++;
    245  1.1  tnn 		p += stride;
    246  1.1  tnn 	}
    247  1.1  tnn out:
    248  1.1  tnn 	(void) iic_release_bus(sc->sc_i2c_tag, flags);
    249  1.1  tnn 
    250  1.1  tnn 	return error;
    251  1.1  tnn }
    252  1.1  tnn 
    253  1.1  tnn static int
    254  1.1  tnn ssdfb_i2c_transfer_rect_sh1106(void *cookie, uint8_t fromcol, uint8_t tocol,
    255  1.1  tnn     uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
    256  1.1  tnn {
    257  1.1  tnn 	struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
    258  1.1  tnn 	int flags = usepoll ? I2C_F_POLL : 0;
    259  1.1  tnn 	uint8_t cb = SSDFB_I2C_CTRL_BYTE_DATA_MASK;
    260  1.1  tnn 	uint8_t cc = SSDFB_I2C_CTRL_BYTE_CONTINUATION_MASK;
    261  1.3  tnn 	size_t len = tocol + 1 - fromcol;
    262  1.1  tnn 	int error;
    263  1.1  tnn 	uint8_t cmds[] = {
    264  1.1  tnn 		SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage,
    265  1.1  tnn 		SSDFB_I2C_CTRL_BYTE_CONTINUATION_MASK,
    266  1.1  tnn 		SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_BASE + (fromcol >> 4),
    267  1.1  tnn 		SSDFB_I2C_CTRL_BYTE_CONTINUATION_MASK,
    268  1.1  tnn 		SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_BASE + (fromcol & 0xf)
    269  1.1  tnn 	};
    270  1.1  tnn 
    271  1.1  tnn 	error = iic_acquire_bus(sc->sc_i2c_tag, flags);
    272  1.1  tnn 	if (error)
    273  1.1  tnn 		return error;
    274  1.1  tnn 	while (frompage <= topage) {
    275  1.1  tnn 		cmds[0] = SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage;
    276  1.1  tnn 		error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    277  1.1  tnn 		    sc->sc_i2c_addr, &cc, sizeof(cc), cmds, sizeof(cmds), flags);
    278  1.1  tnn 		if (error)
    279  1.1  tnn 			goto out;
    280  1.1  tnn 		error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    281  1.1  tnn 		    sc->sc_i2c_addr, &cb, sizeof(cb), p, len, flags);
    282  1.1  tnn 		if (error)
    283  1.1  tnn 			goto out;
    284  1.1  tnn 		frompage++;
    285  1.1  tnn 		p += stride;
    286  1.1  tnn 	}
    287  1.1  tnn out:
    288  1.1  tnn 	(void) iic_release_bus(sc->sc_i2c_tag, flags);
    289  1.1  tnn 
    290  1.1  tnn 	return error;
    291  1.1  tnn }
    292  1.1  tnn 
    293  1.1  tnn /*
    294  1.1  tnn  * If the parent is an SMBus, then we can only send 2 bytes
    295  1.1  tnn  * of payload per txn. The SSD1306 triple byte commands are
    296  1.1  tnn  * not available so we have to use PAGE addressing mode
    297  1.1  tnn  * and split data into multiple txns.
    298  1.1  tnn  * This is ugly and slow but it's the best we can do.
    299  1.1  tnn  */
    300  1.1  tnn static int
    301  1.1  tnn ssdfb_smbus_transfer_rect(void *cookie, uint8_t fromcol, uint8_t tocol,
    302  1.1  tnn     uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
    303  1.1  tnn {
    304  1.1  tnn 	struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
    305  1.1  tnn 	int flags = usepoll ? I2C_F_POLL : 0;
    306  1.1  tnn 	uint8_t cb = SSDFB_I2C_CTRL_BYTE_DATA_MASK;
    307  1.1  tnn 	uint8_t cc = 0;
    308  1.3  tnn 	size_t len = tocol + 1 - fromcol;
    309  1.1  tnn 	uint8_t cmd_higher_col =
    310  1.1  tnn 	    SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_BASE + (fromcol >> 4);
    311  1.1  tnn 	uint8_t cmd_lower_col =
    312  1.1  tnn 	    SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_BASE + (fromcol & 0xf);
    313  1.1  tnn 	uint8_t cmd_page;
    314  1.1  tnn 	uint8_t data[2];
    315  1.1  tnn 	uint8_t *colp;
    316  1.1  tnn 	uint8_t *endp;
    317  1.1  tnn 	int error;
    318  1.1  tnn 
    319  1.1  tnn 	error = iic_acquire_bus(sc->sc_i2c_tag, flags);
    320  1.1  tnn 	if (error)
    321  1.1  tnn 		return error;
    322  1.1  tnn 	while (frompage <= topage) {
    323  1.1  tnn 		error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    324  1.1  tnn 		    sc->sc_i2c_addr, &cc, sizeof(cc),
    325  1.1  tnn 		    &cmd_higher_col, sizeof(cmd_higher_col), flags);
    326  1.1  tnn 		if (error)
    327  1.1  tnn 			goto out;
    328  1.1  tnn 		error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    329  1.1  tnn 		    sc->sc_i2c_addr, &cc, sizeof(cc),
    330  1.1  tnn 		    &cmd_lower_col, sizeof(cmd_lower_col), flags);
    331  1.1  tnn 		if (error)
    332  1.1  tnn 			goto out;
    333  1.1  tnn 		cmd_page = SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage;
    334  1.1  tnn 		error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    335  1.1  tnn 		    sc->sc_i2c_addr, &cc, sizeof(cc),
    336  1.1  tnn 		    &cmd_page, sizeof(cmd_page), flags);
    337  1.1  tnn 		if (error)
    338  1.1  tnn 			goto out;
    339  1.1  tnn 		colp = p;
    340  1.1  tnn 		endp = colp + len;
    341  1.1  tnn 		if (len & 1) {
    342  1.1  tnn 			data[0] = *colp++;
    343  1.1  tnn 			error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    344  1.1  tnn 			    sc->sc_i2c_addr, &cb, sizeof(cb), data, 1, flags);
    345  1.1  tnn 			if (error)
    346  1.1  tnn 				goto out;
    347  1.1  tnn 		}
    348  1.1  tnn 		while (colp < endp) {
    349  1.1  tnn 			/*
    350  1.1  tnn 			 * Send two bytes at a time. We can't use colp directly
    351  1.1  tnn 			 * because i2c controllers sometimes have data alignment
    352  1.1  tnn 			 * requirements.
    353  1.1  tnn 			 */
    354  1.1  tnn 			data[0] = *colp++;
    355  1.1  tnn 			data[1] = *colp++;
    356  1.1  tnn 			error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
    357  1.1  tnn 			    sc->sc_i2c_addr, &cb, sizeof(cb), data, 2, flags);
    358  1.1  tnn 			if (error)
    359  1.1  tnn 				goto out;
    360  1.1  tnn 		}
    361  1.1  tnn 		frompage++;
    362  1.1  tnn 		p += stride;
    363  1.1  tnn 	}
    364  1.1  tnn out:
    365  1.1  tnn 	(void) iic_release_bus(sc->sc_i2c_tag, flags);
    366  1.1  tnn 	return error;
    367  1.1  tnn }
    368