tps65217pmicreg.h revision 1.5.4.3
1 1.5.4.2 tls /* $NetBSD: tps65217pmicreg.h,v 1.5.4.3 2014/08/20 00:03:37 tls Exp $ */ 2 1.5.4.2 tls 3 1.5.4.2 tls /*- 4 1.5.4.2 tls * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 1.5.4.2 tls * All rights reserved. 6 1.5.4.2 tls * 7 1.5.4.2 tls * This code is derived from software contributed to The NetBSD Foundation 8 1.5.4.2 tls * by Radoslaw Kujawa. 9 1.5.4.2 tls * 10 1.5.4.2 tls * Redistribution and use in source and binary forms, with or without 11 1.5.4.2 tls * modification, are permitted provided that the following conditions 12 1.5.4.2 tls * are met: 13 1.5.4.2 tls * 1. Redistributions of source code must retain the above copyright 14 1.5.4.2 tls * notice, this list of conditions and the following disclaimer. 15 1.5.4.2 tls * 2. Redistributions in binary form must reproduce the above copyright 16 1.5.4.2 tls * notice, this list of conditions and the following disclaimer in the 17 1.5.4.2 tls * documentation and/or other materials provided with the distribution. 18 1.5.4.2 tls * 19 1.5.4.2 tls * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.5.4.2 tls * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.5.4.2 tls * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.5.4.2 tls * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.5.4.2 tls * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.5.4.2 tls * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.5.4.2 tls * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.5.4.2 tls * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.5.4.2 tls * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.5.4.2 tls * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.5.4.2 tls * POSSIBILITY OF SUCH DAMAGE. 30 1.5.4.2 tls */ 31 1.5.4.2 tls 32 1.5.4.2 tls /*#include <sys/cdefs.h>*/ 33 1.5.4.2 tls 34 1.5.4.2 tls #ifndef _TPS65217PMICREG_H_ 35 1.5.4.2 tls #define _TPS65217PMICREG_H_ 36 1.5.4.2 tls 37 1.5.4.2 tls #define TPS65217PMIC_ADDR 0x24 38 1.5.4.2 tls 39 1.5.4.2 tls #define TPS65217PMIC_CHIPID 0x00 40 1.5.4.2 tls #define TPS65217PMIC_CHIPID_VER_MASK 0xF0 41 1.5.4.2 tls #define TPS65217PMIC_CHIPID_REV_MASK 0x0F 42 1.5.4.2 tls #define TPS65217PMIC_CHIPID_VER_A 0x70 43 1.5.4.2 tls #define TPS65217PMIC_CHIPID_VER_B 0xF0 44 1.5.4.2 tls #define TPS65217PMIC_CHIPID_VER_C 0xE0 45 1.5.4.2 tls #define TPS65217PMIC_CHIPID_VER_D 0x60 46 1.5.4.2 tls 47 1.5.4.2 tls #define TPS65217PMIC_PPATH 0x01 48 1.5.4.2 tls #define TPS65217PMIC_PPATH_IUSB __BITS(0,1) 49 1.5.4.2 tls #define TPS65217PMIC_PPATH_IUSB_100MA 0 50 1.5.4.2 tls #define TPS65217PMIC_PPATH_IUSB_500MA 1 51 1.5.4.2 tls #define TPS65217PMIC_PPATH_IUSB_1300MA 2 52 1.5.4.2 tls #define TPS65217PMIC_PPATH_IUSB_1800MA 3 53 1.5.4.2 tls #define TPS65217PMIC_PPATH_IAC __BITS(2,3) 54 1.5.4.2 tls #define TPS65217PMIC_PPATH_IAC_RSHFIT 2 55 1.5.4.2 tls #define TPS65217PMIC_PPATH_IAC_100MA 0 56 1.5.4.2 tls #define TPS65217PMIC_PPATH_IAC_500MA 1 57 1.5.4.2 tls #define TPS65217PMIC_PPATH_IAC_1300MA 2 58 1.5.4.2 tls #define TPS65217PMIC_PPATH_IAC_2500MA 3 59 1.5.4.2 tls #define TPS65217PMIC_PPATH_USB_EN __BIT(4) 60 1.5.4.2 tls #define TPS65217PMIC_PPATH_AC_EN __BIT(5) 61 1.5.4.2 tls 62 1.5.4.3 tls #define TPS65217PMIC_INT 0x02 63 1.5.4.3 tls #define TPS65217PMIC_INT_USBI __BIT(0) 64 1.5.4.3 tls #define TPS65217PMIC_INT_ACI __BIT(1) 65 1.5.4.3 tls #define TPS65217PMIC_INT_PBI __BIT(2) 66 1.5.4.3 tls #define TPS65217PMIC_INT_USBM __BIT(4) 67 1.5.4.3 tls #define TPS65217PMIC_INT_ACM __BIT(5) 68 1.5.4.3 tls #define TPS65217PMIC_INT_PBM __BIT(6) 69 1.5.4.3 tls 70 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL1 0x07 71 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL1_FDIM __BITS(1,0) 72 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL1_FDIM_100Hz 0 73 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL1_FDIM_200Hz 1 74 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL1_FDIM_500Hz 2 75 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL1_FDIM_1000Hz 3 76 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL1_ISEL __BIT(2) 77 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL1_ISINK_EN __BIT(3) 78 1.5.4.2 tls 79 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL2 0x08 80 1.5.4.2 tls #define TPS65217PMIC_WLEDCTRL2_DUTY __BITS(6,0) 81 1.5.4.2 tls 82 1.5.4.2 tls #define TPS65217PMIC_STATUS 0x0A 83 1.5.4.2 tls #define TPS65217PMIC_STATUS_USBPWR __BIT(2) 84 1.5.4.2 tls #define TPS65217PMIC_STATUS_ACPWR __BIT(3) 85 1.5.4.2 tls 86 1.5.4.3 tls #define TPS65217PMIC_PASSWORD 0x0B 87 1.5.4.3 tls #define TPS65217PMIC_PASSWORD_XOR 0x7d 88 1.5.4.3 tls 89 1.5.4.2 tls #define TPS65217PMIC_PGOOD 0x0C 90 1.5.4.2 tls #define TPS65217PMIC_PGOOD_LDO3PG __BIT(0) 91 1.5.4.2 tls #define TPS65217PMIC_PGOOD_LDO4PG __BIT(1) 92 1.5.4.2 tls #define TPS65217PMIC_PGOOD_DC1PG __BIT(2) 93 1.5.4.2 tls #define TPS65217PMIC_PGOOD_DC2PG __BIT(3) 94 1.5.4.2 tls #define TPS65217PMIC_PGOOD_DC3PG __BIT(4) 95 1.5.4.2 tls #define TPS65217PMIC_PGOOD_LDO1PG __BIT(5) 96 1.5.4.2 tls #define TPS65217PMIC_PGOOD_LDO2PG __BIT(6) 97 1.5.4.2 tls 98 1.5.4.3 tls #define TPS65217PMIC_DEFSLEW 0x11 99 1.5.4.3 tls #define TPS65217PMIC_DEFSLEW_GO __BIT(7) 100 1.5.4.3 tls 101 1.5.4.2 tls #define TPS65217PMIC_DEFLDO1 0x12 102 1.5.4.2 tls #define TPS65217PMIC_DEFLDO2 0x13 103 1.5.4.2 tls #define TPS65217PMIC_DEFLDO3 0x14 104 1.5.4.2 tls #define TPS65217PMIC_DEFLDO4 0x15 105 1.5.4.2 tls #define TPS65217PMIC_DEFDCDC1 0x0E 106 1.5.4.2 tls #define TPS65217PMIC_DEFDCDC2 0x0F 107 1.5.4.2 tls #define TPS65217PMIC_DEFDCDC3 0x10 108 1.5.4.2 tls 109 1.5.4.2 tls #define TPS65217PMIC_DEFX_VOLTAGE_16 __BITS(0,3) 110 1.5.4.2 tls #define TPS65217PMIC_DEFX_VOLTAGE_32 __BITS(0,4) 111 1.5.4.2 tls #define TPS65217PMIC_DEFX_VOLTAGE_64 __BITS(0,5) 112 1.5.4.2 tls #define TPS65217PMIC_DEFX_TRACKING __BIT(6) 113 1.5.4.2 tls #define TPS65217PMIC_DEFX_XADJ __BIT(7) 114 1.5.4.2 tls #define TPS65217PMIC_DEFX_LS __BIT(5) 115 1.5.4.2 tls 116 1.5.4.2 tls #define TPS65217PMIC_ENABLE 0x16 117 1.5.4.2 tls #define TPS65217PMIC_ENABLE_LDO2 __BIT(0) 118 1.5.4.2 tls #define TPS65217PMIC_ENABLE_LDO1 __BIT(1) 119 1.5.4.2 tls #define TPS65217PMIC_ENABLE_DCDC3 __BIT(2) 120 1.5.4.2 tls #define TPS65217PMIC_ENABLE_DCDC2 __BIT(3) 121 1.5.4.2 tls #define TPS65217PMIC_ENABLE_DCDC1 __BIT(4) 122 1.5.4.2 tls #define TPS65217PMIC_ENABLE_LDO4 __BIT(5) 123 1.5.4.2 tls #define TPS65217PMIC_ENABLE_LDO3 __BIT(6) 124 1.5.4.2 tls 125 1.5.4.2 tls #endif /* _TPS65217PMICREG_H_ */ 126
Indexes created Mon Oct 27 08:10:08 GMT 2025