iop.c revision 1.10.2.2 1 1.10.2.2 nathanw /* $NetBSD: iop.c,v 1.10.2.2 2001/04/09 01:56:00 nathanw Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.10.2.2 nathanw * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.1 ad * by Andrew Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad * 3. All advertising materials mentioning features or use of this software
19 1.1 ad * must display the following acknowledgement:
20 1.1 ad * This product includes software developed by the NetBSD
21 1.1 ad * Foundation, Inc. and its contributors.
22 1.1 ad * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 ad * contributors may be used to endorse or promote products derived
24 1.1 ad * from this software without specific prior written permission.
25 1.1 ad *
26 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
37 1.1 ad */
38 1.1 ad
39 1.1 ad /*
40 1.1 ad * Support for I2O IOPs (intelligent I/O processors).
41 1.1 ad */
42 1.1 ad
43 1.1 ad #include "opt_i2o.h"
44 1.5 ad #include "iop.h"
45 1.1 ad
46 1.1 ad #include <sys/param.h>
47 1.1 ad #include <sys/systm.h>
48 1.1 ad #include <sys/kernel.h>
49 1.1 ad #include <sys/device.h>
50 1.1 ad #include <sys/queue.h>
51 1.1 ad #include <sys/proc.h>
52 1.1 ad #include <sys/malloc.h>
53 1.1 ad #include <sys/ioctl.h>
54 1.1 ad #include <sys/endian.h>
55 1.5 ad #include <sys/conf.h>
56 1.5 ad #include <sys/kthread.h>
57 1.1 ad
58 1.4 thorpej #include <uvm/uvm_extern.h>
59 1.4 thorpej
60 1.1 ad #include <machine/bus.h>
61 1.1 ad
62 1.1 ad #include <dev/i2o/i2o.h>
63 1.10.2.2 nathanw #include <dev/i2o/iopio.h>
64 1.1 ad #include <dev/i2o/iopreg.h>
65 1.1 ad #include <dev/i2o/iopvar.h>
66 1.1 ad
67 1.1 ad #define POLL(ms, cond) \
68 1.1 ad do { \
69 1.1 ad int i; \
70 1.1 ad for (i = (ms) * 10; i; i--) { \
71 1.1 ad if (cond) \
72 1.1 ad break; \
73 1.1 ad DELAY(100); \
74 1.1 ad } \
75 1.1 ad } while (/* CONSTCOND */0);
76 1.1 ad
77 1.1 ad #ifdef I2ODEBUG
78 1.1 ad #define DPRINTF(x) printf x
79 1.1 ad #else
80 1.1 ad #define DPRINTF(x)
81 1.1 ad #endif
82 1.1 ad
83 1.1 ad #ifdef I2OVERBOSE
84 1.5 ad #define IFVERBOSE(x) x
85 1.10.2.2 nathanw #define COMMENT(x) NULL
86 1.1 ad #else
87 1.1 ad #define IFVERBOSE(x)
88 1.10.2.2 nathanw #define COMMENT(x)
89 1.1 ad #endif
90 1.1 ad
91 1.5 ad #define IOP_ICTXHASH_NBUCKETS 16
92 1.5 ad #define IOP_ICTXHASH(ictx) (&iop_ictxhashtbl[(ictx) & iop_ictxhash])
93 1.10.2.2 nathanw
94 1.10.2.2 nathanw #define IOP_MAX_SEGS (((IOP_MAX_XFER + PAGE_SIZE - 1) / PAGE_SIZE) + 1)
95 1.10.2.2 nathanw
96 1.10.2.2 nathanw #define IOP_TCTX_SHIFT 12
97 1.10.2.2 nathanw #define IOP_TCTX_MASK ((1 << IOP_TCTX_SHIFT) - 1)
98 1.5 ad
99 1.5 ad static LIST_HEAD(, iop_initiator) *iop_ictxhashtbl;
100 1.5 ad static u_long iop_ictxhash;
101 1.1 ad static void *iop_sdh;
102 1.5 ad static struct i2o_systab *iop_systab;
103 1.5 ad static int iop_systab_size;
104 1.1 ad
105 1.1 ad extern struct cfdriver iop_cd;
106 1.1 ad
107 1.5 ad #define IC_CONFIGURE 0x01
108 1.10.2.2 nathanw #define IC_PRIORITY 0x02
109 1.1 ad
110 1.1 ad struct iop_class {
111 1.5 ad u_short ic_class;
112 1.5 ad u_short ic_flags;
113 1.10.2.2 nathanw #ifdef I2OVERBOSE
114 1.1 ad const char *ic_caption;
115 1.10.2.2 nathanw #endif
116 1.1 ad } static const iop_class[] = {
117 1.1 ad {
118 1.1 ad I2O_CLASS_EXECUTIVE,
119 1.1 ad 0,
120 1.5 ad COMMENT("executive")
121 1.1 ad },
122 1.1 ad {
123 1.1 ad I2O_CLASS_DDM,
124 1.1 ad 0,
125 1.5 ad COMMENT("device driver module")
126 1.1 ad },
127 1.1 ad {
128 1.1 ad I2O_CLASS_RANDOM_BLOCK_STORAGE,
129 1.10.2.2 nathanw IC_CONFIGURE | IC_PRIORITY,
130 1.1 ad IFVERBOSE("random block storage")
131 1.1 ad },
132 1.1 ad {
133 1.1 ad I2O_CLASS_SEQUENTIAL_STORAGE,
134 1.10.2.2 nathanw IC_CONFIGURE | IC_PRIORITY,
135 1.1 ad IFVERBOSE("sequential storage")
136 1.1 ad },
137 1.1 ad {
138 1.1 ad I2O_CLASS_LAN,
139 1.10.2.2 nathanw IC_CONFIGURE | IC_PRIORITY,
140 1.1 ad IFVERBOSE("LAN port")
141 1.1 ad },
142 1.1 ad {
143 1.1 ad I2O_CLASS_WAN,
144 1.10.2.2 nathanw IC_CONFIGURE | IC_PRIORITY,
145 1.1 ad IFVERBOSE("WAN port")
146 1.1 ad },
147 1.1 ad {
148 1.1 ad I2O_CLASS_FIBRE_CHANNEL_PORT,
149 1.1 ad IC_CONFIGURE,
150 1.1 ad IFVERBOSE("fibrechannel port")
151 1.1 ad },
152 1.1 ad {
153 1.1 ad I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL,
154 1.1 ad 0,
155 1.5 ad COMMENT("fibrechannel peripheral")
156 1.1 ad },
157 1.1 ad {
158 1.1 ad I2O_CLASS_SCSI_PERIPHERAL,
159 1.1 ad 0,
160 1.5 ad COMMENT("SCSI peripheral")
161 1.1 ad },
162 1.1 ad {
163 1.1 ad I2O_CLASS_ATE_PORT,
164 1.1 ad IC_CONFIGURE,
165 1.1 ad IFVERBOSE("ATE port")
166 1.1 ad },
167 1.1 ad {
168 1.1 ad I2O_CLASS_ATE_PERIPHERAL,
169 1.1 ad 0,
170 1.5 ad COMMENT("ATE peripheral")
171 1.1 ad },
172 1.1 ad {
173 1.1 ad I2O_CLASS_FLOPPY_CONTROLLER,
174 1.1 ad IC_CONFIGURE,
175 1.1 ad IFVERBOSE("floppy controller")
176 1.1 ad },
177 1.1 ad {
178 1.1 ad I2O_CLASS_FLOPPY_DEVICE,
179 1.1 ad 0,
180 1.5 ad COMMENT("floppy device")
181 1.1 ad },
182 1.1 ad {
183 1.1 ad I2O_CLASS_BUS_ADAPTER_PORT,
184 1.1 ad IC_CONFIGURE,
185 1.1 ad IFVERBOSE("bus adapter port" )
186 1.1 ad },
187 1.1 ad };
188 1.1 ad
189 1.1 ad #if defined(I2ODEBUG) && defined(I2OVERBOSE)
190 1.10.2.2 nathanw static const char * const iop_status[] = {
191 1.1 ad "success",
192 1.1 ad "abort (dirty)",
193 1.1 ad "abort (no data transfer)",
194 1.1 ad "abort (partial transfer)",
195 1.1 ad "error (dirty)",
196 1.1 ad "error (no data transfer)",
197 1.1 ad "error (partial transfer)",
198 1.1 ad "undefined error code",
199 1.1 ad "process abort (dirty)",
200 1.1 ad "process abort (no data transfer)",
201 1.1 ad "process abort (partial transfer)",
202 1.1 ad "transaction error",
203 1.1 ad };
204 1.1 ad #endif
205 1.1 ad
206 1.5 ad static inline u_int32_t iop_inl(struct iop_softc *, int);
207 1.5 ad static inline void iop_outl(struct iop_softc *, int, u_int32_t);
208 1.5 ad
209 1.1 ad static void iop_config_interrupts(struct device *);
210 1.10.2.2 nathanw static void iop_configure_devices(struct iop_softc *, int, int);
211 1.1 ad static void iop_devinfo(int, char *);
212 1.1 ad static int iop_print(void *, const char *);
213 1.10.2.2 nathanw static int iop_reconfigure(struct iop_softc *, u_int);
214 1.1 ad static void iop_shutdown(void *);
215 1.1 ad static int iop_submatch(struct device *, struct cfdata *, void *);
216 1.5 ad #ifdef notyet
217 1.1 ad static int iop_vendor_print(void *, const char *);
218 1.5 ad #endif
219 1.1 ad
220 1.10.2.2 nathanw static void iop_adjqparam(struct iop_softc *, int);
221 1.9 ad static void iop_create_reconf_thread(void *);
222 1.10.2.2 nathanw static int iop_handle_reply(struct iop_softc *, u_int32_t);
223 1.1 ad static int iop_hrt_get(struct iop_softc *);
224 1.1 ad static int iop_hrt_get0(struct iop_softc *, struct i2o_hrt *, int);
225 1.10.2.2 nathanw static void iop_intr_event(struct device *, struct iop_msg *, void *);
226 1.5 ad static int iop_lct_get0(struct iop_softc *, struct i2o_lct *, int,
227 1.5 ad u_int32_t);
228 1.10.2.2 nathanw static void iop_msg_poll(struct iop_softc *, struct iop_msg *, int);
229 1.10.2.2 nathanw static void iop_msg_wait(struct iop_softc *, struct iop_msg *, int);
230 1.1 ad static int iop_ofifo_init(struct iop_softc *);
231 1.10.2.2 nathanw static int iop_passthrough(struct iop_softc *, struct ioppt *);
232 1.10.2.2 nathanw static int iop_post(struct iop_softc *, u_int32_t *);
233 1.9 ad static void iop_reconf_thread(void *);
234 1.1 ad static void iop_release_mfa(struct iop_softc *, u_int32_t);
235 1.1 ad static int iop_reset(struct iop_softc *);
236 1.10.2.2 nathanw static int iop_status_get(struct iop_softc *, int);
237 1.1 ad static int iop_systab_set(struct iop_softc *);
238 1.10.2.2 nathanw static void iop_tfn_print(struct iop_softc *, struct i2o_fault_notify *);
239 1.1 ad
240 1.1 ad #ifdef I2ODEBUG
241 1.10.2.2 nathanw static void iop_reply_print(struct iop_softc *, struct i2o_reply *);
242 1.1 ad #endif
243 1.1 ad
244 1.5 ad cdev_decl(iop);
245 1.5 ad
246 1.5 ad static inline u_int32_t
247 1.5 ad iop_inl(struct iop_softc *sc, int off)
248 1.5 ad {
249 1.5 ad
250 1.5 ad bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4,
251 1.5 ad BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
252 1.5 ad return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off));
253 1.5 ad }
254 1.5 ad
255 1.5 ad static inline void
256 1.5 ad iop_outl(struct iop_softc *sc, int off, u_int32_t val)
257 1.5 ad {
258 1.5 ad
259 1.5 ad bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);
260 1.5 ad bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4,
261 1.5 ad BUS_SPACE_BARRIER_WRITE);
262 1.5 ad }
263 1.5 ad
264 1.1 ad /*
265 1.10.2.2 nathanw * Initialise the IOP and our interface.
266 1.1 ad */
267 1.5 ad void
268 1.1 ad iop_init(struct iop_softc *sc, const char *intrstr)
269 1.1 ad {
270 1.10.2.2 nathanw struct iop_msg *im;
271 1.10.2.2 nathanw int rv, i;
272 1.1 ad u_int32_t mask;
273 1.1 ad char ident[64];
274 1.1 ad
275 1.10.2.2 nathanw if (iop_ictxhashtbl == NULL)
276 1.5 ad iop_ictxhashtbl = hashinit(IOP_ICTXHASH_NBUCKETS, HASH_LIST,
277 1.5 ad M_DEVBUF, M_NOWAIT, &iop_ictxhash);
278 1.1 ad
279 1.5 ad /* Reset the IOP and request status. */
280 1.1 ad printf("I2O adapter");
281 1.5 ad
282 1.5 ad if ((rv = iop_reset(sc)) != 0) {
283 1.5 ad printf("%s: not responding (reset)\n", sc->sc_dv.dv_xname);
284 1.5 ad return;
285 1.5 ad }
286 1.10.2.2 nathanw if ((rv = iop_status_get(sc, 1)) != 0) {
287 1.5 ad printf("%s: not responding (get status)\n", sc->sc_dv.dv_xname);
288 1.5 ad return;
289 1.1 ad }
290 1.5 ad sc->sc_flags |= IOP_HAVESTATUS;
291 1.5 ad iop_strvis(sc, sc->sc_status.productid, sizeof(sc->sc_status.productid),
292 1.1 ad ident, sizeof(ident));
293 1.5 ad printf(" <%s>\n", ident);
294 1.5 ad
295 1.5 ad #ifdef I2ODEBUG
296 1.5 ad printf("%s: orgid=0x%04x version=%d\n", sc->sc_dv.dv_xname,
297 1.5 ad le16toh(sc->sc_status.orgid),
298 1.5 ad (le32toh(sc->sc_status.segnumber) >> 12) & 15);
299 1.5 ad printf("%s: type want have cbase\n", sc->sc_dv.dv_xname);
300 1.5 ad printf("%s: mem %04x %04x %08x\n", sc->sc_dv.dv_xname,
301 1.5 ad le32toh(sc->sc_status.desiredprivmemsize),
302 1.5 ad le32toh(sc->sc_status.currentprivmemsize),
303 1.5 ad le32toh(sc->sc_status.currentprivmembase));
304 1.5 ad printf("%s: i/o %04x %04x %08x\n", sc->sc_dv.dv_xname,
305 1.5 ad le32toh(sc->sc_status.desiredpriviosize),
306 1.5 ad le32toh(sc->sc_status.currentpriviosize),
307 1.5 ad le32toh(sc->sc_status.currentpriviobase));
308 1.5 ad #endif
309 1.1 ad
310 1.10.2.2 nathanw sc->sc_maxob = le32toh(sc->sc_status.maxoutboundmframes);
311 1.10.2.2 nathanw if (sc->sc_maxob > IOP_MAX_OUTBOUND)
312 1.10.2.2 nathanw sc->sc_maxob = IOP_MAX_OUTBOUND;
313 1.10.2.2 nathanw sc->sc_maxib = le32toh(sc->sc_status.maxinboundmframes);
314 1.10.2.2 nathanw if (sc->sc_maxib > IOP_MAX_INBOUND)
315 1.10.2.2 nathanw sc->sc_maxib = IOP_MAX_INBOUND;
316 1.10.2.2 nathanw
317 1.10.2.2 nathanw /* Allocate message wrappers. */
318 1.10.2.2 nathanw im = malloc(sizeof(*im) * sc->sc_maxib, M_DEVBUF, M_NOWAIT);
319 1.10.2.2 nathanw memset(im, 0, sizeof(*im) * sc->sc_maxib);
320 1.10.2.2 nathanw sc->sc_ims = im;
321 1.10.2.2 nathanw SLIST_INIT(&sc->sc_im_freelist);
322 1.10.2.2 nathanw
323 1.10.2.2 nathanw for (i = 0; i < sc->sc_maxib; i++, im++) {
324 1.10.2.2 nathanw rv = bus_dmamap_create(sc->sc_dmat, IOP_MAX_XFER,
325 1.10.2.2 nathanw IOP_MAX_SEGS, IOP_MAX_XFER, 0,
326 1.10.2.2 nathanw BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
327 1.10.2.2 nathanw &im->im_xfer[0].ix_map);
328 1.10.2.2 nathanw if (rv != 0) {
329 1.10.2.2 nathanw printf("%s: couldn't create dmamap (%d)",
330 1.10.2.2 nathanw sc->sc_dv.dv_xname, rv);
331 1.10.2.2 nathanw return;
332 1.10.2.2 nathanw }
333 1.10.2.2 nathanw
334 1.10.2.2 nathanw im->im_tctx = i;
335 1.10.2.2 nathanw SLIST_INSERT_HEAD(&sc->sc_im_freelist, im, im_chain);
336 1.10.2.2 nathanw }
337 1.1 ad
338 1.10.2.2 nathanw /* Initalise the IOP's outbound FIFO. */
339 1.5 ad if (iop_ofifo_init(sc) != 0) {
340 1.5 ad printf("%s: unable to init oubound FIFO\n", sc->sc_dv.dv_xname);
341 1.5 ad return;
342 1.5 ad }
343 1.1 ad
344 1.5 ad /*
345 1.5 ad * Defer further configuration until (a) interrupts are working and
346 1.5 ad * (b) we have enough information to build the system table.
347 1.5 ad */
348 1.1 ad config_interrupts((struct device *)sc, iop_config_interrupts);
349 1.1 ad
350 1.5 ad /* Configure shutdown hook before we start any device activity. */
351 1.1 ad if (iop_sdh == NULL)
352 1.1 ad iop_sdh = shutdownhook_establish(iop_shutdown, NULL);
353 1.1 ad
354 1.1 ad /* Ensure interrupts are enabled at the IOP. */
355 1.5 ad mask = iop_inl(sc, IOP_REG_INTR_MASK);
356 1.5 ad iop_outl(sc, IOP_REG_INTR_MASK, mask & ~IOP_INTR_OFIFO);
357 1.1 ad
358 1.1 ad if (intrstr != NULL)
359 1.1 ad printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname,
360 1.1 ad intrstr);
361 1.1 ad
362 1.1 ad #ifdef I2ODEBUG
363 1.1 ad printf("%s: queue depths: inbound %d/%d, outbound %d/%d\n",
364 1.10.2.2 nathanw sc->sc_dv.dv_xname, sc->sc_maxib,
365 1.10.2.2 nathanw le32toh(sc->sc_status.maxinboundmframes),
366 1.10.2.2 nathanw sc->sc_maxob, le32toh(sc->sc_status.maxoutboundmframes));
367 1.1 ad #endif
368 1.1 ad
369 1.5 ad lockinit(&sc->sc_conflock, PRIBIO, "iopconf", hz * 30, 0);
370 1.1 ad }
371 1.1 ad
372 1.1 ad /*
373 1.5 ad * Perform autoconfiguration tasks.
374 1.1 ad */
375 1.1 ad static void
376 1.1 ad iop_config_interrupts(struct device *self)
377 1.1 ad {
378 1.5 ad struct iop_softc *sc, *iop;
379 1.5 ad struct i2o_systab_entry *ste;
380 1.5 ad int rv, i, niop;
381 1.1 ad
382 1.1 ad sc = (struct iop_softc *)self;
383 1.5 ad LIST_INIT(&sc->sc_iilist);
384 1.5 ad
385 1.5 ad printf("%s: configuring...\n", sc->sc_dv.dv_xname);
386 1.1 ad
387 1.5 ad if (iop_hrt_get(sc) != 0) {
388 1.5 ad printf("%s: unable to retrieve HRT\n", sc->sc_dv.dv_xname);
389 1.5 ad return;
390 1.5 ad }
391 1.1 ad
392 1.5 ad /*
393 1.5 ad * Build the system table.
394 1.5 ad */
395 1.5 ad if (iop_systab == NULL) {
396 1.5 ad for (i = 0, niop = 0; i < iop_cd.cd_ndevs; i++) {
397 1.5 ad if ((iop = device_lookup(&iop_cd, i)) == NULL)
398 1.5 ad continue;
399 1.5 ad if ((iop->sc_flags & IOP_HAVESTATUS) == 0)
400 1.5 ad continue;
401 1.10.2.2 nathanw if (iop_status_get(iop, 1) != 0) {
402 1.5 ad printf("%s: unable to retrieve status\n",
403 1.5 ad sc->sc_dv.dv_xname);
404 1.5 ad iop->sc_flags &= ~IOP_HAVESTATUS;
405 1.5 ad continue;
406 1.5 ad }
407 1.5 ad niop++;
408 1.5 ad }
409 1.5 ad if (niop == 0)
410 1.5 ad return;
411 1.5 ad
412 1.5 ad i = sizeof(struct i2o_systab_entry) * (niop - 1) +
413 1.5 ad sizeof(struct i2o_systab);
414 1.5 ad iop_systab_size = i;
415 1.5 ad iop_systab = malloc(i, M_DEVBUF, M_NOWAIT);
416 1.5 ad
417 1.5 ad memset(iop_systab, 0, i);
418 1.5 ad iop_systab->numentries = niop;
419 1.5 ad iop_systab->version = I2O_VERSION_11;
420 1.5 ad
421 1.5 ad for (i = 0, ste = iop_systab->entry; i < iop_cd.cd_ndevs; i++) {
422 1.5 ad if ((iop = device_lookup(&iop_cd, i)) == NULL)
423 1.5 ad continue;
424 1.5 ad if ((iop->sc_flags & IOP_HAVESTATUS) == 0)
425 1.5 ad continue;
426 1.5 ad
427 1.5 ad ste->orgid = iop->sc_status.orgid;
428 1.5 ad ste->iopid = iop->sc_dv.dv_unit + 2;
429 1.5 ad ste->segnumber =
430 1.5 ad htole32(le32toh(iop->sc_status.segnumber) & ~4095);
431 1.5 ad ste->iopcaps = iop->sc_status.iopcaps;
432 1.5 ad ste->inboundmsgframesize =
433 1.5 ad iop->sc_status.inboundmframesize;
434 1.5 ad ste->inboundmsgportaddresslow =
435 1.5 ad htole32(iop->sc_memaddr + IOP_REG_IFIFO);
436 1.5 ad ste++;
437 1.5 ad }
438 1.5 ad }
439 1.5 ad
440 1.10.2.2 nathanw /*
441 1.10.2.2 nathanw * Post the system table to the IOP and bring it to the OPERATIONAL
442 1.10.2.2 nathanw * state.
443 1.10.2.2 nathanw */
444 1.5 ad if (iop_systab_set(sc) != 0) {
445 1.5 ad printf("%s: unable to set system table\n", sc->sc_dv.dv_xname);
446 1.5 ad return;
447 1.5 ad }
448 1.5 ad if (iop_simple_cmd(sc, I2O_TID_IOP, I2O_EXEC_SYS_ENABLE, IOP_ICTX, 1,
449 1.10.2.2 nathanw 30000) != 0) {
450 1.5 ad printf("%s: unable to enable system\n", sc->sc_dv.dv_xname);
451 1.5 ad return;
452 1.5 ad }
453 1.5 ad
454 1.5 ad /*
455 1.5 ad * Set up an event handler for this IOP.
456 1.5 ad */
457 1.5 ad sc->sc_eventii.ii_dv = self;
458 1.5 ad sc->sc_eventii.ii_intr = iop_intr_event;
459 1.5 ad sc->sc_eventii.ii_flags = II_DISCARD | II_UTILITY;
460 1.5 ad sc->sc_eventii.ii_tid = I2O_TID_IOP;
461 1.10.2.2 nathanw iop_initiator_register(sc, &sc->sc_eventii);
462 1.10.2.2 nathanw
463 1.10.2.2 nathanw rv = iop_util_eventreg(sc, &sc->sc_eventii,
464 1.10.2.2 nathanw I2O_EVENT_EXEC_RESOURCE_LIMITS |
465 1.10.2.2 nathanw I2O_EVENT_EXEC_CONNECTION_FAIL |
466 1.10.2.2 nathanw I2O_EVENT_EXEC_ADAPTER_FAULT |
467 1.10.2.2 nathanw I2O_EVENT_EXEC_POWER_FAIL |
468 1.10.2.2 nathanw I2O_EVENT_EXEC_RESET_PENDING |
469 1.10.2.2 nathanw I2O_EVENT_EXEC_RESET_IMMINENT |
470 1.10.2.2 nathanw I2O_EVENT_EXEC_HARDWARE_FAIL |
471 1.10.2.2 nathanw I2O_EVENT_EXEC_XCT_CHANGE |
472 1.10.2.2 nathanw I2O_EVENT_EXEC_DDM_AVAILIBILITY |
473 1.10.2.2 nathanw I2O_EVENT_GEN_DEVICE_RESET |
474 1.10.2.2 nathanw I2O_EVENT_GEN_STATE_CHANGE |
475 1.10.2.2 nathanw I2O_EVENT_GEN_GENERAL_WARNING);
476 1.10.2.2 nathanw if (rv != 0) {
477 1.5 ad printf("%s: unable to register for events", sc->sc_dv.dv_xname);
478 1.5 ad return;
479 1.5 ad }
480 1.5 ad
481 1.5 ad #ifdef notyet
482 1.1 ad /* Attempt to match and attach a product-specific extension. */
483 1.1 ad ia.ia_class = I2O_CLASS_ANY;
484 1.1 ad ia.ia_tid = I2O_TID_IOP;
485 1.1 ad config_found_sm(self, &ia, iop_vendor_print, iop_submatch);
486 1.5 ad #endif
487 1.5 ad
488 1.10.2.2 nathanw lockmgr(&sc->sc_conflock, LK_EXCLUSIVE, NULL);
489 1.10.2.2 nathanw if ((rv = iop_reconfigure(sc, 0)) == -1) {
490 1.5 ad printf("%s: configure failed (%d)\n", sc->sc_dv.dv_xname, rv);
491 1.5 ad return;
492 1.5 ad }
493 1.10.2.2 nathanw lockmgr(&sc->sc_conflock, LK_RELEASE, NULL);
494 1.5 ad
495 1.9 ad kthread_create(iop_create_reconf_thread, sc);
496 1.9 ad }
497 1.9 ad
498 1.9 ad /*
499 1.9 ad * Create the reconfiguration thread. Called after the standard kernel
500 1.9 ad * threads have been created.
501 1.9 ad */
502 1.9 ad static void
503 1.9 ad iop_create_reconf_thread(void *cookie)
504 1.9 ad {
505 1.9 ad struct iop_softc *sc;
506 1.9 ad int rv;
507 1.9 ad
508 1.9 ad sc = cookie;
509 1.5 ad sc->sc_flags |= IOP_ONLINE;
510 1.10.2.2 nathanw
511 1.9 ad rv = kthread_create1(iop_reconf_thread, sc, &sc->sc_reconf_proc,
512 1.10.2.2 nathanw "%s", sc->sc_dv.dv_xname);
513 1.10.2.2 nathanw if (rv != 0) {
514 1.9 ad printf("%s: unable to create reconfiguration thread (%d)",
515 1.10.2.2 nathanw sc->sc_dv.dv_xname, rv);
516 1.10.2.2 nathanw return;
517 1.10.2.2 nathanw }
518 1.5 ad }
519 1.5 ad
520 1.5 ad /*
521 1.5 ad * Reconfiguration thread; listens for LCT change notification, and
522 1.5 ad * initiates re-configuration if recieved.
523 1.5 ad */
524 1.5 ad static void
525 1.9 ad iop_reconf_thread(void *cookie)
526 1.5 ad {
527 1.5 ad struct iop_softc *sc;
528 1.10.2.2 nathanw struct lwp *l;
529 1.5 ad struct i2o_lct lct;
530 1.5 ad u_int32_t chgind;
531 1.10.2.2 nathanw int rv;
532 1.5 ad
533 1.5 ad sc = cookie;
534 1.10.2.2 nathanw chgind = sc->sc_chgind + 1;
535 1.10.2.2 nathanw l = curproc;
536 1.5 ad
537 1.5 ad for (;;) {
538 1.10.2.2 nathanw DPRINTF(("%s: async reconfig: requested 0x%08x\n",
539 1.10.2.2 nathanw sc->sc_dv.dv_xname, chgind));
540 1.5 ad
541 1.10.2.2 nathanw PHOLD(l);
542 1.10.2.2 nathanw rv = iop_lct_get0(sc, &lct, sizeof(lct), chgind);
543 1.10.2.2 nathanw PRELE(l);
544 1.10.2.2 nathanw
545 1.10.2.2 nathanw DPRINTF(("%s: async reconfig: notified (0x%08x, %d)\n",
546 1.10.2.2 nathanw sc->sc_dv.dv_xname, le32toh(lct.changeindicator), rv));
547 1.10.2.2 nathanw
548 1.10.2.2 nathanw if (rv == 0 &&
549 1.10.2.2 nathanw lockmgr(&sc->sc_conflock, LK_EXCLUSIVE, NULL) == 0) {
550 1.10.2.2 nathanw iop_reconfigure(sc, le32toh(lct.changeindicator));
551 1.10.2.2 nathanw chgind = sc->sc_chgind + 1;
552 1.10.2.2 nathanw lockmgr(&sc->sc_conflock, LK_RELEASE, NULL);
553 1.5 ad }
554 1.5 ad
555 1.9 ad tsleep(iop_reconf_thread, PWAIT, "iopzzz", hz * 5);
556 1.5 ad }
557 1.5 ad }
558 1.5 ad
559 1.5 ad /*
560 1.5 ad * Reconfigure: find new and removed devices.
561 1.5 ad */
562 1.5 ad static int
563 1.10.2.2 nathanw iop_reconfigure(struct iop_softc *sc, u_int chgind)
564 1.5 ad {
565 1.5 ad struct iop_msg *im;
566 1.10.2.2 nathanw struct i2o_hba_bus_scan mf;
567 1.5 ad struct i2o_lct_entry *le;
568 1.5 ad struct iop_initiator *ii, *nextii;
569 1.5 ad int rv, tid, i;
570 1.5 ad
571 1.1 ad /*
572 1.5 ad * If the reconfiguration request isn't the result of LCT change
573 1.5 ad * notification, then be more thorough: ask all bus ports to scan
574 1.5 ad * their busses. Wait up to 5 minutes for each bus port to complete
575 1.5 ad * the request.
576 1.1 ad */
577 1.5 ad if (chgind == 0) {
578 1.5 ad if ((rv = iop_lct_get(sc)) != 0) {
579 1.5 ad DPRINTF(("iop_reconfigure: unable to read LCT\n"));
580 1.10.2.2 nathanw return (rv);
581 1.5 ad }
582 1.5 ad
583 1.5 ad le = sc->sc_lct->entry;
584 1.5 ad for (i = 0; i < sc->sc_nlctent; i++, le++) {
585 1.5 ad if ((le16toh(le->classid) & 4095) !=
586 1.5 ad I2O_CLASS_BUS_ADAPTER_PORT)
587 1.5 ad continue;
588 1.5 ad tid = le32toh(le->localtid) & 4095;
589 1.5 ad
590 1.10.2.2 nathanw im = iop_msg_alloc(sc, NULL, IM_WAIT);
591 1.5 ad
592 1.10.2.2 nathanw mf.msgflags = I2O_MSGFLAGS(i2o_hba_bus_scan);
593 1.10.2.2 nathanw mf.msgfunc = I2O_MSGFUNC(tid, I2O_HBA_BUS_SCAN);
594 1.10.2.2 nathanw mf.msgictx = IOP_ICTX;
595 1.10.2.2 nathanw mf.msgtctx = im->im_tctx;
596 1.5 ad
597 1.5 ad DPRINTF(("%s: scanning bus %d\n", sc->sc_dv.dv_xname,
598 1.5 ad tid));
599 1.5 ad
600 1.10.2.2 nathanw rv = iop_msg_post(sc, im, &mf, 5*60*1000);
601 1.10.2.2 nathanw iop_msg_free(sc, im);
602 1.10.2.2 nathanw #ifdef I2ODEBUG
603 1.10.2.2 nathanw if (rv != 0)
604 1.10.2.2 nathanw printf("%s: bus scan failed\n",
605 1.10.2.2 nathanw sc->sc_dv.dv_xname);
606 1.10.2.2 nathanw #endif
607 1.5 ad }
608 1.10.2.2 nathanw } else if (chgind <= sc->sc_chgind) {
609 1.5 ad DPRINTF(("%s: LCT unchanged (async)\n", sc->sc_dv.dv_xname));
610 1.10.2.2 nathanw return (0);
611 1.5 ad }
612 1.5 ad
613 1.5 ad /* Re-read the LCT and determine if it has changed. */
614 1.5 ad if ((rv = iop_lct_get(sc)) != 0) {
615 1.5 ad DPRINTF(("iop_reconfigure: unable to re-read LCT\n"));
616 1.10.2.2 nathanw return (rv);
617 1.5 ad }
618 1.5 ad DPRINTF(("%s: %d LCT entries\n", sc->sc_dv.dv_xname, sc->sc_nlctent));
619 1.5 ad
620 1.10.2.2 nathanw chgind = le32toh(sc->sc_lct->changeindicator);
621 1.10.2.2 nathanw if (chgind == sc->sc_chgind) {
622 1.5 ad DPRINTF(("%s: LCT unchanged\n", sc->sc_dv.dv_xname));
623 1.10.2.2 nathanw return (0);
624 1.5 ad }
625 1.5 ad DPRINTF(("%s: LCT changed\n", sc->sc_dv.dv_xname));
626 1.10.2.2 nathanw sc->sc_chgind = chgind;
627 1.5 ad
628 1.5 ad if (sc->sc_tidmap != NULL)
629 1.5 ad free(sc->sc_tidmap, M_DEVBUF);
630 1.5 ad sc->sc_tidmap = malloc(sc->sc_nlctent * sizeof(struct iop_tidmap),
631 1.5 ad M_DEVBUF, M_NOWAIT);
632 1.10.2.2 nathanw memset(sc->sc_tidmap, 0, sizeof(sc->sc_tidmap));
633 1.5 ad
634 1.10.2.2 nathanw /* Allow 1 queued command per device while we're configuring. */
635 1.10.2.2 nathanw iop_adjqparam(sc, 1);
636 1.10.2.2 nathanw
637 1.10.2.2 nathanw /*
638 1.10.2.2 nathanw * Match and attach child devices. We configure high-level devices
639 1.10.2.2 nathanw * first so that any claims will propagate throughout the LCT,
640 1.10.2.2 nathanw * hopefully masking off aliased devices as a result.
641 1.10.2.2 nathanw *
642 1.10.2.2 nathanw * Re-reading the LCT at this point is a little dangerous, but we'll
643 1.10.2.2 nathanw * trust the IOP (and the operator) to behave itself...
644 1.10.2.2 nathanw */
645 1.10.2.2 nathanw iop_configure_devices(sc, IC_CONFIGURE | IC_PRIORITY,
646 1.10.2.2 nathanw IC_CONFIGURE | IC_PRIORITY);
647 1.10.2.2 nathanw if ((rv = iop_lct_get(sc)) != 0)
648 1.10.2.2 nathanw DPRINTF(("iop_reconfigure: unable to re-read LCT\n"));
649 1.10.2.2 nathanw iop_configure_devices(sc, IC_CONFIGURE | IC_PRIORITY,
650 1.10.2.2 nathanw IC_CONFIGURE);
651 1.5 ad
652 1.5 ad for (ii = LIST_FIRST(&sc->sc_iilist); ii != NULL; ii = nextii) {
653 1.10.2.2 nathanw nextii = LIST_NEXT(ii, ii_list);
654 1.5 ad
655 1.5 ad /* Detach devices that were configured, but are now gone. */
656 1.5 ad for (i = 0; i < sc->sc_nlctent; i++)
657 1.5 ad if (ii->ii_tid == sc->sc_tidmap[i].it_tid)
658 1.5 ad break;
659 1.5 ad if (i == sc->sc_nlctent ||
660 1.5 ad (sc->sc_tidmap[i].it_flags & IT_CONFIGURED) == 0)
661 1.5 ad config_detach(ii->ii_dv, DETACH_FORCE);
662 1.5 ad
663 1.5 ad /*
664 1.5 ad * Tell initiators that existed before the re-configuration
665 1.5 ad * to re-configure.
666 1.5 ad */
667 1.5 ad if (ii->ii_reconfig == NULL)
668 1.5 ad continue;
669 1.5 ad if ((rv = (*ii->ii_reconfig)(ii->ii_dv)) != 0)
670 1.5 ad printf("%s: %s failed reconfigure (%d)\n",
671 1.5 ad sc->sc_dv.dv_xname, ii->ii_dv->dv_xname, rv);
672 1.5 ad }
673 1.5 ad
674 1.10.2.2 nathanw /* Re-adjust queue parameters and return. */
675 1.10.2.2 nathanw if (sc->sc_nii != 0)
676 1.10.2.2 nathanw iop_adjqparam(sc, (sc->sc_maxib - sc->sc_nuii - IOP_MF_RESERVE)
677 1.10.2.2 nathanw / sc->sc_nii);
678 1.10.2.2 nathanw
679 1.10.2.2 nathanw return (0);
680 1.1 ad }
681 1.1 ad
682 1.1 ad /*
683 1.5 ad * Configure I2O devices into the system.
684 1.1 ad */
685 1.1 ad static void
686 1.10.2.2 nathanw iop_configure_devices(struct iop_softc *sc, int mask, int maskval)
687 1.1 ad {
688 1.1 ad struct iop_attach_args ia;
689 1.5 ad struct iop_initiator *ii;
690 1.1 ad const struct i2o_lct_entry *le;
691 1.9 ad struct device *dv;
692 1.8 ad int i, j, nent;
693 1.10.2.2 nathanw u_int usertid;
694 1.1 ad
695 1.1 ad nent = sc->sc_nlctent;
696 1.1 ad for (i = 0, le = sc->sc_lct->entry; i < nent; i++, le++) {
697 1.9 ad sc->sc_tidmap[i].it_tid = le32toh(le->localtid) & 4095;
698 1.9 ad
699 1.10.2.2 nathanw /* Ignore the device if it's in use. */
700 1.10.2.2 nathanw usertid = le32toh(le->usertid) & 4095;
701 1.10.2.2 nathanw if (usertid != I2O_TID_NONE && usertid != I2O_TID_HOST)
702 1.1 ad continue;
703 1.1 ad
704 1.1 ad ia.ia_class = le16toh(le->classid) & 4095;
705 1.9 ad ia.ia_tid = sc->sc_tidmap[i].it_tid;
706 1.8 ad
707 1.8 ad /* Ignore uninteresting devices. */
708 1.8 ad for (j = 0; j < sizeof(iop_class) / sizeof(iop_class[0]); j++)
709 1.8 ad if (iop_class[j].ic_class == ia.ia_class)
710 1.8 ad break;
711 1.8 ad if (j < sizeof(iop_class) / sizeof(iop_class[0]) &&
712 1.10.2.2 nathanw (iop_class[j].ic_flags & mask) != maskval)
713 1.8 ad continue;
714 1.1 ad
715 1.1 ad /*
716 1.5 ad * Try to configure the device only if it's not already
717 1.5 ad * configured.
718 1.1 ad */
719 1.7 ad LIST_FOREACH(ii, &sc->sc_iilist, ii_list) {
720 1.9 ad if (ia.ia_tid == ii->ii_tid) {
721 1.9 ad sc->sc_tidmap[i].it_flags |= IT_CONFIGURED;
722 1.9 ad strcpy(sc->sc_tidmap[i].it_dvname,
723 1.9 ad ii->ii_dv->dv_xname);
724 1.10.2.2 nathanw break;
725 1.9 ad }
726 1.7 ad }
727 1.5 ad if (ii != NULL)
728 1.5 ad continue;
729 1.5 ad
730 1.9 ad dv = config_found_sm(&sc->sc_dv, &ia, iop_print, iop_submatch);
731 1.9 ad if (dv != NULL) {
732 1.10.2.2 nathanw sc->sc_tidmap[i].it_flags |= IT_CONFIGURED;
733 1.9 ad strcpy(sc->sc_tidmap[i].it_dvname, dv->dv_xname);
734 1.9 ad }
735 1.1 ad }
736 1.1 ad }
737 1.1 ad
738 1.10.2.2 nathanw /*
739 1.10.2.2 nathanw * Adjust queue parameters for all child devices.
740 1.10.2.2 nathanw */
741 1.10.2.2 nathanw static void
742 1.10.2.2 nathanw iop_adjqparam(struct iop_softc *sc, int mpi)
743 1.10.2.2 nathanw {
744 1.10.2.2 nathanw struct iop_initiator *ii;
745 1.10.2.2 nathanw
746 1.10.2.2 nathanw LIST_FOREACH(ii, &sc->sc_iilist, ii_list)
747 1.10.2.2 nathanw if (ii->ii_adjqparam != NULL)
748 1.10.2.2 nathanw (*ii->ii_adjqparam)(ii->ii_dv, mpi);
749 1.10.2.2 nathanw }
750 1.10.2.2 nathanw
751 1.1 ad static void
752 1.1 ad iop_devinfo(int class, char *devinfo)
753 1.1 ad {
754 1.1 ad #ifdef I2OVERBOSE
755 1.1 ad int i;
756 1.1 ad
757 1.1 ad for (i = 0; i < sizeof(iop_class) / sizeof(iop_class[0]); i++)
758 1.1 ad if (class == iop_class[i].ic_class)
759 1.1 ad break;
760 1.1 ad
761 1.1 ad if (i == sizeof(iop_class) / sizeof(iop_class[0]))
762 1.1 ad sprintf(devinfo, "device (class 0x%x)", class);
763 1.1 ad else
764 1.1 ad strcpy(devinfo, iop_class[i].ic_caption);
765 1.1 ad #else
766 1.1 ad
767 1.1 ad sprintf(devinfo, "device (class 0x%x)", class);
768 1.1 ad #endif
769 1.1 ad }
770 1.1 ad
771 1.1 ad static int
772 1.1 ad iop_print(void *aux, const char *pnp)
773 1.1 ad {
774 1.1 ad struct iop_attach_args *ia;
775 1.1 ad char devinfo[256];
776 1.1 ad
777 1.1 ad ia = aux;
778 1.1 ad
779 1.1 ad if (pnp != NULL) {
780 1.1 ad iop_devinfo(ia->ia_class, devinfo);
781 1.1 ad printf("%s at %s", devinfo, pnp);
782 1.1 ad }
783 1.1 ad printf(" tid %d", ia->ia_tid);
784 1.1 ad return (UNCONF);
785 1.1 ad }
786 1.1 ad
787 1.5 ad #ifdef notyet
788 1.1 ad static int
789 1.1 ad iop_vendor_print(void *aux, const char *pnp)
790 1.1 ad {
791 1.1 ad
792 1.1 ad if (pnp != NULL)
793 1.1 ad printf("vendor specific extension at %s", pnp);
794 1.1 ad return (UNCONF);
795 1.1 ad }
796 1.5 ad #endif
797 1.1 ad
798 1.1 ad static int
799 1.1 ad iop_submatch(struct device *parent, struct cfdata *cf, void *aux)
800 1.1 ad {
801 1.1 ad struct iop_attach_args *ia;
802 1.1 ad
803 1.1 ad ia = aux;
804 1.1 ad
805 1.1 ad if (cf->iopcf_tid != IOPCF_TID_DEFAULT && cf->iopcf_tid != ia->ia_tid)
806 1.1 ad return (0);
807 1.1 ad
808 1.1 ad return ((*cf->cf_attach->ca_match)(parent, cf, aux));
809 1.1 ad }
810 1.1 ad
811 1.1 ad /*
812 1.1 ad * Shut down all configured IOPs.
813 1.1 ad */
814 1.1 ad static void
815 1.1 ad iop_shutdown(void *junk)
816 1.1 ad {
817 1.1 ad struct iop_softc *sc;
818 1.1 ad int i;
819 1.1 ad
820 1.10.2.2 nathanw printf("shutting down iop devices...");
821 1.1 ad
822 1.1 ad for (i = 0; i < iop_cd.cd_ndevs; i++) {
823 1.1 ad if ((sc = device_lookup(&iop_cd, i)) == NULL)
824 1.1 ad continue;
825 1.5 ad if ((sc->sc_flags & IOP_ONLINE) == 0)
826 1.5 ad continue;
827 1.5 ad iop_simple_cmd(sc, I2O_TID_IOP, I2O_EXEC_SYS_QUIESCE, IOP_ICTX,
828 1.5 ad 0, 5000);
829 1.5 ad iop_simple_cmd(sc, I2O_TID_IOP, I2O_EXEC_IOP_CLEAR, IOP_ICTX,
830 1.10.2.2 nathanw 0, 1000);
831 1.1 ad }
832 1.1 ad
833 1.1 ad /* Wait. Some boards could still be flushing, stupidly enough. */
834 1.1 ad delay(5000*1000);
835 1.10.2.2 nathanw printf(" done.\n");
836 1.1 ad }
837 1.1 ad
838 1.1 ad /*
839 1.10.2.2 nathanw * Retrieve IOP status.
840 1.1 ad */
841 1.1 ad static int
842 1.10.2.2 nathanw iop_status_get(struct iop_softc *sc, int nosleep)
843 1.1 ad {
844 1.10.2.2 nathanw struct i2o_exec_status_get mf;
845 1.10.2.2 nathanw int rv, i;
846 1.1 ad
847 1.10.2.2 nathanw mf.msgflags = I2O_MSGFLAGS(i2o_exec_status_get);
848 1.10.2.2 nathanw mf.msgfunc = I2O_MSGFUNC(I2O_TID_IOP, I2O_EXEC_STATUS_GET);
849 1.10.2.2 nathanw mf.reserved[0] = 0;
850 1.10.2.2 nathanw mf.reserved[1] = 0;
851 1.10.2.2 nathanw mf.reserved[2] = 0;
852 1.10.2.2 nathanw mf.reserved[3] = 0;
853 1.10.2.2 nathanw mf.addrlow = kvtop((caddr_t)&sc->sc_status); /* XXX */
854 1.10.2.2 nathanw mf.addrhigh = 0;
855 1.10.2.2 nathanw mf.length = sizeof(sc->sc_status);
856 1.1 ad
857 1.5 ad memset(&sc->sc_status, 0, sizeof(sc->sc_status));
858 1.1 ad
859 1.10.2.2 nathanw if ((rv = iop_post(sc, (u_int32_t *)&mf)) != 0)
860 1.1 ad return (rv);
861 1.1 ad
862 1.1 ad /* XXX */
863 1.10.2.2 nathanw for (i = 25; i != 0; i--) {
864 1.10.2.2 nathanw if (*((volatile u_char *)&sc->sc_status.syncbyte) == 0xff)
865 1.10.2.2 nathanw break;
866 1.10.2.2 nathanw if (nosleep)
867 1.10.2.2 nathanw DELAY(100*1000);
868 1.10.2.2 nathanw else
869 1.10.2.2 nathanw tsleep(iop_status_get, PWAIT, "iopstat", hz / 10);
870 1.10.2.2 nathanw }
871 1.1 ad
872 1.10.2.2 nathanw if (*((volatile u_char *)&sc->sc_status.syncbyte) != 0xff)
873 1.10.2.2 nathanw rv = EIO;
874 1.10.2.2 nathanw else
875 1.10.2.2 nathanw rv = 0;
876 1.10.2.2 nathanw return (rv);
877 1.1 ad }
878 1.1 ad
879 1.1 ad /*
880 1.10.2.2 nathanw * Initalize and populate the IOP's outbound FIFO.
881 1.1 ad */
882 1.1 ad static int
883 1.1 ad iop_ofifo_init(struct iop_softc *sc)
884 1.1 ad {
885 1.1 ad struct iop_msg *im;
886 1.1 ad volatile u_int32_t status;
887 1.1 ad bus_addr_t addr;
888 1.5 ad bus_dma_segment_t seg;
889 1.10.2.2 nathanw struct i2o_exec_outbound_init *mf;
890 1.5 ad int i, rseg, rv;
891 1.10.2.2 nathanw u_int32_t mb[IOP_MAX_MSG_SIZE / sizeof(u_int32_t)];
892 1.1 ad
893 1.10.2.2 nathanw im = iop_msg_alloc(sc, NULL, IM_POLL);
894 1.1 ad
895 1.10.2.2 nathanw mf = (struct i2o_exec_outbound_init *)mb;
896 1.10.2.2 nathanw mf->msgflags = I2O_MSGFLAGS(i2o_exec_outbound_init);
897 1.10.2.2 nathanw mf->msgfunc = I2O_MSGFUNC(I2O_TID_IOP, I2O_EXEC_OUTBOUND_INIT);
898 1.10.2.2 nathanw mf->msgictx = IOP_ICTX;
899 1.10.2.2 nathanw mf->msgtctx = im->im_tctx;
900 1.10.2.2 nathanw mf->pagesize = PAGE_SIZE;
901 1.10.2.2 nathanw mf->flags = IOP_INIT_CODE | ((IOP_MAX_MSG_SIZE >> 2) << 16);
902 1.1 ad
903 1.1 ad status = 0;
904 1.5 ad
905 1.5 ad /*
906 1.5 ad * The I2O spec says that there are two SGLs: one for the status
907 1.5 ad * word, and one for a list of discarded MFAs. It continues to say
908 1.5 ad * that if you don't want to get the list of MFAs, an IGNORE SGL is
909 1.10.2.2 nathanw * necessary; this isn't the case (and is in fact a bad thing).
910 1.5 ad */
911 1.10.2.2 nathanw iop_msg_map(sc, im, mb, (void *)&status, sizeof(status), 0);
912 1.10.2.2 nathanw if ((rv = iop_msg_post(sc, im, mb, 0)) != 0) {
913 1.10.2.2 nathanw iop_msg_free(sc, im);
914 1.1 ad return (rv);
915 1.1 ad }
916 1.1 ad iop_msg_unmap(sc, im);
917 1.10.2.2 nathanw iop_msg_free(sc, im);
918 1.1 ad
919 1.5 ad /* XXX */
920 1.5 ad POLL(5000, status == I2O_EXEC_OUTBOUND_INIT_COMPLETE);
921 1.5 ad if (status != I2O_EXEC_OUTBOUND_INIT_COMPLETE) {
922 1.5 ad printf("%s: outbound FIFO init failed\n", sc->sc_dv.dv_xname);
923 1.5 ad return (EIO);
924 1.1 ad }
925 1.1 ad
926 1.10.2.2 nathanw /* Allocate DMA safe memory for the reply frames. */
927 1.1 ad if (sc->sc_rep_phys == 0) {
928 1.10.2.2 nathanw sc->sc_rep_size = sc->sc_maxob * IOP_MAX_MSG_SIZE;
929 1.5 ad
930 1.5 ad rv = bus_dmamem_alloc(sc->sc_dmat, sc->sc_rep_size, PAGE_SIZE,
931 1.5 ad 0, &seg, 1, &rseg, BUS_DMA_NOWAIT);
932 1.5 ad if (rv != 0) {
933 1.5 ad printf("%s: dma alloc = %d\n", sc->sc_dv.dv_xname,
934 1.5 ad rv);
935 1.5 ad return (rv);
936 1.5 ad }
937 1.5 ad
938 1.5 ad rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, sc->sc_rep_size,
939 1.5 ad &sc->sc_rep, BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
940 1.5 ad if (rv != 0) {
941 1.5 ad printf("%s: dma map = %d\n", sc->sc_dv.dv_xname, rv);
942 1.5 ad return (rv);
943 1.5 ad }
944 1.5 ad
945 1.5 ad rv = bus_dmamap_create(sc->sc_dmat, sc->sc_rep_size, 1,
946 1.5 ad sc->sc_rep_size, 0, BUS_DMA_NOWAIT, &sc->sc_rep_dmamap);
947 1.5 ad if (rv != 0) {
948 1.5 ad printf("%s: dma create = %d\n", sc->sc_dv.dv_xname, rv);
949 1.5 ad return (rv);
950 1.5 ad }
951 1.5 ad
952 1.5 ad rv = bus_dmamap_load(sc->sc_dmat, sc->sc_rep_dmamap, sc->sc_rep,
953 1.5 ad sc->sc_rep_size, NULL, BUS_DMA_NOWAIT);
954 1.5 ad if (rv != 0) {
955 1.5 ad printf("%s: dma load = %d\n", sc->sc_dv.dv_xname, rv);
956 1.5 ad return (rv);
957 1.5 ad }
958 1.5 ad
959 1.5 ad sc->sc_rep_phys = sc->sc_rep_dmamap->dm_segs[0].ds_addr;
960 1.1 ad }
961 1.1 ad
962 1.1 ad /* Populate the outbound FIFO. */
963 1.10.2.2 nathanw for (i = sc->sc_maxob, addr = sc->sc_rep_phys; i != 0; i--) {
964 1.5 ad iop_outl(sc, IOP_REG_OFIFO, (u_int32_t)addr);
965 1.10.2.2 nathanw addr += IOP_MAX_MSG_SIZE;
966 1.1 ad }
967 1.1 ad
968 1.1 ad return (0);
969 1.1 ad }
970 1.1 ad
971 1.1 ad /*
972 1.1 ad * Read the specified number of bytes from the IOP's hardware resource table.
973 1.1 ad */
974 1.1 ad static int
975 1.1 ad iop_hrt_get0(struct iop_softc *sc, struct i2o_hrt *hrt, int size)
976 1.1 ad {
977 1.1 ad struct iop_msg *im;
978 1.1 ad int rv;
979 1.10.2.2 nathanw struct i2o_exec_hrt_get *mf;
980 1.10.2.2 nathanw u_int32_t mb[IOP_MAX_MSG_SIZE / sizeof(u_int32_t)];
981 1.1 ad
982 1.10.2.2 nathanw im = iop_msg_alloc(sc, NULL, IM_WAIT);
983 1.10.2.2 nathanw mf = (struct i2o_exec_hrt_get *)mb;
984 1.10.2.2 nathanw mf->msgflags = I2O_MSGFLAGS(i2o_exec_hrt_get);
985 1.10.2.2 nathanw mf->msgfunc = I2O_MSGFUNC(I2O_TID_IOP, I2O_EXEC_HRT_GET);
986 1.10.2.2 nathanw mf->msgictx = IOP_ICTX;
987 1.10.2.2 nathanw mf->msgtctx = im->im_tctx;
988 1.1 ad
989 1.10.2.2 nathanw iop_msg_map(sc, im, mb, hrt, size, 0);
990 1.10.2.2 nathanw rv = iop_msg_post(sc, im, mb, 30000);
991 1.1 ad iop_msg_unmap(sc, im);
992 1.10.2.2 nathanw iop_msg_free(sc, im);
993 1.1 ad return (rv);
994 1.1 ad }
995 1.1 ad
996 1.1 ad /*
997 1.5 ad * Read the IOP's hardware resource table.
998 1.1 ad */
999 1.1 ad static int
1000 1.1 ad iop_hrt_get(struct iop_softc *sc)
1001 1.1 ad {
1002 1.1 ad struct i2o_hrt hrthdr, *hrt;
1003 1.1 ad int size, rv;
1004 1.1 ad
1005 1.10.2.2 nathanw PHOLD(curproc);
1006 1.10.2.2 nathanw rv = iop_hrt_get0(sc, &hrthdr, sizeof(hrthdr));
1007 1.10.2.2 nathanw PRELE(curproc);
1008 1.10.2.2 nathanw if (rv != 0)
1009 1.1 ad return (rv);
1010 1.1 ad
1011 1.5 ad DPRINTF(("%s: %d hrt entries\n", sc->sc_dv.dv_xname,
1012 1.5 ad le16toh(hrthdr.numentries)));
1013 1.5 ad
1014 1.5 ad size = sizeof(struct i2o_hrt) +
1015 1.5 ad (htole32(hrthdr.numentries) - 1) * sizeof(struct i2o_hrt_entry);
1016 1.1 ad hrt = (struct i2o_hrt *)malloc(size, M_DEVBUF, M_NOWAIT);
1017 1.1 ad
1018 1.1 ad if ((rv = iop_hrt_get0(sc, hrt, size)) != 0) {
1019 1.1 ad free(hrt, M_DEVBUF);
1020 1.1 ad return (rv);
1021 1.1 ad }
1022 1.1 ad
1023 1.1 ad if (sc->sc_hrt != NULL)
1024 1.1 ad free(sc->sc_hrt, M_DEVBUF);
1025 1.1 ad sc->sc_hrt = hrt;
1026 1.1 ad return (0);
1027 1.1 ad }
1028 1.1 ad
1029 1.1 ad /*
1030 1.1 ad * Request the specified number of bytes from the IOP's logical
1031 1.5 ad * configuration table. If a change indicator is specified, this
1032 1.10.2.2 nathanw * is a verbatim notification request, so the caller is prepared
1033 1.5 ad * to wait indefinitely.
1034 1.1 ad */
1035 1.1 ad static int
1036 1.5 ad iop_lct_get0(struct iop_softc *sc, struct i2o_lct *lct, int size,
1037 1.5 ad u_int32_t chgind)
1038 1.1 ad {
1039 1.1 ad struct iop_msg *im;
1040 1.10.2.2 nathanw struct i2o_exec_lct_notify *mf;
1041 1.1 ad int rv;
1042 1.10.2.2 nathanw u_int32_t mb[IOP_MAX_MSG_SIZE / sizeof(u_int32_t)];
1043 1.1 ad
1044 1.10.2.2 nathanw im = iop_msg_alloc(sc, NULL, IM_WAIT);
1045 1.1 ad memset(lct, 0, size);
1046 1.1 ad
1047 1.10.2.2 nathanw mf = (struct i2o_exec_lct_notify *)mb;
1048 1.10.2.2 nathanw mf->msgflags = I2O_MSGFLAGS(i2o_exec_lct_notify);
1049 1.10.2.2 nathanw mf->msgfunc = I2O_MSGFUNC(I2O_TID_IOP, I2O_EXEC_LCT_NOTIFY);
1050 1.10.2.2 nathanw mf->msgictx = IOP_ICTX;
1051 1.10.2.2 nathanw mf->msgtctx = im->im_tctx;
1052 1.10.2.2 nathanw mf->classid = I2O_CLASS_ANY;
1053 1.10.2.2 nathanw mf->changeindicator = chgind;
1054 1.5 ad
1055 1.9 ad #ifdef I2ODEBUG
1056 1.9 ad printf("iop_lct_get0: reading LCT");
1057 1.9 ad if (chgind != 0)
1058 1.9 ad printf(" (async)");
1059 1.9 ad printf("\n");
1060 1.9 ad #endif
1061 1.1 ad
1062 1.10.2.2 nathanw iop_msg_map(sc, im, mb, lct, size, 0);
1063 1.10.2.2 nathanw rv = iop_msg_post(sc, im, mb, (chgind == 0 ? 120*1000 : 0));
1064 1.1 ad iop_msg_unmap(sc, im);
1065 1.10.2.2 nathanw iop_msg_free(sc, im);
1066 1.1 ad return (rv);
1067 1.1 ad }
1068 1.1 ad
1069 1.1 ad /*
1070 1.6 ad * Read the IOP's logical configuration table.
1071 1.1 ad */
1072 1.1 ad int
1073 1.1 ad iop_lct_get(struct iop_softc *sc)
1074 1.1 ad {
1075 1.5 ad int esize, size, rv;
1076 1.5 ad struct i2o_lct *lct;
1077 1.1 ad
1078 1.5 ad esize = le32toh(sc->sc_status.expectedlctsize);
1079 1.5 ad lct = (struct i2o_lct *)malloc(esize, M_DEVBUF, M_WAITOK);
1080 1.5 ad if (lct == NULL)
1081 1.1 ad return (ENOMEM);
1082 1.1 ad
1083 1.5 ad if ((rv = iop_lct_get0(sc, lct, esize, 0)) != 0) {
1084 1.1 ad free(lct, M_DEVBUF);
1085 1.1 ad return (rv);
1086 1.1 ad }
1087 1.1 ad
1088 1.5 ad size = le16toh(lct->tablesize) << 2;
1089 1.5 ad if (esize != size) {
1090 1.1 ad free(lct, M_DEVBUF);
1091 1.5 ad lct = (struct i2o_lct *)malloc(size, M_DEVBUF, M_WAITOK);
1092 1.5 ad if (lct == NULL)
1093 1.5 ad return (ENOMEM);
1094 1.5 ad
1095 1.5 ad if ((rv = iop_lct_get0(sc, lct, size, 0)) != 0) {
1096 1.5 ad free(lct, M_DEVBUF);
1097 1.5 ad return (rv);
1098 1.5 ad }
1099 1.1 ad }
1100 1.5 ad
1101 1.5 ad /* Swap in the new LCT. */
1102 1.1 ad if (sc->sc_lct != NULL)
1103 1.1 ad free(sc->sc_lct, M_DEVBUF);
1104 1.1 ad sc->sc_lct = lct;
1105 1.1 ad sc->sc_nlctent = ((le16toh(sc->sc_lct->tablesize) << 2) -
1106 1.1 ad sizeof(struct i2o_lct) + sizeof(struct i2o_lct_entry)) /
1107 1.1 ad sizeof(struct i2o_lct_entry);
1108 1.1 ad return (0);
1109 1.1 ad }
1110 1.1 ad
1111 1.1 ad /*
1112 1.10.2.2 nathanw * Request the specified parameter group from the target. If an initiator
1113 1.10.2.2 nathanw * is specified (a) don't wait for the operation to complete, but instead
1114 1.10.2.2 nathanw * let the initiator's interrupt handler deal with the reply and (b) place a
1115 1.10.2.2 nathanw * pointer to the parameter group op in the wrapper's `im_dvcontext' field.
1116 1.1 ad */
1117 1.1 ad int
1118 1.10.2.2 nathanw iop_param_op(struct iop_softc *sc, int tid, struct iop_initiator *ii,
1119 1.10.2.2 nathanw int write, int group, void *buf, int size)
1120 1.1 ad {
1121 1.1 ad struct iop_msg *im;
1122 1.10.2.2 nathanw struct i2o_util_params_op *mf;
1123 1.10.2.2 nathanw struct i2o_reply *rf;
1124 1.5 ad int rv, func, op;
1125 1.10.2.2 nathanw struct iop_pgop *pgop;
1126 1.10.2.2 nathanw u_int32_t mb[IOP_MAX_MSG_SIZE / sizeof(u_int32_t)];
1127 1.1 ad
1128 1.10.2.2 nathanw im = iop_msg_alloc(sc, ii, (ii == NULL ? IM_WAIT : 0) | IM_NOSTATUS);
1129 1.10.2.2 nathanw if ((pgop = malloc(sizeof(*pgop), M_DEVBUF, M_WAITOK)) == NULL) {
1130 1.10.2.2 nathanw iop_msg_free(sc, im);
1131 1.10.2.2 nathanw return (ENOMEM);
1132 1.10.2.2 nathanw }
1133 1.10.2.2 nathanw if ((rf = malloc(sizeof(*rf), M_DEVBUF, M_WAITOK)) == NULL) {
1134 1.10.2.2 nathanw iop_msg_free(sc, im);
1135 1.10.2.2 nathanw free(pgop, M_DEVBUF);
1136 1.10.2.2 nathanw return (ENOMEM);
1137 1.10.2.2 nathanw }
1138 1.10.2.2 nathanw im->im_dvcontext = pgop;
1139 1.10.2.2 nathanw im->im_rb = rf;
1140 1.1 ad
1141 1.5 ad if (write) {
1142 1.5 ad func = I2O_UTIL_PARAMS_SET;
1143 1.5 ad op = I2O_PARAMS_OP_FIELD_SET;
1144 1.5 ad } else {
1145 1.5 ad func = I2O_UTIL_PARAMS_GET;
1146 1.5 ad op = I2O_PARAMS_OP_FIELD_GET;
1147 1.5 ad }
1148 1.5 ad
1149 1.10.2.2 nathanw mf = (struct i2o_util_params_op *)mb;
1150 1.10.2.2 nathanw mf->msgflags = I2O_MSGFLAGS(i2o_util_params_op);
1151 1.10.2.2 nathanw mf->msgfunc = I2O_MSGFUNC(tid, func);
1152 1.10.2.2 nathanw mf->msgictx = IOP_ICTX;
1153 1.10.2.2 nathanw mf->msgtctx = im->im_tctx;
1154 1.10.2.2 nathanw mf->flags = 0;
1155 1.10.2.2 nathanw
1156 1.10.2.2 nathanw pgop->olh.count = htole16(1);
1157 1.10.2.2 nathanw pgop->olh.reserved = htole16(0);
1158 1.10.2.2 nathanw pgop->oat.operation = htole16(op);
1159 1.10.2.2 nathanw pgop->oat.fieldcount = htole16(0xffff);
1160 1.10.2.2 nathanw pgop->oat.group = htole16(group);
1161 1.10.2.2 nathanw
1162 1.10.2.2 nathanw if (ii == NULL)
1163 1.10.2.2 nathanw PHOLD(curproc);
1164 1.1 ad
1165 1.5 ad memset(buf, 0, size);
1166 1.10.2.2 nathanw iop_msg_map(sc, im, mb, pgop, sizeof(*pgop), 1);
1167 1.10.2.2 nathanw iop_msg_map(sc, im, mb, buf, size, write);
1168 1.10.2.2 nathanw rv = iop_msg_post(sc, im, mb, (ii == NULL ? 30000 : 0));
1169 1.10.2.2 nathanw
1170 1.10.2.2 nathanw if (ii == NULL)
1171 1.10.2.2 nathanw PRELE(curproc);
1172 1.10.2.2 nathanw
1173 1.10.2.2 nathanw /* Detect errors; let partial transfers to count as success. */
1174 1.10.2.2 nathanw if (ii == NULL && rv == 0) {
1175 1.10.2.2 nathanw if (rf->reqstatus == I2O_STATUS_ERROR_PARTIAL_XFER &&
1176 1.10.2.2 nathanw le16toh(rf->detail) == I2O_DSC_UNKNOWN_ERROR)
1177 1.10.2.2 nathanw rv = 0;
1178 1.10.2.2 nathanw else
1179 1.10.2.2 nathanw rv = (rf->reqstatus != 0 ? EIO : 0);
1180 1.10.2.2 nathanw }
1181 1.10.2.2 nathanw
1182 1.10.2.2 nathanw if (ii == NULL || rv != 0) {
1183 1.10.2.2 nathanw iop_msg_unmap(sc, im);
1184 1.10.2.2 nathanw iop_msg_free(sc, im);
1185 1.10.2.2 nathanw free(pgop, M_DEVBUF);
1186 1.10.2.2 nathanw free(rf, M_DEVBUF);
1187 1.10.2.2 nathanw }
1188 1.1 ad
1189 1.1 ad return (rv);
1190 1.10.2.2 nathanw }
1191 1.1 ad
1192 1.1 ad /*
1193 1.5 ad * Execute a simple command (no parameters).
1194 1.1 ad */
1195 1.1 ad int
1196 1.5 ad iop_simple_cmd(struct iop_softc *sc, int tid, int function, int ictx,
1197 1.5 ad int async, int timo)
1198 1.1 ad {
1199 1.1 ad struct iop_msg *im;
1200 1.10.2.2 nathanw struct i2o_msg mf;
1201 1.5 ad int rv, fl;
1202 1.1 ad
1203 1.10.2.2 nathanw fl = (async != 0 ? IM_WAIT : IM_POLL);
1204 1.10.2.2 nathanw im = iop_msg_alloc(sc, NULL, fl);
1205 1.1 ad
1206 1.10.2.2 nathanw mf.msgflags = I2O_MSGFLAGS(i2o_msg);
1207 1.10.2.2 nathanw mf.msgfunc = I2O_MSGFUNC(tid, function);
1208 1.10.2.2 nathanw mf.msgictx = ictx;
1209 1.10.2.2 nathanw mf.msgtctx = im->im_tctx;
1210 1.1 ad
1211 1.10.2.2 nathanw rv = iop_msg_post(sc, im, &mf, timo);
1212 1.10.2.2 nathanw iop_msg_free(sc, im);
1213 1.1 ad return (rv);
1214 1.1 ad }
1215 1.1 ad
1216 1.1 ad /*
1217 1.5 ad * Post the system table to the IOP.
1218 1.1 ad */
1219 1.1 ad static int
1220 1.1 ad iop_systab_set(struct iop_softc *sc)
1221 1.1 ad {
1222 1.10.2.2 nathanw struct i2o_exec_sys_tab_set *mf;
1223 1.1 ad struct iop_msg *im;
1224 1.10.2.2 nathanw bus_space_handle_t bsh;
1225 1.10.2.2 nathanw bus_addr_t boo;
1226 1.1 ad u_int32_t mema[2], ioa[2];
1227 1.1 ad int rv;
1228 1.10.2.2 nathanw u_int32_t mb[IOP_MAX_MSG_SIZE / sizeof(u_int32_t)];
1229 1.1 ad
1230 1.10.2.2 nathanw im = iop_msg_alloc(sc, NULL, IM_WAIT);
1231 1.10.2.2 nathanw
1232 1.10.2.2 nathanw mf = (struct i2o_exec_sys_tab_set *)mb;
1233 1.10.2.2 nathanw mf->msgflags = I2O_MSGFLAGS(i2o_exec_sys_tab_set);
1234 1.10.2.2 nathanw mf->msgfunc = I2O_MSGFUNC(I2O_TID_IOP, I2O_EXEC_SYS_TAB_SET);
1235 1.10.2.2 nathanw mf->msgictx = IOP_ICTX;
1236 1.10.2.2 nathanw mf->msgtctx = im->im_tctx;
1237 1.10.2.2 nathanw mf->iopid = (sc->sc_dv.dv_unit + 2) << 12;
1238 1.10.2.2 nathanw mf->segnumber = 0;
1239 1.10.2.2 nathanw
1240 1.10.2.2 nathanw mema[1] = sc->sc_status.desiredprivmemsize;
1241 1.10.2.2 nathanw ioa[1] = sc->sc_status.desiredpriviosize;
1242 1.10.2.2 nathanw
1243 1.10.2.2 nathanw if (mema[1] != 0) {
1244 1.10.2.2 nathanw rv = bus_space_alloc(sc->sc_bus_memt, 0, 0xffffffff,
1245 1.10.2.2 nathanw le32toh(mema[1]), PAGE_SIZE, 0, 0, &boo, &bsh);
1246 1.10.2.2 nathanw mema[0] = htole32(boo);
1247 1.10.2.2 nathanw if (rv != 0) {
1248 1.10.2.2 nathanw printf("%s: can't alloc priv mem space, err = %d\n",
1249 1.10.2.2 nathanw sc->sc_dv.dv_xname, rv);
1250 1.10.2.2 nathanw mema[0] = 0;
1251 1.10.2.2 nathanw mema[1] = 0;
1252 1.10.2.2 nathanw }
1253 1.10.2.2 nathanw }
1254 1.1 ad
1255 1.10.2.2 nathanw if (ioa[1] != 0) {
1256 1.10.2.2 nathanw rv = bus_space_alloc(sc->sc_bus_iot, 0, 0xffff,
1257 1.10.2.2 nathanw le32toh(ioa[1]), 0, 0, 0, &boo, &bsh);
1258 1.10.2.2 nathanw ioa[0] = htole32(boo);
1259 1.10.2.2 nathanw if (rv != 0) {
1260 1.10.2.2 nathanw printf("%s: can't alloc priv i/o space, err = %d\n",
1261 1.10.2.2 nathanw sc->sc_dv.dv_xname, rv);
1262 1.10.2.2 nathanw ioa[0] = 0;
1263 1.10.2.2 nathanw ioa[1] = 0;
1264 1.10.2.2 nathanw }
1265 1.10.2.2 nathanw }
1266 1.1 ad
1267 1.10.2.2 nathanw PHOLD(curproc);
1268 1.10.2.2 nathanw iop_msg_map(sc, im, mb, iop_systab, iop_systab_size, 1);
1269 1.10.2.2 nathanw iop_msg_map(sc, im, mb, mema, sizeof(mema), 1);
1270 1.10.2.2 nathanw iop_msg_map(sc, im, mb, ioa, sizeof(ioa), 1);
1271 1.10.2.2 nathanw rv = iop_msg_post(sc, im, mb, 5000);
1272 1.1 ad iop_msg_unmap(sc, im);
1273 1.10.2.2 nathanw iop_msg_free(sc, im);
1274 1.10.2.2 nathanw PRELE(curproc);
1275 1.1 ad return (rv);
1276 1.1 ad }
1277 1.1 ad
1278 1.1 ad /*
1279 1.10.2.2 nathanw * Reset the IOP. Must be called with interrupts disabled.
1280 1.1 ad */
1281 1.1 ad static int
1282 1.1 ad iop_reset(struct iop_softc *sc)
1283 1.1 ad {
1284 1.1 ad volatile u_int32_t sw;
1285 1.1 ad u_int32_t mfa;
1286 1.10.2.2 nathanw struct i2o_exec_iop_reset mf;
1287 1.1 ad int rv;
1288 1.1 ad
1289 1.1 ad sw = 0;
1290 1.1 ad
1291 1.10.2.2 nathanw mf.msgflags = I2O_MSGFLAGS(i2o_exec_iop_reset);
1292 1.10.2.2 nathanw mf.msgfunc = I2O_MSGFUNC(I2O_TID_IOP, I2O_EXEC_IOP_RESET);
1293 1.10.2.2 nathanw mf.reserved[0] = 0;
1294 1.10.2.2 nathanw mf.reserved[1] = 0;
1295 1.10.2.2 nathanw mf.reserved[2] = 0;
1296 1.10.2.2 nathanw mf.reserved[3] = 0;
1297 1.10.2.2 nathanw mf.statuslow = kvtop((caddr_t)&sw); /* XXX */
1298 1.10.2.2 nathanw mf.statushigh = 0;
1299 1.1 ad
1300 1.10.2.2 nathanw if ((rv = iop_post(sc, (u_int32_t *)&mf)))
1301 1.1 ad return (rv);
1302 1.1 ad
1303 1.1 ad POLL(2500, sw != 0); /* XXX */
1304 1.1 ad if (sw != I2O_RESET_IN_PROGRESS) {
1305 1.1 ad printf("%s: reset rejected\n", sc->sc_dv.dv_xname);
1306 1.1 ad return (EIO);
1307 1.1 ad }
1308 1.1 ad
1309 1.1 ad /*
1310 1.5 ad * IOP is now in the INIT state. Wait no more than 10 seconds for
1311 1.1 ad * the inbound queue to become responsive.
1312 1.1 ad */
1313 1.5 ad POLL(10000, (mfa = iop_inl(sc, IOP_REG_IFIFO)) != IOP_MFA_EMPTY);
1314 1.1 ad if (mfa == IOP_MFA_EMPTY) {
1315 1.1 ad printf("%s: reset failed\n", sc->sc_dv.dv_xname);
1316 1.1 ad return (EIO);
1317 1.1 ad }
1318 1.1 ad
1319 1.1 ad iop_release_mfa(sc, mfa);
1320 1.1 ad return (0);
1321 1.1 ad }
1322 1.1 ad
1323 1.1 ad /*
1324 1.10.2.2 nathanw * Register a new initiator. Must be called with the configuration lock
1325 1.10.2.2 nathanw * held.
1326 1.1 ad */
1327 1.10.2.2 nathanw void
1328 1.1 ad iop_initiator_register(struct iop_softc *sc, struct iop_initiator *ii)
1329 1.1 ad {
1330 1.10.2.2 nathanw static int ictxgen;
1331 1.10.2.2 nathanw int s;
1332 1.5 ad
1333 1.10.2.2 nathanw /* 0 is reserved (by us) for system messages. */
1334 1.10.2.2 nathanw ii->ii_ictx = ++ictxgen;
1335 1.1 ad
1336 1.10.2.2 nathanw /*
1337 1.10.2.2 nathanw * `Utility initiators' don't make it onto the per-IOP initiator list
1338 1.10.2.2 nathanw * (which is used only for configuration), but do get one slot on
1339 1.10.2.2 nathanw * the inbound queue.
1340 1.10.2.2 nathanw */
1341 1.10.2.2 nathanw if ((ii->ii_flags & II_UTILITY) == 0) {
1342 1.10.2.2 nathanw LIST_INSERT_HEAD(&sc->sc_iilist, ii, ii_list);
1343 1.10.2.2 nathanw sc->sc_nii++;
1344 1.10.2.2 nathanw } else
1345 1.10.2.2 nathanw sc->sc_nuii++;
1346 1.1 ad
1347 1.10.2.2 nathanw s = splbio();
1348 1.10.2.2 nathanw LIST_INSERT_HEAD(IOP_ICTXHASH(ii->ii_ictx), ii, ii_hash);
1349 1.10.2.2 nathanw splx(s);
1350 1.1 ad }
1351 1.1 ad
1352 1.1 ad /*
1353 1.10.2.2 nathanw * Unregister an initiator. Must be called with the configuration lock
1354 1.10.2.2 nathanw * held.
1355 1.1 ad */
1356 1.1 ad void
1357 1.1 ad iop_initiator_unregister(struct iop_softc *sc, struct iop_initiator *ii)
1358 1.1 ad {
1359 1.10.2.2 nathanw int s;
1360 1.1 ad
1361 1.10.2.2 nathanw if ((ii->ii_flags & II_UTILITY) == 0) {
1362 1.10.2.2 nathanw LIST_REMOVE(ii, ii_list);
1363 1.10.2.2 nathanw sc->sc_nii--;
1364 1.10.2.2 nathanw } else
1365 1.10.2.2 nathanw sc->sc_nuii--;
1366 1.10.2.2 nathanw
1367 1.10.2.2 nathanw s = splbio();
1368 1.5 ad LIST_REMOVE(ii, ii_hash);
1369 1.10.2.2 nathanw splx(s);
1370 1.1 ad }
1371 1.1 ad
1372 1.1 ad /*
1373 1.10.2.2 nathanw * Handle a reply frame from the IOP.
1374 1.1 ad */
1375 1.1 ad static int
1376 1.5 ad iop_handle_reply(struct iop_softc *sc, u_int32_t rmfa)
1377 1.1 ad {
1378 1.1 ad struct iop_msg *im;
1379 1.1 ad struct i2o_reply *rb;
1380 1.10.2.2 nathanw struct i2o_fault_notify *fn;
1381 1.1 ad struct iop_initiator *ii;
1382 1.5 ad u_int off, ictx, tctx, status, size;
1383 1.1 ad
1384 1.1 ad off = (int)(rmfa - sc->sc_rep_phys);
1385 1.1 ad rb = (struct i2o_reply *)(sc->sc_rep + off);
1386 1.1 ad
1387 1.10.2.2 nathanw /* Perform reply queue DMA synchronisation. XXX This is rubbish. */
1388 1.10.2.2 nathanw bus_dmamap_sync(sc->sc_dmat, sc->sc_rep_dmamap, off,
1389 1.10.2.2 nathanw IOP_MAX_MSG_SIZE, BUS_DMASYNC_POSTREAD);
1390 1.10.2.2 nathanw if (--sc->sc_curib != 0)
1391 1.1 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_rep_dmamap,
1392 1.1 ad 0, sc->sc_rep_size, BUS_DMASYNC_PREREAD);
1393 1.1 ad
1394 1.1 ad #ifdef I2ODEBUG
1395 1.1 ad if ((le32toh(rb->msgflags) & I2O_MSGFLAGS_64BIT) != 0)
1396 1.5 ad panic("iop_handle_reply: 64-bit reply");
1397 1.1 ad #endif
1398 1.1 ad /*
1399 1.1 ad * Find the initiator.
1400 1.1 ad */
1401 1.1 ad ictx = le32toh(rb->msgictx);
1402 1.1 ad if (ictx == IOP_ICTX)
1403 1.1 ad ii = NULL;
1404 1.1 ad else {
1405 1.5 ad ii = LIST_FIRST(IOP_ICTXHASH(ictx));
1406 1.5 ad for (; ii != NULL; ii = LIST_NEXT(ii, ii_hash))
1407 1.5 ad if (ii->ii_ictx == ictx)
1408 1.5 ad break;
1409 1.5 ad if (ii == NULL) {
1410 1.1 ad #ifdef I2ODEBUG
1411 1.10.2.2 nathanw iop_reply_print(sc, rb);
1412 1.1 ad #endif
1413 1.10.2.2 nathanw printf("%s: WARNING: bad ictx returned (%x)\n",
1414 1.5 ad sc->sc_dv.dv_xname, ictx);
1415 1.5 ad return (-1);
1416 1.5 ad }
1417 1.1 ad }
1418 1.1 ad
1419 1.10.2.2 nathanw /*
1420 1.10.2.2 nathanw * If we recieved a transport failure notice, we've got to dig the
1421 1.10.2.2 nathanw * transaction context (if any) out of the original message frame,
1422 1.10.2.2 nathanw * and then release the original MFA back to the inbound FIFO.
1423 1.10.2.2 nathanw */
1424 1.10.2.2 nathanw if ((rb->msgflags & I2O_MSGFLAGS_FAIL) != 0) {
1425 1.10.2.2 nathanw status = I2O_STATUS_SUCCESS;
1426 1.10.2.2 nathanw
1427 1.10.2.2 nathanw fn = (struct i2o_fault_notify *)rb;
1428 1.10.2.2 nathanw tctx = iop_inl(sc, fn->lowmfa + 12); /* XXX */
1429 1.10.2.2 nathanw iop_release_mfa(sc, fn->lowmfa);
1430 1.10.2.2 nathanw iop_tfn_print(sc, fn);
1431 1.10.2.2 nathanw } else {
1432 1.10.2.2 nathanw status = rb->reqstatus;
1433 1.10.2.2 nathanw tctx = le32toh(rb->msgtctx);
1434 1.10.2.2 nathanw }
1435 1.1 ad
1436 1.1 ad if (ii == NULL || (ii->ii_flags & II_DISCARD) == 0) {
1437 1.1 ad /*
1438 1.1 ad * This initiator tracks state using message wrappers.
1439 1.1 ad *
1440 1.1 ad * Find the originating message wrapper, and if requested
1441 1.1 ad * notify the initiator.
1442 1.1 ad */
1443 1.10.2.2 nathanw im = sc->sc_ims + (tctx & IOP_TCTX_MASK);
1444 1.10.2.2 nathanw if ((tctx & IOP_TCTX_MASK) > sc->sc_maxib ||
1445 1.10.2.2 nathanw (im->im_flags & IM_ALLOCED) == 0 ||
1446 1.10.2.2 nathanw tctx != im->im_tctx) {
1447 1.10.2.2 nathanw printf("%s: WARNING: bad tctx returned (0x%08x, %p)\n",
1448 1.10.2.2 nathanw sc->sc_dv.dv_xname, tctx, im);
1449 1.10.2.2 nathanw if (im != NULL)
1450 1.10.2.2 nathanw printf("%s: flags=0x%08x tctx=0x%08x\n",
1451 1.10.2.2 nathanw sc->sc_dv.dv_xname, im->im_flags,
1452 1.10.2.2 nathanw im->im_tctx);
1453 1.5 ad #ifdef I2ODEBUG
1454 1.10.2.2 nathanw if ((rb->msgflags & I2O_MSGFLAGS_FAIL) == 0)
1455 1.10.2.2 nathanw iop_reply_print(sc, rb);
1456 1.5 ad #endif
1457 1.5 ad return (-1);
1458 1.5 ad }
1459 1.10.2.2 nathanw
1460 1.10.2.2 nathanw if ((rb->msgflags & I2O_MSGFLAGS_FAIL) != 0)
1461 1.10.2.2 nathanw im->im_flags |= IM_FAIL;
1462 1.10.2.2 nathanw
1463 1.1 ad #ifdef I2ODEBUG
1464 1.1 ad if ((im->im_flags & IM_REPLIED) != 0)
1465 1.5 ad panic("%s: dup reply", sc->sc_dv.dv_xname);
1466 1.1 ad #endif
1467 1.1 ad im->im_flags |= IM_REPLIED;
1468 1.1 ad
1469 1.1 ad #ifdef I2ODEBUG
1470 1.10.2.2 nathanw if (status != I2O_STATUS_SUCCESS)
1471 1.10.2.2 nathanw iop_reply_print(sc, rb);
1472 1.1 ad #endif
1473 1.10.2.2 nathanw im->im_reqstatus = status;
1474 1.10.2.2 nathanw
1475 1.10.2.2 nathanw /* Copy the reply frame, if requested. */
1476 1.10.2.2 nathanw if (im->im_rb != NULL) {
1477 1.5 ad size = (le32toh(rb->msgflags) >> 14) & ~3;
1478 1.10.2.2 nathanw #ifdef I2ODEBUG
1479 1.10.2.2 nathanw if (size > IOP_MAX_MSG_SIZE)
1480 1.10.2.2 nathanw panic("iop_handle_reply: reply too large");
1481 1.10.2.2 nathanw #endif
1482 1.10.2.2 nathanw memcpy(im->im_rb, rb, size);
1483 1.10.2.2 nathanw }
1484 1.10.2.2 nathanw
1485 1.10.2.2 nathanw /* Notify the initiator. */
1486 1.10.2.2 nathanw if ((im->im_flags & IM_WAIT) != 0)
1487 1.1 ad wakeup(im);
1488 1.10.2.2 nathanw else if ((im->im_flags & (IM_POLL | IM_POLL_INTR)) != IM_POLL)
1489 1.1 ad (*ii->ii_intr)(ii->ii_dv, im, rb);
1490 1.1 ad } else {
1491 1.1 ad /*
1492 1.1 ad * This initiator discards message wrappers.
1493 1.1 ad *
1494 1.1 ad * Simply pass the reply frame to the initiator.
1495 1.1 ad */
1496 1.1 ad (*ii->ii_intr)(ii->ii_dv, NULL, rb);
1497 1.1 ad }
1498 1.1 ad
1499 1.1 ad return (status);
1500 1.1 ad }
1501 1.1 ad
1502 1.1 ad /*
1503 1.10.2.2 nathanw * Handle an interrupt from the IOP.
1504 1.1 ad */
1505 1.1 ad int
1506 1.1 ad iop_intr(void *arg)
1507 1.1 ad {
1508 1.1 ad struct iop_softc *sc;
1509 1.5 ad u_int32_t rmfa;
1510 1.1 ad
1511 1.1 ad sc = arg;
1512 1.1 ad
1513 1.5 ad if ((iop_inl(sc, IOP_REG_INTR_STATUS) & IOP_INTR_OFIFO) == 0)
1514 1.5 ad return (0);
1515 1.5 ad
1516 1.5 ad for (;;) {
1517 1.5 ad /* Double read to account for IOP bug. */
1518 1.10.2.2 nathanw if ((rmfa = iop_inl(sc, IOP_REG_OFIFO)) == IOP_MFA_EMPTY) {
1519 1.10.2.2 nathanw rmfa = iop_inl(sc, IOP_REG_OFIFO);
1520 1.10.2.2 nathanw if (rmfa == IOP_MFA_EMPTY)
1521 1.10.2.2 nathanw break;
1522 1.10.2.2 nathanw }
1523 1.5 ad iop_handle_reply(sc, rmfa);
1524 1.10.2.2 nathanw iop_outl(sc, IOP_REG_OFIFO, rmfa);
1525 1.1 ad }
1526 1.1 ad
1527 1.5 ad return (1);
1528 1.5 ad }
1529 1.5 ad
1530 1.5 ad /*
1531 1.5 ad * Handle an event signalled by the executive.
1532 1.5 ad */
1533 1.5 ad static void
1534 1.5 ad iop_intr_event(struct device *dv, struct iop_msg *im, void *reply)
1535 1.5 ad {
1536 1.5 ad struct i2o_util_event_register_reply *rb;
1537 1.5 ad struct iop_softc *sc;
1538 1.5 ad u_int event;
1539 1.5 ad
1540 1.5 ad sc = (struct iop_softc *)dv;
1541 1.5 ad rb = reply;
1542 1.5 ad
1543 1.10.2.2 nathanw if ((rb->msgflags & I2O_MSGFLAGS_FAIL) != 0)
1544 1.5 ad return;
1545 1.5 ad
1546 1.10.2.2 nathanw event = le32toh(rb->event);
1547 1.5 ad printf("%s: event 0x%08x received\n", dv->dv_xname, event);
1548 1.1 ad }
1549 1.1 ad
1550 1.1 ad /*
1551 1.1 ad * Allocate a message wrapper.
1552 1.1 ad */
1553 1.10.2.2 nathanw struct iop_msg *
1554 1.10.2.2 nathanw iop_msg_alloc(struct iop_softc *sc, struct iop_initiator *ii, int flags)
1555 1.1 ad {
1556 1.1 ad struct iop_msg *im;
1557 1.10.2.2 nathanw static u_int tctxgen;
1558 1.10.2.2 nathanw int s, i;
1559 1.1 ad
1560 1.1 ad #ifdef I2ODEBUG
1561 1.1 ad if ((flags & IM_SYSMASK) != 0)
1562 1.1 ad panic("iop_msg_alloc: system flags specified");
1563 1.1 ad #endif
1564 1.1 ad
1565 1.1 ad s = splbio(); /* XXX */
1566 1.10.2.2 nathanw im = SLIST_FIRST(&sc->sc_im_freelist);
1567 1.10.2.2 nathanw #if defined(DIAGNOSTIC) || defined(I2ODEBUG)
1568 1.10.2.2 nathanw if (im == NULL)
1569 1.10.2.2 nathanw panic("iop_msg_alloc: no free wrappers");
1570 1.10.2.2 nathanw #endif
1571 1.10.2.2 nathanw SLIST_REMOVE_HEAD(&sc->sc_im_freelist, im_chain);
1572 1.10.2.2 nathanw splx(s);
1573 1.1 ad
1574 1.10.2.2 nathanw if (ii != NULL && (ii->ii_flags & II_DISCARD) != 0)
1575 1.5 ad flags |= IM_DISCARD;
1576 1.1 ad
1577 1.10.2.2 nathanw im->im_tctx = (im->im_tctx & IOP_TCTX_MASK) | tctxgen;
1578 1.10.2.2 nathanw tctxgen += (1 << IOP_TCTX_SHIFT);
1579 1.1 ad im->im_flags = flags | IM_ALLOCED;
1580 1.10.2.2 nathanw im->im_rb = NULL;
1581 1.10.2.2 nathanw i = 0;
1582 1.10.2.2 nathanw do {
1583 1.10.2.2 nathanw im->im_xfer[i++].ix_size = 0;
1584 1.10.2.2 nathanw } while (i < IOP_MAX_MSG_XFERS);
1585 1.1 ad
1586 1.10.2.2 nathanw return (im);
1587 1.1 ad }
1588 1.1 ad
1589 1.1 ad /*
1590 1.1 ad * Free a message wrapper.
1591 1.1 ad */
1592 1.1 ad void
1593 1.10.2.2 nathanw iop_msg_free(struct iop_softc *sc, struct iop_msg *im)
1594 1.1 ad {
1595 1.1 ad int s;
1596 1.1 ad
1597 1.1 ad #ifdef I2ODEBUG
1598 1.1 ad if ((im->im_flags & IM_ALLOCED) == 0)
1599 1.1 ad panic("iop_msg_free: wrapper not allocated");
1600 1.1 ad #endif
1601 1.1 ad
1602 1.1 ad im->im_flags = 0;
1603 1.10.2.2 nathanw s = splbio();
1604 1.10.2.2 nathanw SLIST_INSERT_HEAD(&sc->sc_im_freelist, im, im_chain);
1605 1.1 ad splx(s);
1606 1.1 ad }
1607 1.1 ad
1608 1.1 ad /*
1609 1.5 ad * Map a data transfer. Write a scatter-gather list into the message frame.
1610 1.1 ad */
1611 1.1 ad int
1612 1.10.2.2 nathanw iop_msg_map(struct iop_softc *sc, struct iop_msg *im, u_int32_t *mb,
1613 1.10.2.2 nathanw void *xferaddr, int xfersize, int out)
1614 1.1 ad {
1615 1.10.2.2 nathanw bus_dmamap_t dm;
1616 1.10.2.2 nathanw bus_dma_segment_t *ds;
1617 1.1 ad struct iop_xfer *ix;
1618 1.10.2.2 nathanw u_int rv, i, nsegs, flg, off, xn;
1619 1.10.2.2 nathanw u_int32_t *p;
1620 1.5 ad
1621 1.10.2.2 nathanw for (xn = 0, ix = im->im_xfer; xn < IOP_MAX_MSG_XFERS; xn++, ix++)
1622 1.1 ad if (ix->ix_size == 0)
1623 1.1 ad break;
1624 1.10.2.2 nathanw
1625 1.1 ad #ifdef I2ODEBUG
1626 1.10.2.2 nathanw if (xfersize == 0)
1627 1.10.2.2 nathanw panic("iop_msg_map: null transfer");
1628 1.10.2.2 nathanw if (xfersize > IOP_MAX_XFER)
1629 1.10.2.2 nathanw panic("iop_msg_map: transfer too large");
1630 1.10.2.2 nathanw if (xn == IOP_MAX_MSG_XFERS)
1631 1.1 ad panic("iop_msg_map: too many xfers");
1632 1.1 ad #endif
1633 1.1 ad
1634 1.10.2.2 nathanw /*
1635 1.10.2.2 nathanw * Only the first DMA map is static.
1636 1.10.2.2 nathanw */
1637 1.10.2.2 nathanw if (xn != 0) {
1638 1.1 ad rv = bus_dmamap_create(sc->sc_dmat, IOP_MAX_XFER,
1639 1.10.2.2 nathanw IOP_MAX_SEGS, IOP_MAX_XFER, 0,
1640 1.1 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ix->ix_map);
1641 1.1 ad if (rv != 0)
1642 1.1 ad return (rv);
1643 1.1 ad }
1644 1.1 ad
1645 1.10.2.2 nathanw dm = ix->ix_map;
1646 1.10.2.2 nathanw rv = bus_dmamap_load(sc->sc_dmat, dm, xferaddr, xfersize, NULL, 0);
1647 1.1 ad if (rv != 0)
1648 1.10.2.2 nathanw goto bad;
1649 1.10.2.2 nathanw
1650 1.10.2.2 nathanw /*
1651 1.10.2.2 nathanw * How many SIMPLE SG elements can we fit in this message?
1652 1.10.2.2 nathanw */
1653 1.10.2.2 nathanw off = mb[0] >> 16;
1654 1.10.2.2 nathanw p = mb + off;
1655 1.10.2.2 nathanw nsegs = ((IOP_MAX_MSG_SIZE / 4) - off) >> 1;
1656 1.10.2.2 nathanw
1657 1.10.2.2 nathanw if (dm->dm_nsegs > nsegs) {
1658 1.10.2.2 nathanw bus_dmamap_unload(sc->sc_dmat, ix->ix_map);
1659 1.10.2.2 nathanw rv = EFBIG;
1660 1.10.2.2 nathanw DPRINTF(("iop_msg_map: too many segs\n"));
1661 1.10.2.2 nathanw goto bad;
1662 1.10.2.2 nathanw }
1663 1.10.2.2 nathanw
1664 1.10.2.2 nathanw nsegs = dm->dm_nsegs;
1665 1.10.2.2 nathanw xfersize = 0;
1666 1.1 ad
1667 1.10.2.2 nathanw /*
1668 1.10.2.2 nathanw * Write out the SG list.
1669 1.10.2.2 nathanw */
1670 1.1 ad if (out)
1671 1.10.2.2 nathanw flg = I2O_SGL_SIMPLE | I2O_SGL_DATA_OUT;
1672 1.1 ad else
1673 1.10.2.2 nathanw flg = I2O_SGL_SIMPLE;
1674 1.1 ad
1675 1.10.2.2 nathanw for (i = nsegs, ds = dm->dm_segs; i > 1; i--, p += 2, ds++) {
1676 1.10.2.2 nathanw p[0] = (u_int32_t)ds->ds_len | flg;
1677 1.10.2.2 nathanw p[1] = (u_int32_t)ds->ds_addr;
1678 1.10.2.2 nathanw xfersize += ds->ds_len;
1679 1.1 ad }
1680 1.1 ad
1681 1.10.2.2 nathanw p[0] = (u_int32_t)ds->ds_len | flg | I2O_SGL_END_BUFFER;
1682 1.10.2.2 nathanw p[1] = (u_int32_t)ds->ds_addr;
1683 1.10.2.2 nathanw xfersize += ds->ds_len;
1684 1.10.2.2 nathanw
1685 1.10.2.2 nathanw /* Fix up the transfer record, and sync the map. */
1686 1.10.2.2 nathanw ix->ix_flags = (out ? IX_OUT : IX_IN);
1687 1.10.2.2 nathanw ix->ix_size = xfersize;
1688 1.10.2.2 nathanw bus_dmamap_sync(sc->sc_dmat, ix->ix_map, 0, xfersize,
1689 1.10.2.2 nathanw out ? BUS_DMASYNC_POSTWRITE : BUS_DMASYNC_POSTREAD);
1690 1.10.2.2 nathanw
1691 1.1 ad /*
1692 1.1 ad * If this is the first xfer we've mapped for this message, adjust
1693 1.1 ad * the SGL offset field in the message header.
1694 1.1 ad */
1695 1.2 ad if ((im->im_flags & IM_SGLOFFADJ) == 0) {
1696 1.10.2.2 nathanw mb[0] += (mb[0] >> 12) & 0xf0;
1697 1.2 ad im->im_flags |= IM_SGLOFFADJ;
1698 1.2 ad }
1699 1.10.2.2 nathanw mb[0] += (nsegs << 17);
1700 1.10.2.2 nathanw return (0);
1701 1.10.2.2 nathanw
1702 1.10.2.2 nathanw bad:
1703 1.10.2.2 nathanw if (xn != 0)
1704 1.10.2.2 nathanw bus_dmamap_destroy(sc->sc_dmat, ix->ix_map);
1705 1.10.2.2 nathanw return (rv);
1706 1.10.2.2 nathanw }
1707 1.10.2.2 nathanw
1708 1.10.2.2 nathanw /*
1709 1.10.2.2 nathanw * Map a block I/O data transfer (different in that there's only one per
1710 1.10.2.2 nathanw * message maximum, and PAGE addressing may be used). Write a scatter
1711 1.10.2.2 nathanw * gather list into the message frame.
1712 1.10.2.2 nathanw */
1713 1.10.2.2 nathanw int
1714 1.10.2.2 nathanw iop_msg_map_bio(struct iop_softc *sc, struct iop_msg *im, u_int32_t *mb,
1715 1.10.2.2 nathanw void *xferaddr, int xfersize, int out)
1716 1.10.2.2 nathanw {
1717 1.10.2.2 nathanw bus_dma_segment_t *ds;
1718 1.10.2.2 nathanw bus_dmamap_t dm;
1719 1.10.2.2 nathanw struct iop_xfer *ix;
1720 1.10.2.2 nathanw u_int rv, i, nsegs, off, slen, tlen, flg;
1721 1.10.2.2 nathanw paddr_t saddr, eaddr;
1722 1.10.2.2 nathanw u_int32_t *p;
1723 1.10.2.2 nathanw
1724 1.10.2.2 nathanw #ifdef I2ODEBUG
1725 1.10.2.2 nathanw if (xfersize == 0)
1726 1.10.2.2 nathanw panic("iop_msg_map_bio: null transfer");
1727 1.10.2.2 nathanw if (xfersize > IOP_MAX_XFER)
1728 1.10.2.2 nathanw panic("iop_msg_map_bio: transfer too large");
1729 1.10.2.2 nathanw if ((im->im_flags & IM_SGLOFFADJ) != 0)
1730 1.10.2.2 nathanw panic("iop_msg_map_bio: SGLOFFADJ");
1731 1.10.2.2 nathanw #endif
1732 1.10.2.2 nathanw
1733 1.10.2.2 nathanw ix = im->im_xfer;
1734 1.10.2.2 nathanw dm = ix->ix_map;
1735 1.10.2.2 nathanw rv = bus_dmamap_load(sc->sc_dmat, dm, xferaddr, xfersize, NULL, 0);
1736 1.10.2.2 nathanw if (rv != 0)
1737 1.10.2.2 nathanw return (rv);
1738 1.10.2.2 nathanw
1739 1.10.2.2 nathanw off = mb[0] >> 16;
1740 1.10.2.2 nathanw nsegs = ((IOP_MAX_MSG_SIZE / 4) - off) >> 1;
1741 1.10.2.2 nathanw
1742 1.10.2.2 nathanw /*
1743 1.10.2.2 nathanw * If the transfer is highly fragmented and won't fit using SIMPLE
1744 1.10.2.2 nathanw * elements, use PAGE_LIST elements instead. SIMPLE elements are
1745 1.10.2.2 nathanw * potentially more efficient, both for us and the IOP.
1746 1.10.2.2 nathanw */
1747 1.10.2.2 nathanw if (dm->dm_nsegs > nsegs) {
1748 1.10.2.2 nathanw nsegs = 1;
1749 1.10.2.2 nathanw p = mb + off + 1;
1750 1.10.2.2 nathanw
1751 1.10.2.2 nathanw /* XXX This should be done with a bus_space flag. */
1752 1.10.2.2 nathanw for (i = dm->dm_nsegs, ds = dm->dm_segs; i > 0; i--, ds++) {
1753 1.10.2.2 nathanw slen = ds->ds_len;
1754 1.10.2.2 nathanw saddr = ds->ds_addr;
1755 1.10.2.2 nathanw
1756 1.10.2.2 nathanw while (slen > 0) {
1757 1.10.2.2 nathanw eaddr = (saddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
1758 1.10.2.2 nathanw tlen = min(eaddr - saddr, slen);
1759 1.10.2.2 nathanw slen -= tlen;
1760 1.10.2.2 nathanw *p++ = le32toh(saddr);
1761 1.10.2.2 nathanw saddr = eaddr;
1762 1.10.2.2 nathanw nsegs++;
1763 1.10.2.2 nathanw }
1764 1.10.2.2 nathanw }
1765 1.10.2.2 nathanw
1766 1.10.2.2 nathanw mb[off] = xfersize | I2O_SGL_PAGE_LIST | I2O_SGL_END_BUFFER |
1767 1.10.2.2 nathanw I2O_SGL_END;
1768 1.10.2.2 nathanw if (out)
1769 1.10.2.2 nathanw mb[off] |= I2O_SGL_DATA_OUT;
1770 1.10.2.2 nathanw } else {
1771 1.10.2.2 nathanw p = mb + off;
1772 1.10.2.2 nathanw nsegs = dm->dm_nsegs;
1773 1.10.2.2 nathanw
1774 1.10.2.2 nathanw if (out)
1775 1.10.2.2 nathanw flg = I2O_SGL_SIMPLE | I2O_SGL_DATA_OUT;
1776 1.10.2.2 nathanw else
1777 1.10.2.2 nathanw flg = I2O_SGL_SIMPLE;
1778 1.10.2.2 nathanw
1779 1.10.2.2 nathanw for (i = nsegs, ds = dm->dm_segs; i > 1; i--, p += 2, ds++) {
1780 1.10.2.2 nathanw p[0] = (u_int32_t)ds->ds_len | flg;
1781 1.10.2.2 nathanw p[1] = (u_int32_t)ds->ds_addr;
1782 1.10.2.2 nathanw }
1783 1.10.2.2 nathanw
1784 1.10.2.2 nathanw p[0] = (u_int32_t)ds->ds_len | flg | I2O_SGL_END_BUFFER |
1785 1.10.2.2 nathanw I2O_SGL_END;
1786 1.10.2.2 nathanw p[1] = (u_int32_t)ds->ds_addr;
1787 1.10.2.2 nathanw nsegs <<= 1;
1788 1.10.2.2 nathanw }
1789 1.10.2.2 nathanw
1790 1.10.2.2 nathanw /* Fix up the transfer record, and sync the map. */
1791 1.10.2.2 nathanw ix->ix_flags = (out ? IX_OUT : IX_IN);
1792 1.10.2.2 nathanw ix->ix_size = xfersize;
1793 1.10.2.2 nathanw bus_dmamap_sync(sc->sc_dmat, ix->ix_map, 0, xfersize,
1794 1.10.2.2 nathanw out ? BUS_DMASYNC_POSTWRITE : BUS_DMASYNC_POSTREAD);
1795 1.10.2.2 nathanw
1796 1.10.2.2 nathanw /*
1797 1.10.2.2 nathanw * Adjust the SGL offset and total message size fields. We don't
1798 1.10.2.2 nathanw * set IM_SGLOFFADJ, since it's used only for SIMPLE elements.
1799 1.10.2.2 nathanw */
1800 1.10.2.2 nathanw mb[0] += ((off << 4) + (nsegs << 16));
1801 1.1 ad return (0);
1802 1.1 ad }
1803 1.1 ad
1804 1.1 ad /*
1805 1.1 ad * Unmap all data transfers associated with a message wrapper.
1806 1.1 ad */
1807 1.1 ad void
1808 1.1 ad iop_msg_unmap(struct iop_softc *sc, struct iop_msg *im)
1809 1.1 ad {
1810 1.1 ad struct iop_xfer *ix;
1811 1.1 ad int i;
1812 1.10.2.2 nathanw
1813 1.10.2.2 nathanw #ifdef I2ODEBUG
1814 1.10.2.2 nathanw if (im->im_xfer[0].ix_size == 0)
1815 1.10.2.2 nathanw panic("iop_msg_unmap: no transfers mapped");
1816 1.10.2.2 nathanw #endif
1817 1.10.2.2 nathanw
1818 1.10.2.2 nathanw for (ix = im->im_xfer, i = 0;;) {
1819 1.1 ad bus_dmamap_sync(sc->sc_dmat, ix->ix_map, 0, ix->ix_size,
1820 1.1 ad ix->ix_flags & IX_OUT ? BUS_DMASYNC_POSTWRITE :
1821 1.1 ad BUS_DMASYNC_POSTREAD);
1822 1.1 ad bus_dmamap_unload(sc->sc_dmat, ix->ix_map);
1823 1.1 ad
1824 1.1 ad /* Only the first DMA map is static. */
1825 1.1 ad if (i != 0)
1826 1.1 ad bus_dmamap_destroy(sc->sc_dmat, ix->ix_map);
1827 1.10.2.2 nathanw if ((++ix)->ix_size == 0)
1828 1.10.2.2 nathanw break;
1829 1.10.2.2 nathanw if (++i >= IOP_MAX_MSG_XFERS)
1830 1.10.2.2 nathanw break;
1831 1.1 ad }
1832 1.1 ad }
1833 1.1 ad
1834 1.10.2.2 nathanw /*
1835 1.10.2.2 nathanw * Post a message frame to the IOP's inbound queue.
1836 1.1 ad */
1837 1.1 ad int
1838 1.10.2.2 nathanw iop_post(struct iop_softc *sc, u_int32_t *mb)
1839 1.1 ad {
1840 1.10.2.2 nathanw u_int32_t mfa;
1841 1.10.2.2 nathanw int s;
1842 1.1 ad
1843 1.10.2.2 nathanw /* ZZZ */
1844 1.10.2.2 nathanw if ((mb[0] >> 16) > IOP_MAX_MSG_SIZE / 4)
1845 1.10.2.2 nathanw panic("iop_post: frame too large");
1846 1.1 ad
1847 1.2 ad s = splbio(); /* XXX */
1848 1.1 ad
1849 1.10.2.2 nathanw /* Allocate a slot with the IOP. */
1850 1.10.2.2 nathanw if ((mfa = iop_inl(sc, IOP_REG_IFIFO)) == IOP_MFA_EMPTY)
1851 1.10.2.2 nathanw if ((mfa = iop_inl(sc, IOP_REG_IFIFO)) == IOP_MFA_EMPTY) {
1852 1.10.2.2 nathanw splx(s);
1853 1.10.2.2 nathanw printf("%s: mfa not forthcoming\n",
1854 1.10.2.2 nathanw sc->sc_dv.dv_xname);
1855 1.10.2.2 nathanw return (EAGAIN);
1856 1.10.2.2 nathanw }
1857 1.1 ad
1858 1.10.2.2 nathanw /* Perform reply buffer DMA synchronisation. XXX This is rubbish. */
1859 1.10.2.2 nathanw if (sc->sc_curib++ == 0)
1860 1.10.2.2 nathanw bus_dmamap_sync(sc->sc_dmat, sc->sc_rep_dmamap, 0,
1861 1.10.2.2 nathanw sc->sc_rep_size, BUS_DMASYNC_PREREAD);
1862 1.1 ad
1863 1.10.2.2 nathanw /* Copy out the message frame. */
1864 1.10.2.2 nathanw bus_space_write_region_4(sc->sc_iot, sc->sc_ioh, mfa, mb, mb[0] >> 16);
1865 1.10.2.2 nathanw bus_space_barrier(sc->sc_iot, sc->sc_ioh, mfa, (mb[0] >> 14) & ~3,
1866 1.10.2.2 nathanw BUS_SPACE_BARRIER_WRITE);
1867 1.10.2.2 nathanw
1868 1.10.2.2 nathanw /* Post the MFA back to the IOP. */
1869 1.10.2.2 nathanw iop_outl(sc, IOP_REG_IFIFO, mfa);
1870 1.10.2.2 nathanw
1871 1.10.2.2 nathanw splx(s);
1872 1.10.2.2 nathanw return (0);
1873 1.10.2.2 nathanw }
1874 1.10.2.2 nathanw
1875 1.10.2.2 nathanw /*
1876 1.10.2.2 nathanw * Post a message to the IOP and deal with completion.
1877 1.10.2.2 nathanw */
1878 1.10.2.2 nathanw int
1879 1.10.2.2 nathanw iop_msg_post(struct iop_softc *sc, struct iop_msg *im, void *xmb, int timo)
1880 1.10.2.2 nathanw {
1881 1.10.2.2 nathanw u_int32_t *mb;
1882 1.10.2.2 nathanw int rv, s;
1883 1.10.2.2 nathanw
1884 1.10.2.2 nathanw mb = xmb;
1885 1.10.2.2 nathanw
1886 1.10.2.2 nathanw /* Terminate the scatter/gather list chain. */
1887 1.1 ad if ((im->im_flags & IM_SGLOFFADJ) != 0)
1888 1.10.2.2 nathanw mb[(mb[0] >> 16) - 2] |= I2O_SGL_END;
1889 1.1 ad
1890 1.10.2.2 nathanw if ((rv = iop_post(sc, mb)) != 0)
1891 1.10.2.2 nathanw return (rv);
1892 1.1 ad
1893 1.10.2.2 nathanw if ((im->im_flags & IM_DISCARD) != 0)
1894 1.10.2.2 nathanw iop_msg_free(sc, im);
1895 1.10.2.2 nathanw else if ((im->im_flags & IM_POLL) != 0 && timo == 0) {
1896 1.10.2.2 nathanw /* XXX For ofifo_init(). */
1897 1.10.2.2 nathanw rv = 0;
1898 1.10.2.2 nathanw } else if ((im->im_flags & (IM_POLL | IM_WAIT)) != 0) {
1899 1.10.2.2 nathanw if ((im->im_flags & IM_POLL) != 0)
1900 1.10.2.2 nathanw iop_msg_poll(sc, im, timo);
1901 1.10.2.2 nathanw else
1902 1.10.2.2 nathanw iop_msg_wait(sc, im, timo);
1903 1.1 ad
1904 1.10.2.2 nathanw s = splbio();
1905 1.10.2.2 nathanw if ((im->im_flags & IM_REPLIED) != 0) {
1906 1.10.2.2 nathanw if ((im->im_flags & IM_NOSTATUS) != 0)
1907 1.10.2.2 nathanw rv = 0;
1908 1.10.2.2 nathanw else if ((im->im_flags & IM_FAIL) != 0)
1909 1.10.2.2 nathanw rv = ENXIO;
1910 1.10.2.2 nathanw else if (im->im_reqstatus != I2O_STATUS_SUCCESS)
1911 1.10.2.2 nathanw rv = EIO;
1912 1.10.2.2 nathanw else
1913 1.10.2.2 nathanw rv = 0;
1914 1.10.2.2 nathanw } else
1915 1.10.2.2 nathanw rv = EBUSY;
1916 1.2 ad splx(s);
1917 1.10.2.2 nathanw } else
1918 1.10.2.2 nathanw rv = 0;
1919 1.10.2.2 nathanw
1920 1.10.2.2 nathanw return (rv);
1921 1.10.2.2 nathanw }
1922 1.10.2.2 nathanw
1923 1.10.2.2 nathanw /*
1924 1.10.2.2 nathanw * Spin until the specified message is replied to.
1925 1.10.2.2 nathanw */
1926 1.10.2.2 nathanw static void
1927 1.10.2.2 nathanw iop_msg_poll(struct iop_softc *sc, struct iop_msg *im, int timo)
1928 1.10.2.2 nathanw {
1929 1.10.2.2 nathanw u_int32_t rmfa;
1930 1.10.2.2 nathanw int s, status;
1931 1.10.2.2 nathanw
1932 1.10.2.2 nathanw s = splbio(); /* XXX */
1933 1.1 ad
1934 1.1 ad /* Wait for completion. */
1935 1.1 ad for (timo *= 10; timo != 0; timo--) {
1936 1.5 ad if ((iop_inl(sc, IOP_REG_INTR_STATUS) & IOP_INTR_OFIFO) != 0) {
1937 1.5 ad /* Double read to account for IOP bug. */
1938 1.5 ad rmfa = iop_inl(sc, IOP_REG_OFIFO);
1939 1.5 ad if (rmfa == IOP_MFA_EMPTY)
1940 1.5 ad rmfa = iop_inl(sc, IOP_REG_OFIFO);
1941 1.10.2.2 nathanw if (rmfa != IOP_MFA_EMPTY) {
1942 1.5 ad status = iop_handle_reply(sc, rmfa);
1943 1.10.2.2 nathanw
1944 1.10.2.2 nathanw /*
1945 1.10.2.2 nathanw * Return the reply frame to the IOP's
1946 1.10.2.2 nathanw * outbound FIFO.
1947 1.10.2.2 nathanw */
1948 1.10.2.2 nathanw iop_outl(sc, IOP_REG_OFIFO, rmfa);
1949 1.10.2.2 nathanw }
1950 1.5 ad }
1951 1.1 ad if ((im->im_flags & IM_REPLIED) != 0)
1952 1.1 ad break;
1953 1.1 ad DELAY(100);
1954 1.1 ad }
1955 1.1 ad
1956 1.1 ad if (timo == 0) {
1957 1.5 ad #ifdef I2ODEBUG
1958 1.5 ad printf("%s: poll - no reply\n", sc->sc_dv.dv_xname);
1959 1.10.2.2 nathanw if (iop_status_get(sc, 1) != 0)
1960 1.10.2.2 nathanw printf("iop_msg_poll: unable to retrieve status\n");
1961 1.5 ad else
1962 1.10.2.2 nathanw printf("iop_msg_poll: IOP state = %d\n",
1963 1.5 ad (le32toh(sc->sc_status.segnumber) >> 16) & 0xff);
1964 1.5 ad #endif
1965 1.1 ad }
1966 1.1 ad
1967 1.1 ad splx(s);
1968 1.1 ad }
1969 1.1 ad
1970 1.1 ad /*
1971 1.10.2.2 nathanw * Sleep until the specified message is replied to.
1972 1.1 ad */
1973 1.10.2.2 nathanw static void
1974 1.1 ad iop_msg_wait(struct iop_softc *sc, struct iop_msg *im, int timo)
1975 1.1 ad {
1976 1.10.2.2 nathanw int s, rv;
1977 1.1 ad
1978 1.5 ad s = splbio();
1979 1.5 ad if ((im->im_flags & IM_REPLIED) != 0) {
1980 1.5 ad splx(s);
1981 1.10.2.2 nathanw return;
1982 1.5 ad }
1983 1.5 ad rv = tsleep(im, PRIBIO, "iopmsg", timo * hz / 1000);
1984 1.5 ad splx(s);
1985 1.10.2.2 nathanw
1986 1.5 ad #ifdef I2ODEBUG
1987 1.5 ad if (rv != 0) {
1988 1.5 ad printf("iop_msg_wait: tsleep() == %d\n", rv);
1989 1.10.2.2 nathanw if (iop_status_get(sc, 0) != 0)
1990 1.5 ad printf("iop_msg_wait: unable to retrieve status\n");
1991 1.5 ad else
1992 1.5 ad printf("iop_msg_wait: IOP state = %d\n",
1993 1.5 ad (le32toh(sc->sc_status.segnumber) >> 16) & 0xff);
1994 1.5 ad }
1995 1.5 ad #endif
1996 1.1 ad }
1997 1.1 ad
1998 1.1 ad /*
1999 1.1 ad * Release an unused message frame back to the IOP's inbound fifo.
2000 1.1 ad */
2001 1.1 ad static void
2002 1.1 ad iop_release_mfa(struct iop_softc *sc, u_int32_t mfa)
2003 1.1 ad {
2004 1.1 ad
2005 1.1 ad /* Use the frame to issue a no-op. */
2006 1.5 ad iop_outl(sc, mfa, I2O_VERSION_11 | (4 << 16));
2007 1.5 ad iop_outl(sc, mfa + 4, I2O_MSGFUNC(I2O_TID_IOP, I2O_UTIL_NOP));
2008 1.5 ad iop_outl(sc, mfa + 8, 0);
2009 1.5 ad iop_outl(sc, mfa + 12, 0);
2010 1.1 ad
2011 1.5 ad iop_outl(sc, IOP_REG_IFIFO, mfa);
2012 1.1 ad }
2013 1.1 ad
2014 1.1 ad #ifdef I2ODEBUG
2015 1.1 ad /*
2016 1.10.2.2 nathanw * Dump a reply frame header.
2017 1.1 ad */
2018 1.1 ad static void
2019 1.10.2.2 nathanw iop_reply_print(struct iop_softc *sc, struct i2o_reply *rb)
2020 1.1 ad {
2021 1.5 ad u_int function, detail;
2022 1.1 ad #ifdef I2OVERBOSE
2023 1.1 ad const char *statusstr;
2024 1.1 ad #endif
2025 1.1 ad
2026 1.5 ad function = (le32toh(rb->msgfunc) >> 24) & 0xff;
2027 1.1 ad detail = le16toh(rb->detail);
2028 1.1 ad
2029 1.5 ad printf("%s: reply:\n", sc->sc_dv.dv_xname);
2030 1.5 ad
2031 1.1 ad #ifdef I2OVERBOSE
2032 1.1 ad if (rb->reqstatus < sizeof(iop_status) / sizeof(iop_status[0]))
2033 1.1 ad statusstr = iop_status[rb->reqstatus];
2034 1.1 ad else
2035 1.1 ad statusstr = "undefined error code";
2036 1.1 ad
2037 1.5 ad printf("%s: function=0x%02x status=0x%02x (%s)\n",
2038 1.5 ad sc->sc_dv.dv_xname, function, rb->reqstatus, statusstr);
2039 1.1 ad #else
2040 1.5 ad printf("%s: function=0x%02x status=0x%02x\n",
2041 1.5 ad sc->sc_dv.dv_xname, function, rb->reqstatus);
2042 1.1 ad #endif
2043 1.5 ad printf("%s: detail=0x%04x ictx=0x%08x tctx=0x%08x\n",
2044 1.5 ad sc->sc_dv.dv_xname, detail, le32toh(rb->msgictx),
2045 1.5 ad le32toh(rb->msgtctx));
2046 1.5 ad printf("%s: tidi=%d tidt=%d flags=0x%02x\n", sc->sc_dv.dv_xname,
2047 1.5 ad (le32toh(rb->msgfunc) >> 12) & 4095, le32toh(rb->msgfunc) & 4095,
2048 1.5 ad (le32toh(rb->msgflags) >> 8) & 0xff);
2049 1.1 ad }
2050 1.1 ad #endif
2051 1.1 ad
2052 1.1 ad /*
2053 1.10.2.2 nathanw * Dump a transport failure reply.
2054 1.10.2.2 nathanw */
2055 1.10.2.2 nathanw static void
2056 1.10.2.2 nathanw iop_tfn_print(struct iop_softc *sc, struct i2o_fault_notify *fn)
2057 1.10.2.2 nathanw {
2058 1.10.2.2 nathanw
2059 1.10.2.2 nathanw printf("%s: WARNING: transport failure:\n", sc->sc_dv.dv_xname);
2060 1.10.2.2 nathanw
2061 1.10.2.2 nathanw printf("%s: ictx=0x%08x tctx=0x%08x\n", sc->sc_dv.dv_xname,
2062 1.10.2.2 nathanw le32toh(fn->msgictx), le32toh(fn->msgtctx));
2063 1.10.2.2 nathanw printf("%s: failurecode=0x%02x severity=0x%02x\n",
2064 1.10.2.2 nathanw sc->sc_dv.dv_xname, fn->failurecode, fn->severity);
2065 1.10.2.2 nathanw printf("%s: highestver=0x%02x lowestver=0x%02x\n",
2066 1.10.2.2 nathanw sc->sc_dv.dv_xname, fn->highestver, fn->lowestver);
2067 1.10.2.2 nathanw }
2068 1.10.2.2 nathanw
2069 1.10.2.2 nathanw /*
2070 1.5 ad * Translate an I2O ASCII field into a C string.
2071 1.1 ad */
2072 1.1 ad void
2073 1.5 ad iop_strvis(struct iop_softc *sc, const char *src, int slen, char *dst, int dlen)
2074 1.1 ad {
2075 1.5 ad int hc, lc, i, nit;
2076 1.1 ad
2077 1.1 ad dlen--;
2078 1.1 ad lc = 0;
2079 1.1 ad hc = 0;
2080 1.1 ad i = 0;
2081 1.5 ad
2082 1.5 ad /*
2083 1.5 ad * DPT use NUL as a space, whereas AMI use it as a terminator. The
2084 1.5 ad * spec has nothing to say about it. Since AMI fields are usually
2085 1.5 ad * filled with junk after the terminator, ...
2086 1.5 ad */
2087 1.5 ad nit = (le16toh(sc->sc_status.orgid) != I2O_ORG_DPT);
2088 1.5 ad
2089 1.5 ad while (slen-- != 0 && dlen-- != 0) {
2090 1.5 ad if (nit && *src == '\0')
2091 1.5 ad break;
2092 1.5 ad else if (*src <= 0x20 || *src >= 0x7f) {
2093 1.1 ad if (hc)
2094 1.1 ad dst[i++] = ' ';
2095 1.1 ad } else {
2096 1.1 ad hc = 1;
2097 1.1 ad dst[i++] = *src;
2098 1.1 ad lc = i;
2099 1.1 ad }
2100 1.1 ad src++;
2101 1.1 ad }
2102 1.1 ad
2103 1.1 ad dst[lc] = '\0';
2104 1.1 ad }
2105 1.1 ad
2106 1.1 ad /*
2107 1.10.2.2 nathanw * Retrieve the DEVICE_IDENTITY parameter group from the target and dump it.
2108 1.10.2.2 nathanw */
2109 1.10.2.2 nathanw int
2110 1.10.2.2 nathanw iop_print_ident(struct iop_softc *sc, int tid)
2111 1.10.2.2 nathanw {
2112 1.10.2.2 nathanw struct {
2113 1.10.2.2 nathanw struct i2o_param_op_results pr;
2114 1.10.2.2 nathanw struct i2o_param_read_results prr;
2115 1.10.2.2 nathanw struct i2o_param_device_identity di;
2116 1.10.2.2 nathanw } __attribute__ ((__packed__)) p;
2117 1.10.2.2 nathanw char buf[32];
2118 1.10.2.2 nathanw int rv;
2119 1.10.2.2 nathanw
2120 1.10.2.2 nathanw rv = iop_param_op(sc, tid, NULL, 0, I2O_PARAM_DEVICE_IDENTITY, &p,
2121 1.10.2.2 nathanw sizeof(p));
2122 1.10.2.2 nathanw if (rv != 0)
2123 1.10.2.2 nathanw return (rv);
2124 1.10.2.2 nathanw
2125 1.10.2.2 nathanw iop_strvis(sc, p.di.vendorinfo, sizeof(p.di.vendorinfo), buf,
2126 1.10.2.2 nathanw sizeof(buf));
2127 1.10.2.2 nathanw printf(" <%s, ", buf);
2128 1.10.2.2 nathanw iop_strvis(sc, p.di.productinfo, sizeof(p.di.productinfo), buf,
2129 1.10.2.2 nathanw sizeof(buf));
2130 1.10.2.2 nathanw printf("%s, ", buf);
2131 1.10.2.2 nathanw iop_strvis(sc, p.di.revlevel, sizeof(p.di.revlevel), buf, sizeof(buf));
2132 1.10.2.2 nathanw printf("%s>", buf);
2133 1.10.2.2 nathanw
2134 1.10.2.2 nathanw return (0);
2135 1.10.2.2 nathanw }
2136 1.10.2.2 nathanw
2137 1.10.2.2 nathanw /*
2138 1.5 ad * Claim or unclaim the specified TID.
2139 1.1 ad */
2140 1.1 ad int
2141 1.5 ad iop_util_claim(struct iop_softc *sc, struct iop_initiator *ii, int release,
2142 1.5 ad int flags)
2143 1.1 ad {
2144 1.5 ad struct iop_msg *im;
2145 1.10.2.2 nathanw struct i2o_util_claim mf;
2146 1.5 ad int rv, func;
2147 1.5 ad
2148 1.5 ad func = release ? I2O_UTIL_CLAIM_RELEASE : I2O_UTIL_CLAIM;
2149 1.10.2.2 nathanw im = iop_msg_alloc(sc, ii, IM_WAIT);
2150 1.5 ad
2151 1.10.2.2 nathanw /* We can use the same structure, as they're identical. */
2152 1.10.2.2 nathanw mf.msgflags = I2O_MSGFLAGS(i2o_util_claim);
2153 1.10.2.2 nathanw mf.msgfunc = I2O_MSGFUNC(ii->ii_tid, func);
2154 1.10.2.2 nathanw mf.msgictx = ii->ii_ictx;
2155 1.10.2.2 nathanw mf.msgtctx = im->im_tctx;
2156 1.10.2.2 nathanw mf.flags = flags;
2157 1.5 ad
2158 1.10.2.2 nathanw rv = iop_msg_post(sc, im, &mf, 5000);
2159 1.10.2.2 nathanw iop_msg_free(sc, im);
2160 1.5 ad return (rv);
2161 1.5 ad }
2162 1.5 ad
2163 1.5 ad /*
2164 1.5 ad * Perform an abort.
2165 1.5 ad */
2166 1.5 ad int iop_util_abort(struct iop_softc *sc, struct iop_initiator *ii, int func,
2167 1.5 ad int tctxabort, int flags)
2168 1.5 ad {
2169 1.5 ad struct iop_msg *im;
2170 1.10.2.2 nathanw struct i2o_util_abort mf;
2171 1.5 ad int rv;
2172 1.5 ad
2173 1.10.2.2 nathanw im = iop_msg_alloc(sc, ii, IM_WAIT);
2174 1.1 ad
2175 1.10.2.2 nathanw mf.msgflags = I2O_MSGFLAGS(i2o_util_abort);
2176 1.10.2.2 nathanw mf.msgfunc = I2O_MSGFUNC(ii->ii_tid, I2O_UTIL_ABORT);
2177 1.10.2.2 nathanw mf.msgictx = ii->ii_ictx;
2178 1.10.2.2 nathanw mf.msgtctx = im->im_tctx;
2179 1.10.2.2 nathanw mf.flags = (func << 24) | flags;
2180 1.10.2.2 nathanw mf.tctxabort = tctxabort;
2181 1.1 ad
2182 1.10.2.2 nathanw rv = iop_msg_post(sc, im, &mf, 5000);
2183 1.10.2.2 nathanw iop_msg_free(sc, im);
2184 1.5 ad return (rv);
2185 1.1 ad }
2186 1.1 ad
2187 1.1 ad /*
2188 1.10.2.2 nathanw * Enable or disable reception of events for the specified device.
2189 1.1 ad */
2190 1.5 ad int iop_util_eventreg(struct iop_softc *sc, struct iop_initiator *ii, int mask)
2191 1.5 ad {
2192 1.5 ad struct iop_msg *im;
2193 1.10.2.2 nathanw struct i2o_util_event_register mf;
2194 1.5 ad
2195 1.10.2.2 nathanw im = iop_msg_alloc(sc, ii, 0);
2196 1.5 ad
2197 1.10.2.2 nathanw mf.msgflags = I2O_MSGFLAGS(i2o_util_event_register);
2198 1.10.2.2 nathanw mf.msgfunc = I2O_MSGFUNC(ii->ii_tid, I2O_UTIL_EVENT_REGISTER);
2199 1.10.2.2 nathanw mf.msgictx = ii->ii_ictx;
2200 1.10.2.2 nathanw mf.msgtctx = im->im_tctx;
2201 1.10.2.2 nathanw mf.eventmask = mask;
2202 1.5 ad
2203 1.10.2.2 nathanw /* This message is replied to only when events are signalled. */
2204 1.10.2.2 nathanw return (iop_msg_post(sc, im, &mf, 0));
2205 1.5 ad }
2206 1.5 ad
2207 1.1 ad int
2208 1.5 ad iopopen(dev_t dev, int flag, int mode, struct proc *p)
2209 1.1 ad {
2210 1.5 ad struct iop_softc *sc;
2211 1.5 ad
2212 1.10.2.2 nathanw if ((sc = device_lookup(&iop_cd, minor(dev))) == NULL)
2213 1.10.2.2 nathanw return (ENXIO);
2214 1.10.2.2 nathanw if ((sc->sc_flags & IOP_ONLINE) == 0)
2215 1.1 ad return (ENXIO);
2216 1.5 ad if ((sc->sc_flags & IOP_OPEN) != 0)
2217 1.5 ad return (EBUSY);
2218 1.5 ad sc->sc_flags |= IOP_OPEN;
2219 1.5 ad
2220 1.10.2.2 nathanw sc->sc_ptb = malloc(IOP_MAX_XFER * IOP_MAX_MSG_XFERS, M_DEVBUF,
2221 1.9 ad M_WAITOK);
2222 1.9 ad if (sc->sc_ptb == NULL) {
2223 1.9 ad sc->sc_flags ^= IOP_OPEN;
2224 1.9 ad return (ENOMEM);
2225 1.9 ad }
2226 1.9 ad
2227 1.5 ad return (0);
2228 1.1 ad }
2229 1.1 ad
2230 1.5 ad int
2231 1.5 ad iopclose(dev_t dev, int flag, int mode, struct proc *p)
2232 1.1 ad {
2233 1.5 ad struct iop_softc *sc;
2234 1.1 ad
2235 1.5 ad sc = device_lookup(&iop_cd, minor(dev));
2236 1.9 ad free(sc->sc_ptb, M_DEVBUF);
2237 1.10.2.2 nathanw sc->sc_flags &= ~IOP_OPEN;
2238 1.5 ad return (0);
2239 1.1 ad }
2240 1.1 ad
2241 1.1 ad int
2242 1.5 ad iopioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
2243 1.1 ad {
2244 1.5 ad struct iop_softc *sc;
2245 1.5 ad struct iovec *iov;
2246 1.5 ad int rv, i;
2247 1.5 ad
2248 1.5 ad if (securelevel >= 2)
2249 1.5 ad return (EPERM);
2250 1.5 ad
2251 1.5 ad sc = device_lookup(&iop_cd, minor(dev));
2252 1.5 ad
2253 1.5 ad switch (cmd) {
2254 1.5 ad case IOPIOCPT:
2255 1.10.2.2 nathanw return (iop_passthrough(sc, (struct ioppt *)data));
2256 1.9 ad
2257 1.10.2.2 nathanw case IOPIOCGSTATUS:
2258 1.10.2.2 nathanw iov = (struct iovec *)data;
2259 1.10.2.2 nathanw i = sizeof(struct i2o_status);
2260 1.10.2.2 nathanw if (i > iov->iov_len)
2261 1.10.2.2 nathanw i = iov->iov_len;
2262 1.10.2.2 nathanw else
2263 1.10.2.2 nathanw iov->iov_len = i;
2264 1.10.2.2 nathanw if ((rv = iop_status_get(sc, 0)) == 0)
2265 1.10.2.2 nathanw rv = copyout(&sc->sc_status, iov->iov_base, i);
2266 1.10.2.2 nathanw return (rv);
2267 1.5 ad
2268 1.10.2.2 nathanw case IOPIOCGLCT:
2269 1.10.2.2 nathanw case IOPIOCGTIDMAP:
2270 1.10.2.2 nathanw case IOPIOCRECONFIG:
2271 1.10.2.2 nathanw break;
2272 1.5 ad
2273 1.10.2.2 nathanw default:
2274 1.10.2.2 nathanw #if defined(DIAGNOSTIC) || defined(I2ODEBUG)
2275 1.10.2.2 nathanw printf("%s: unknown ioctl %lx\n", sc->sc_dv.dv_xname, cmd);
2276 1.10.2.2 nathanw #endif
2277 1.10.2.2 nathanw return (ENOTTY);
2278 1.10.2.2 nathanw }
2279 1.9 ad
2280 1.10.2.2 nathanw if ((rv = lockmgr(&sc->sc_conflock, LK_SHARED, NULL)) != 0)
2281 1.10.2.2 nathanw return (rv);
2282 1.1 ad
2283 1.10.2.2 nathanw switch (cmd) {
2284 1.5 ad case IOPIOCGLCT:
2285 1.5 ad iov = (struct iovec *)data;
2286 1.10.2.2 nathanw i = le16toh(sc->sc_lct->tablesize) << 2;
2287 1.5 ad if (i > iov->iov_len)
2288 1.5 ad i = iov->iov_len;
2289 1.5 ad else
2290 1.5 ad iov->iov_len = i;
2291 1.10.2.2 nathanw rv = copyout(sc->sc_lct, iov->iov_base, i);
2292 1.5 ad break;
2293 1.5 ad
2294 1.5 ad case IOPIOCRECONFIG:
2295 1.10.2.2 nathanw rv = iop_reconfigure(sc, 0);
2296 1.9 ad break;
2297 1.9 ad
2298 1.9 ad case IOPIOCGTIDMAP:
2299 1.9 ad iov = (struct iovec *)data;
2300 1.10.2.2 nathanw i = sizeof(struct iop_tidmap) * sc->sc_nlctent;
2301 1.10.2.2 nathanw if (i > iov->iov_len)
2302 1.10.2.2 nathanw i = iov->iov_len;
2303 1.10.2.2 nathanw else
2304 1.10.2.2 nathanw iov->iov_len = i;
2305 1.10.2.2 nathanw rv = copyout(sc->sc_tidmap, iov->iov_base, i);
2306 1.5 ad break;
2307 1.10.2.2 nathanw }
2308 1.5 ad
2309 1.10.2.2 nathanw lockmgr(&sc->sc_conflock, LK_RELEASE, NULL);
2310 1.10.2.2 nathanw return (rv);
2311 1.10.2.2 nathanw }
2312 1.10.2.2 nathanw
2313 1.10.2.2 nathanw static int
2314 1.10.2.2 nathanw iop_passthrough(struct iop_softc *sc, struct ioppt *pt)
2315 1.10.2.2 nathanw {
2316 1.10.2.2 nathanw struct iop_msg *im;
2317 1.10.2.2 nathanw struct i2o_msg *mf;
2318 1.10.2.2 nathanw struct ioppt_buf *ptb;
2319 1.10.2.2 nathanw int rv, i, mapped;
2320 1.10.2.2 nathanw void *buf;
2321 1.10.2.2 nathanw
2322 1.10.2.2 nathanw mf = NULL;
2323 1.10.2.2 nathanw im = NULL;
2324 1.10.2.2 nathanw mapped = 1;
2325 1.10.2.2 nathanw
2326 1.10.2.2 nathanw if (pt->pt_msglen > IOP_MAX_MSG_SIZE ||
2327 1.10.2.2 nathanw pt->pt_msglen > (le16toh(sc->sc_status.inboundmframesize) << 2) ||
2328 1.10.2.2 nathanw pt->pt_msglen < sizeof(struct i2o_msg) ||
2329 1.10.2.2 nathanw pt->pt_nbufs > IOP_MAX_MSG_XFERS ||
2330 1.10.2.2 nathanw pt->pt_nbufs < 0 || pt->pt_replylen < 0 ||
2331 1.10.2.2 nathanw pt->pt_timo < 1000 || pt->pt_timo > 5*60*1000)
2332 1.10.2.2 nathanw return (EINVAL);
2333 1.10.2.2 nathanw
2334 1.10.2.2 nathanw for (i = 0; i < pt->pt_nbufs; i++)
2335 1.10.2.2 nathanw if (pt->pt_bufs[i].ptb_datalen > IOP_MAX_XFER) {
2336 1.10.2.2 nathanw rv = ENOMEM;
2337 1.10.2.2 nathanw goto bad;
2338 1.10.2.2 nathanw }
2339 1.10.2.2 nathanw
2340 1.10.2.2 nathanw mf = malloc(IOP_MAX_MSG_SIZE, M_DEVBUF, M_WAITOK);
2341 1.10.2.2 nathanw if (mf == NULL)
2342 1.10.2.2 nathanw return (ENOMEM);
2343 1.10.2.2 nathanw
2344 1.10.2.2 nathanw if ((rv = copyin(pt->pt_msg, mf, pt->pt_msglen)) != 0)
2345 1.10.2.2 nathanw goto bad;
2346 1.10.2.2 nathanw
2347 1.10.2.2 nathanw im = iop_msg_alloc(sc, NULL, IM_WAIT | IM_NOSTATUS);
2348 1.10.2.2 nathanw im->im_rb = (struct i2o_reply *)mf;
2349 1.10.2.2 nathanw mf->msgictx = IOP_ICTX;
2350 1.10.2.2 nathanw mf->msgtctx = im->im_tctx;
2351 1.10.2.2 nathanw
2352 1.10.2.2 nathanw for (i = 0; i < pt->pt_nbufs; i++) {
2353 1.10.2.2 nathanw ptb = &pt->pt_bufs[i];
2354 1.10.2.2 nathanw buf = sc->sc_ptb + i * IOP_MAX_XFER;
2355 1.10.2.2 nathanw
2356 1.10.2.2 nathanw if ((u_int)ptb->ptb_datalen > IOP_MAX_XFER) {
2357 1.10.2.2 nathanw rv = EINVAL;
2358 1.10.2.2 nathanw goto bad;
2359 1.10.2.2 nathanw }
2360 1.10.2.2 nathanw
2361 1.10.2.2 nathanw if (ptb->ptb_out != 0) {
2362 1.10.2.2 nathanw rv = copyin(ptb->ptb_data, buf, ptb->ptb_datalen);
2363 1.10.2.2 nathanw if (rv != 0)
2364 1.10.2.2 nathanw goto bad;
2365 1.10.2.2 nathanw }
2366 1.10.2.2 nathanw
2367 1.10.2.2 nathanw rv = iop_msg_map(sc, im, (u_int32_t *)mf, buf,
2368 1.10.2.2 nathanw ptb->ptb_datalen, ptb->ptb_out != 0);
2369 1.10.2.2 nathanw if (rv != 0)
2370 1.10.2.2 nathanw goto bad;
2371 1.10.2.2 nathanw mapped = 1;
2372 1.5 ad }
2373 1.9 ad
2374 1.10.2.2 nathanw if ((rv = iop_msg_post(sc, im, mf, pt->pt_timo)) != 0)
2375 1.10.2.2 nathanw goto bad;
2376 1.10.2.2 nathanw
2377 1.10.2.2 nathanw i = (le32toh(im->im_rb->msgflags) >> 14) & ~3;
2378 1.10.2.2 nathanw if (i > IOP_MAX_MSG_SIZE)
2379 1.10.2.2 nathanw i = IOP_MAX_MSG_SIZE;
2380 1.10.2.2 nathanw if (i > pt->pt_replylen)
2381 1.10.2.2 nathanw i = pt->pt_replylen;
2382 1.10.2.2 nathanw if ((rv = copyout(im->im_rb, pt->pt_reply, i)) != 0)
2383 1.10.2.2 nathanw goto bad;
2384 1.10.2.2 nathanw
2385 1.10.2.2 nathanw iop_msg_unmap(sc, im);
2386 1.10.2.2 nathanw mapped = 0;
2387 1.10.2.2 nathanw
2388 1.10.2.2 nathanw for (i = 0; i < pt->pt_nbufs; i++) {
2389 1.10.2.2 nathanw ptb = &pt->pt_bufs[i];
2390 1.10.2.2 nathanw if (ptb->ptb_out != 0)
2391 1.10.2.2 nathanw continue;
2392 1.10.2.2 nathanw buf = sc->sc_ptb + i * IOP_MAX_XFER;
2393 1.10.2.2 nathanw rv = copyout(buf, ptb->ptb_data, ptb->ptb_datalen);
2394 1.10.2.2 nathanw if (rv != 0)
2395 1.10.2.2 nathanw break;
2396 1.10.2.2 nathanw }
2397 1.10.2.1 nathanw
2398 1.10.2.2 nathanw bad:
2399 1.10.2.2 nathanw if (mapped != 0)
2400 1.10.2.2 nathanw iop_msg_unmap(sc, im);
2401 1.10.2.2 nathanw if (im != NULL)
2402 1.10.2.2 nathanw iop_msg_free(sc, im);
2403 1.10.2.2 nathanw if (mf != NULL)
2404 1.10.2.2 nathanw free(mf, M_DEVBUF);
2405 1.1 ad return (rv);
2406 1.5 ad }
2407