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adv.c revision 1.12
      1  1.12    dante /*	$NetBSD: adv.c,v 1.12 1999/06/06 17:33:18 dante Exp $	*/
      2   1.2    dante 
      3   1.1    dante /*
      4   1.4    dante  * Generic driver for the Advanced Systems Inc. Narrow SCSI controllers
      5   1.1    dante  *
      6   1.1    dante  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      7   1.1    dante  * All rights reserved.
      8   1.1    dante  *
      9   1.1    dante  * Author: Baldassare Dante Profeta <dante (at) mclink.it>
     10   1.1    dante  *
     11   1.1    dante  * Redistribution and use in source and binary forms, with or without
     12   1.1    dante  * modification, are permitted provided that the following conditions
     13   1.1    dante  * are met:
     14   1.1    dante  * 1. Redistributions of source code must retain the above copyright
     15   1.1    dante  *    notice, this list of conditions and the following disclaimer.
     16   1.1    dante  * 2. Redistributions in binary form must reproduce the above copyright
     17   1.1    dante  *    notice, this list of conditions and the following disclaimer in the
     18   1.1    dante  *    documentation and/or other materials provided with the distribution.
     19   1.1    dante  * 3. All advertising materials mentioning features or use of this software
     20   1.1    dante  *    must display the following acknowledgement:
     21   1.4    dante  *        This product includes software developed by the NetBSD
     22   1.4    dante  *        Foundation, Inc. and its contributors.
     23   1.1    dante  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24   1.1    dante  *    contributors may be used to endorse or promote products derived
     25   1.1    dante  *    from this software without specific prior written permission.
     26   1.1    dante  *
     27   1.1    dante  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28   1.1    dante  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29   1.1    dante  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30   1.1    dante  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31   1.1    dante  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32   1.1    dante  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33   1.1    dante  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34   1.1    dante  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35   1.1    dante  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36   1.1    dante  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37   1.1    dante  * POSSIBILITY OF SUCH DAMAGE.
     38   1.1    dante  */
     39   1.1    dante 
     40   1.1    dante #include <sys/types.h>
     41   1.1    dante #include <sys/param.h>
     42   1.1    dante #include <sys/systm.h>
     43   1.1    dante #include <sys/kernel.h>
     44   1.1    dante #include <sys/errno.h>
     45   1.1    dante #include <sys/ioctl.h>
     46   1.1    dante #include <sys/device.h>
     47   1.1    dante #include <sys/malloc.h>
     48   1.1    dante #include <sys/buf.h>
     49   1.1    dante #include <sys/proc.h>
     50   1.1    dante #include <sys/user.h>
     51   1.1    dante 
     52   1.1    dante #include <machine/bus.h>
     53   1.1    dante #include <machine/intr.h>
     54   1.1    dante 
     55   1.1    dante #include <vm/vm.h>
     56   1.1    dante #include <vm/vm_param.h>
     57   1.1    dante #include <vm/pmap.h>
     58   1.1    dante 
     59   1.1    dante #include <dev/scsipi/scsi_all.h>
     60   1.1    dante #include <dev/scsipi/scsipi_all.h>
     61   1.1    dante #include <dev/scsipi/scsiconf.h>
     62   1.1    dante 
     63  1.10    dante #include <dev/ic/advlib.h>
     64   1.1    dante #include <dev/ic/adv.h>
     65   1.3  thorpej 
     66   1.3  thorpej #ifndef DDB
     67   1.3  thorpej #define	Debugger()	panic("should call debugger here (adv.c)")
     68   1.3  thorpej #endif /* ! DDB */
     69   1.1    dante 
     70   1.6    dante 
     71   1.6    dante /* #define ASC_DEBUG */
     72   1.6    dante 
     73   1.1    dante /******************************************************************************/
     74   1.1    dante 
     75   1.1    dante 
     76   1.1    dante static int adv_alloc_ccbs __P((ASC_SOFTC *));
     77   1.1    dante static int adv_create_ccbs __P((ASC_SOFTC *, ADV_CCB *, int));
     78   1.1    dante static void adv_free_ccb __P((ASC_SOFTC *, ADV_CCB *));
     79   1.1    dante static void adv_reset_ccb __P((ADV_CCB *));
     80   1.1    dante static int adv_init_ccb __P((ASC_SOFTC *, ADV_CCB *));
     81   1.1    dante static ADV_CCB *adv_get_ccb __P((ASC_SOFTC *, int));
     82   1.1    dante static void adv_queue_ccb __P((ASC_SOFTC *, ADV_CCB *));
     83   1.1    dante static void adv_start_ccbs __P((ASC_SOFTC *));
     84   1.1    dante 
     85   1.1    dante static u_int8_t *adv_alloc_overrunbuf __P((char *dvname, bus_dma_tag_t));
     86   1.1    dante 
     87   1.1    dante static int adv_scsi_cmd __P((struct scsipi_xfer *));
     88   1.1    dante static void advminphys __P((struct buf *));
     89   1.1    dante static void adv_narrow_isr_callback __P((ASC_SOFTC *, ASC_QDONE_INFO *));
     90   1.1    dante 
     91   1.1    dante static int adv_poll __P((ASC_SOFTC *, struct scsipi_xfer *, int));
     92   1.1    dante static void adv_timeout __P((void *));
     93   1.1    dante static void adv_watchdog __P((void *));
     94   1.1    dante 
     95   1.1    dante 
     96   1.1    dante /******************************************************************************/
     97   1.1    dante 
     98   1.1    dante 
     99   1.1    dante /* the below structure is so we have a default dev struct for out link struct */
    100   1.1    dante struct scsipi_device adv_dev =
    101   1.1    dante {
    102   1.1    dante 	NULL,			/* Use default error handler */
    103   1.1    dante 	NULL,			/* have a queue, served by this */
    104   1.1    dante 	NULL,			/* have no async handler */
    105   1.1    dante 	NULL,			/* Use default 'done' routine */
    106   1.1    dante };
    107   1.1    dante 
    108   1.1    dante 
    109   1.1    dante #define ADV_ABORT_TIMEOUT       2000	/* time to wait for abort (mSec) */
    110   1.1    dante #define ADV_WATCH_TIMEOUT       1000	/* time to wait for watchdog (mSec) */
    111   1.1    dante 
    112   1.1    dante 
    113   1.1    dante /******************************************************************************/
    114   1.1    dante /*                             Control Blocks routines                        */
    115   1.1    dante /******************************************************************************/
    116   1.1    dante 
    117   1.1    dante 
    118   1.1    dante static int
    119   1.1    dante adv_alloc_ccbs(sc)
    120   1.1    dante 	ASC_SOFTC      *sc;
    121   1.1    dante {
    122   1.1    dante 	bus_dma_segment_t seg;
    123   1.1    dante 	int             error, rseg;
    124   1.1    dante 
    125   1.1    dante 	/*
    126   1.1    dante          * Allocate the control blocks.
    127   1.1    dante          */
    128   1.1    dante 	if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct adv_control),
    129   1.1    dante 			   NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
    130   1.1    dante 		printf("%s: unable to allocate control structures,"
    131   1.1    dante 		       " error = %d\n", sc->sc_dev.dv_xname, error);
    132   1.1    dante 		return (error);
    133   1.1    dante 	}
    134   1.1    dante 	if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
    135   1.1    dante 		   sizeof(struct adv_control), (caddr_t *) & sc->sc_control,
    136   1.1    dante 				 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
    137   1.1    dante 		printf("%s: unable to map control structures, error = %d\n",
    138   1.1    dante 		       sc->sc_dev.dv_xname, error);
    139   1.1    dante 		return (error);
    140   1.1    dante 	}
    141   1.1    dante 	/*
    142   1.1    dante          * Create and load the DMA map used for the control blocks.
    143   1.1    dante          */
    144   1.1    dante 	if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct adv_control),
    145   1.1    dante 			   1, sizeof(struct adv_control), 0, BUS_DMA_NOWAIT,
    146   1.1    dante 				       &sc->sc_dmamap_control)) != 0) {
    147   1.1    dante 		printf("%s: unable to create control DMA map, error = %d\n",
    148   1.1    dante 		       sc->sc_dev.dv_xname, error);
    149   1.1    dante 		return (error);
    150   1.1    dante 	}
    151   1.1    dante 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control,
    152   1.1    dante 			   sc->sc_control, sizeof(struct adv_control), NULL,
    153   1.1    dante 				     BUS_DMA_NOWAIT)) != 0) {
    154   1.1    dante 		printf("%s: unable to load control DMA map, error = %d\n",
    155   1.1    dante 		       sc->sc_dev.dv_xname, error);
    156   1.1    dante 		return (error);
    157   1.1    dante 	}
    158   1.1    dante 	return (0);
    159   1.1    dante }
    160   1.1    dante 
    161   1.1    dante 
    162   1.1    dante /*
    163   1.1    dante  * Create a set of ccbs and add them to the free list.  Called once
    164   1.1    dante  * by adv_init().  We return the number of CCBs successfully created.
    165   1.1    dante  */
    166   1.1    dante static int
    167   1.1    dante adv_create_ccbs(sc, ccbstore, count)
    168   1.1    dante 	ASC_SOFTC      *sc;
    169   1.1    dante 	ADV_CCB        *ccbstore;
    170   1.1    dante 	int             count;
    171   1.1    dante {
    172   1.1    dante 	ADV_CCB        *ccb;
    173   1.1    dante 	int             i, error;
    174   1.1    dante 
    175   1.1    dante 	bzero(ccbstore, sizeof(ADV_CCB) * count);
    176   1.1    dante 	for (i = 0; i < count; i++) {
    177   1.1    dante 		ccb = &ccbstore[i];
    178   1.1    dante 		if ((error = adv_init_ccb(sc, ccb)) != 0) {
    179   1.1    dante 			printf("%s: unable to initialize ccb, error = %d\n",
    180   1.1    dante 			       sc->sc_dev.dv_xname, error);
    181   1.1    dante 			return (i);
    182   1.1    dante 		}
    183   1.1    dante 		TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain);
    184   1.1    dante 	}
    185   1.1    dante 
    186   1.1    dante 	return (i);
    187   1.1    dante }
    188   1.1    dante 
    189   1.1    dante 
    190   1.1    dante /*
    191   1.1    dante  * A ccb is put onto the free list.
    192   1.1    dante  */
    193   1.1    dante static void
    194   1.1    dante adv_free_ccb(sc, ccb)
    195   1.1    dante 	ASC_SOFTC      *sc;
    196   1.1    dante 	ADV_CCB        *ccb;
    197   1.1    dante {
    198   1.1    dante 	int             s;
    199   1.1    dante 
    200   1.1    dante 	s = splbio();
    201   1.1    dante 
    202   1.1    dante 	adv_reset_ccb(ccb);
    203   1.1    dante 	TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
    204   1.1    dante 
    205   1.1    dante 	/*
    206   1.1    dante          * If there were none, wake anybody waiting for one to come free,
    207   1.1    dante          * starting with queued entries.
    208   1.1    dante          */
    209   1.1    dante 	if (ccb->chain.tqe_next == 0)
    210   1.1    dante 		wakeup(&sc->sc_free_ccb);
    211   1.1    dante 
    212   1.1    dante 	splx(s);
    213   1.1    dante }
    214   1.1    dante 
    215   1.1    dante 
    216   1.1    dante static void
    217   1.1    dante adv_reset_ccb(ccb)
    218   1.1    dante 	ADV_CCB        *ccb;
    219   1.1    dante {
    220   1.1    dante 
    221   1.1    dante 	ccb->flags = 0;
    222   1.1    dante }
    223   1.1    dante 
    224   1.1    dante 
    225   1.1    dante static int
    226   1.1    dante adv_init_ccb(sc, ccb)
    227   1.1    dante 	ASC_SOFTC      *sc;
    228   1.1    dante 	ADV_CCB        *ccb;
    229   1.1    dante {
    230  1.10    dante 	int	hashnum, error;
    231   1.1    dante 
    232   1.1    dante 	/*
    233   1.1    dante          * Create the DMA map for this CCB.
    234   1.1    dante          */
    235   1.1    dante 	error = bus_dmamap_create(sc->sc_dmat,
    236   1.1    dante 				  (ASC_MAX_SG_LIST - 1) * PAGE_SIZE,
    237   1.1    dante 			 ASC_MAX_SG_LIST, (ASC_MAX_SG_LIST - 1) * PAGE_SIZE,
    238   1.1    dante 		   0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer);
    239   1.1    dante 	if (error) {
    240   1.1    dante 		printf("%s: unable to create DMA map, error = %d\n",
    241   1.1    dante 		       sc->sc_dev.dv_xname, error);
    242   1.1    dante 		return (error);
    243   1.1    dante 	}
    244  1.10    dante 
    245  1.10    dante 	/*
    246  1.10    dante 	 * put in the phystokv hash table
    247  1.10    dante 	 * Never gets taken out.
    248  1.10    dante 	 */
    249  1.10    dante 	ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr +
    250  1.10    dante 	    ADV_CCB_OFF(ccb);
    251  1.10    dante 	hashnum = CCB_HASH(ccb->hashkey);
    252  1.10    dante 	ccb->nexthash = sc->sc_ccbhash[hashnum];
    253  1.10    dante 	sc->sc_ccbhash[hashnum] = ccb;
    254  1.10    dante 
    255   1.1    dante 	adv_reset_ccb(ccb);
    256   1.1    dante 	return (0);
    257   1.1    dante }
    258   1.1    dante 
    259   1.1    dante 
    260   1.1    dante /*
    261   1.1    dante  * Get a free ccb
    262   1.1    dante  *
    263   1.1    dante  * If there are none, see if we can allocate a new one
    264   1.1    dante  */
    265   1.1    dante static ADV_CCB *
    266   1.1    dante adv_get_ccb(sc, flags)
    267   1.1    dante 	ASC_SOFTC      *sc;
    268   1.1    dante 	int             flags;
    269   1.1    dante {
    270   1.1    dante 	ADV_CCB        *ccb = 0;
    271   1.1    dante 	int             s;
    272   1.1    dante 
    273   1.1    dante 	s = splbio();
    274   1.1    dante 
    275   1.1    dante 	/*
    276   1.1    dante          * If we can and have to, sleep waiting for one to come free
    277   1.1    dante          * but only if we can't allocate a new one.
    278   1.1    dante          */
    279   1.1    dante 	for (;;) {
    280   1.1    dante 		ccb = sc->sc_free_ccb.tqh_first;
    281   1.1    dante 		if (ccb) {
    282   1.1    dante 			TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
    283   1.1    dante 			break;
    284   1.1    dante 		}
    285   1.1    dante 		if ((flags & SCSI_NOSLEEP) != 0)
    286   1.1    dante 			goto out;
    287   1.1    dante 
    288   1.1    dante 		tsleep(&sc->sc_free_ccb, PRIBIO, "advccb", 0);
    289   1.1    dante 	}
    290   1.1    dante 
    291   1.1    dante 	ccb->flags |= CCB_ALLOC;
    292   1.1    dante 
    293   1.1    dante out:
    294   1.1    dante 	splx(s);
    295   1.1    dante 	return (ccb);
    296   1.1    dante }
    297   1.1    dante 
    298   1.1    dante 
    299   1.1    dante /*
    300  1.10    dante  * Given a physical address, find the ccb that it corresponds to.
    301  1.10    dante  */
    302  1.10    dante ADV_CCB *
    303  1.10    dante adv_ccb_phys_kv(sc, ccb_phys)
    304  1.10    dante 	ASC_SOFTC	*sc;
    305  1.10    dante 	u_long		ccb_phys;
    306  1.10    dante {
    307  1.10    dante 	int hashnum = CCB_HASH(ccb_phys);
    308  1.10    dante 	ADV_CCB *ccb = sc->sc_ccbhash[hashnum];
    309  1.10    dante 
    310  1.10    dante 	while (ccb) {
    311  1.10    dante 		if (ccb->hashkey == ccb_phys)
    312  1.10    dante 			break;
    313  1.10    dante 		ccb = ccb->nexthash;
    314  1.10    dante 	}
    315  1.10    dante 	return (ccb);
    316  1.10    dante }
    317  1.10    dante 
    318  1.10    dante 
    319  1.10    dante /*
    320   1.1    dante  * Queue a CCB to be sent to the controller, and send it if possible.
    321   1.1    dante  */
    322   1.1    dante static void
    323   1.1    dante adv_queue_ccb(sc, ccb)
    324   1.1    dante 	ASC_SOFTC      *sc;
    325   1.1    dante 	ADV_CCB        *ccb;
    326   1.1    dante {
    327   1.1    dante 
    328   1.1    dante 	TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
    329   1.1    dante 
    330   1.1    dante 	adv_start_ccbs(sc);
    331   1.1    dante }
    332   1.1    dante 
    333   1.1    dante 
    334   1.1    dante static void
    335   1.1    dante adv_start_ccbs(sc)
    336   1.1    dante 	ASC_SOFTC      *sc;
    337   1.1    dante {
    338   1.1    dante 	ADV_CCB        *ccb;
    339   1.1    dante 
    340   1.1    dante 	while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) {
    341   1.1    dante 		if (ccb->flags & CCB_WATCHDOG)
    342   1.1    dante 			untimeout(adv_watchdog, ccb);
    343   1.1    dante 
    344   1.1    dante 		if (AscExeScsiQueue(sc, &ccb->scsiq) == ASC_BUSY) {
    345   1.1    dante 			ccb->flags |= CCB_WATCHDOG;
    346   1.1    dante 			timeout(adv_watchdog, ccb,
    347   1.1    dante 				(ADV_WATCH_TIMEOUT * hz) / 1000);
    348   1.1    dante 			break;
    349   1.1    dante 		}
    350   1.1    dante 		TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
    351   1.1    dante 
    352   1.1    dante 		if ((ccb->xs->flags & SCSI_POLL) == 0)
    353   1.1    dante 			timeout(adv_timeout, ccb, (ccb->timeout * hz) / 1000);
    354   1.1    dante 	}
    355   1.1    dante }
    356   1.1    dante 
    357   1.1    dante 
    358   1.1    dante /******************************************************************************/
    359   1.1    dante /*                      DMA able memory allocation routines                   */
    360   1.1    dante /******************************************************************************/
    361   1.1    dante 
    362   1.1    dante 
    363   1.1    dante /*
    364   1.1    dante  * Allocate a DMA able memory for overrun_buffer.
    365   1.1    dante  * This memory can be safely shared among all the AdvanSys boards.
    366   1.1    dante  */
    367   1.1    dante u_int8_t       *
    368   1.1    dante adv_alloc_overrunbuf(dvname, dmat)
    369   1.1    dante 	char           *dvname;
    370   1.1    dante 	bus_dma_tag_t   dmat;
    371   1.1    dante {
    372   1.1    dante 	static u_int8_t *overrunbuf = NULL;
    373   1.1    dante 
    374   1.1    dante 	bus_dmamap_t    ovrbuf_dmamap;
    375   1.1    dante 	bus_dma_segment_t seg;
    376   1.1    dante 	int             rseg, error;
    377   1.1    dante 
    378   1.1    dante 
    379   1.1    dante 	/*
    380   1.1    dante          * if an overrun buffer has been already allocated don't allocate it
    381   1.1    dante          * again. Instead return the address of the allocated buffer.
    382   1.1    dante          */
    383   1.1    dante 	if (overrunbuf)
    384   1.1    dante 		return (overrunbuf);
    385   1.1    dante 
    386   1.1    dante 
    387   1.1    dante 	if ((error = bus_dmamem_alloc(dmat, ASC_OVERRUN_BSIZE,
    388   1.1    dante 			   NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
    389   1.1    dante 		printf("%s: unable to allocate overrun buffer, error = %d\n",
    390   1.1    dante 		       dvname, error);
    391   1.1    dante 		return (0);
    392   1.1    dante 	}
    393   1.1    dante 	if ((error = bus_dmamem_map(dmat, &seg, rseg, ASC_OVERRUN_BSIZE,
    394   1.1    dante 	(caddr_t *) & overrunbuf, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
    395   1.1    dante 		printf("%s: unable to map overrun buffer, error = %d\n",
    396   1.1    dante 		       dvname, error);
    397   1.1    dante 
    398   1.1    dante 		bus_dmamem_free(dmat, &seg, 1);
    399   1.1    dante 		return (0);
    400   1.1    dante 	}
    401   1.1    dante 	if ((error = bus_dmamap_create(dmat, ASC_OVERRUN_BSIZE, 1,
    402   1.1    dante 	      ASC_OVERRUN_BSIZE, 0, BUS_DMA_NOWAIT, &ovrbuf_dmamap)) != 0) {
    403   1.1    dante 		printf("%s: unable to create overrun buffer DMA map,"
    404   1.1    dante 		       " error = %d\n", dvname, error);
    405   1.1    dante 
    406   1.1    dante 		bus_dmamem_unmap(dmat, overrunbuf, ASC_OVERRUN_BSIZE);
    407   1.1    dante 		bus_dmamem_free(dmat, &seg, 1);
    408   1.1    dante 		return (0);
    409   1.1    dante 	}
    410   1.1    dante 	if ((error = bus_dmamap_load(dmat, ovrbuf_dmamap, overrunbuf,
    411   1.1    dante 			   ASC_OVERRUN_BSIZE, NULL, BUS_DMA_NOWAIT)) != 0) {
    412   1.1    dante 		printf("%s: unable to load overrun buffer DMA map,"
    413   1.1    dante 		       " error = %d\n", dvname, error);
    414   1.1    dante 
    415   1.1    dante 		bus_dmamap_destroy(dmat, ovrbuf_dmamap);
    416   1.1    dante 		bus_dmamem_unmap(dmat, overrunbuf, ASC_OVERRUN_BSIZE);
    417   1.1    dante 		bus_dmamem_free(dmat, &seg, 1);
    418   1.1    dante 		return (0);
    419   1.1    dante 	}
    420   1.1    dante 	return (overrunbuf);
    421   1.1    dante }
    422   1.1    dante 
    423   1.1    dante 
    424   1.1    dante /******************************************************************************/
    425   1.1    dante /*                         SCSI layer interfacing routines                    */
    426   1.1    dante /******************************************************************************/
    427   1.1    dante 
    428   1.1    dante 
    429   1.1    dante int
    430   1.1    dante adv_init(sc)
    431   1.1    dante 	ASC_SOFTC      *sc;
    432   1.1    dante {
    433   1.1    dante 	int             warn;
    434   1.1    dante 
    435  1.12    dante 	if (!AscFindSignature(sc->sc_iot, sc->sc_ioh)) {
    436  1.12    dante 		printf("adv_init: failed to find signature\n");
    437  1.12    dante 		return (1);
    438  1.12    dante 	}
    439   1.1    dante 
    440   1.4    dante 	/*
    441   1.4    dante          * Read the board configuration
    442   1.4    dante          */
    443   1.4    dante 	AscInitASC_SOFTC(sc);
    444   1.4    dante 	warn = AscInitFromEEP(sc);
    445   1.4    dante 	if (warn) {
    446   1.4    dante 		printf("%s -get: ", sc->sc_dev.dv_xname);
    447   1.4    dante 		switch (warn) {
    448   1.4    dante 		case -1:
    449   1.4    dante 			printf("Chip is not halted\n");
    450   1.4    dante 			break;
    451   1.4    dante 
    452   1.4    dante 		case -2:
    453   1.4    dante 			printf("Couldn't get MicroCode Start"
    454   1.4    dante 			       " address\n");
    455   1.4    dante 			break;
    456   1.4    dante 
    457   1.4    dante 		case ASC_WARN_IO_PORT_ROTATE:
    458   1.4    dante 			printf("I/O port address modified\n");
    459   1.4    dante 			break;
    460   1.4    dante 
    461   1.4    dante 		case ASC_WARN_AUTO_CONFIG:
    462   1.4    dante 			printf("I/O port increment switch enabled\n");
    463   1.4    dante 			break;
    464   1.4    dante 
    465   1.4    dante 		case ASC_WARN_EEPROM_CHKSUM:
    466   1.4    dante 			printf("EEPROM checksum error\n");
    467   1.4    dante 			break;
    468   1.4    dante 
    469   1.4    dante 		case ASC_WARN_IRQ_MODIFIED:
    470   1.4    dante 			printf("IRQ modified\n");
    471   1.4    dante 			break;
    472   1.4    dante 
    473   1.4    dante 		case ASC_WARN_CMD_QNG_CONFLICT:
    474   1.4    dante 			printf("tag queuing enabled w/o disconnects\n");
    475   1.4    dante 			break;
    476   1.1    dante 
    477   1.4    dante 		default:
    478   1.4    dante 			printf("unknown warning %d\n", warn);
    479   1.1    dante 		}
    480   1.4    dante 	}
    481   1.4    dante 	if (sc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT)
    482   1.4    dante 		sc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT;
    483   1.4    dante 
    484   1.4    dante 	/*
    485   1.4    dante          * Modify the board configuration
    486   1.4    dante          */
    487   1.4    dante 	warn = AscInitFromASC_SOFTC(sc);
    488   1.4    dante 	if (warn) {
    489   1.4    dante 		printf("%s -set: ", sc->sc_dev.dv_xname);
    490   1.4    dante 		switch (warn) {
    491   1.4    dante 		case ASC_WARN_CMD_QNG_CONFLICT:
    492   1.4    dante 			printf("tag queuing enabled w/o disconnects\n");
    493   1.4    dante 			break;
    494   1.1    dante 
    495   1.4    dante 		case ASC_WARN_AUTO_CONFIG:
    496   1.4    dante 			printf("I/O port increment switch enabled\n");
    497   1.4    dante 			break;
    498   1.1    dante 
    499   1.4    dante 		default:
    500   1.4    dante 			printf("unknown warning %d\n", warn);
    501   1.1    dante 		}
    502   1.4    dante 	}
    503  1.11    dante 	sc->isr_callback = (ASC_CALLBACK) adv_narrow_isr_callback;
    504   1.1    dante 
    505   1.4    dante 	if (!(sc->overrun_buf = adv_alloc_overrunbuf(sc->sc_dev.dv_xname,
    506   1.4    dante 						     sc->sc_dmat))) {
    507  1.12    dante 		panic("adv_init: adv_alloc_overrunbuf failed");
    508   1.1    dante 	}
    509   1.1    dante 
    510   1.1    dante 	return (0);
    511   1.1    dante }
    512   1.1    dante 
    513   1.1    dante 
    514   1.1    dante void
    515   1.1    dante adv_attach(sc)
    516   1.1    dante 	ASC_SOFTC      *sc;
    517   1.1    dante {
    518   1.1    dante 	int             i, error;
    519   1.1    dante 
    520   1.4    dante 	/*
    521   1.4    dante          * Initialize board RISC chip and enable interrupts.
    522   1.4    dante          */
    523   1.4    dante 	switch (AscInitDriver(sc)) {
    524   1.4    dante 	case 0:
    525   1.4    dante 		/* AllOK */
    526   1.4    dante 		break;
    527   1.1    dante 
    528   1.4    dante 	case 1:
    529   1.4    dante 		panic("%s: bad signature", sc->sc_dev.dv_xname);
    530   1.4    dante 		break;
    531   1.1    dante 
    532   1.4    dante 	case 2:
    533   1.4    dante 		panic("%s: unable to load MicroCode",
    534   1.4    dante 		      sc->sc_dev.dv_xname);
    535   1.4    dante 		break;
    536   1.1    dante 
    537   1.4    dante 	case 3:
    538   1.4    dante 		panic("%s: unable to initialize MicroCode",
    539   1.4    dante 		      sc->sc_dev.dv_xname);
    540   1.4    dante 		break;
    541   1.1    dante 
    542   1.4    dante 	default:
    543   1.4    dante 		panic("%s: unable to initialize board RISC chip",
    544   1.4    dante 		      sc->sc_dev.dv_xname);
    545   1.1    dante 	}
    546   1.1    dante 
    547   1.7  thorpej 	/*
    548   1.7  thorpej 	 * Fill in the adapter.
    549   1.7  thorpej 	 */
    550   1.7  thorpej 	sc->sc_adapter.scsipi_cmd = adv_scsi_cmd;
    551   1.7  thorpej 	sc->sc_adapter.scsipi_minphys = advminphys;
    552   1.1    dante 
    553   1.1    dante 	/*
    554   1.1    dante          * fill in the prototype scsipi_link.
    555   1.1    dante          */
    556   1.1    dante 	sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
    557   1.1    dante 	sc->sc_link.adapter_softc = sc;
    558   1.1    dante 	sc->sc_link.scsipi_scsi.adapter_target = sc->chip_scsi_id;
    559   1.7  thorpej 	sc->sc_link.adapter = &sc->sc_adapter;
    560   1.1    dante 	sc->sc_link.device = &adv_dev;
    561   1.1    dante 	sc->sc_link.openings = 4;
    562   1.4    dante 	sc->sc_link.scsipi_scsi.max_target = 7;
    563   1.8   mjacob 	sc->sc_link.scsipi_scsi.max_lun = 7;
    564   1.1    dante 	sc->sc_link.type = BUS_SCSI;
    565   1.1    dante 
    566   1.1    dante 
    567   1.1    dante 	TAILQ_INIT(&sc->sc_free_ccb);
    568   1.1    dante 	TAILQ_INIT(&sc->sc_waiting_ccb);
    569   1.9  thorpej 	TAILQ_INIT(&sc->sc_queue);
    570   1.1    dante 
    571   1.1    dante 
    572   1.1    dante 	/*
    573   1.1    dante          * Allocate the Control Blocks.
    574   1.1    dante          */
    575   1.1    dante 	error = adv_alloc_ccbs(sc);
    576   1.1    dante 	if (error)
    577  1.12    dante 		return; /* (error) */
    578   1.1    dante 
    579   1.1    dante 	/*
    580   1.1    dante          * Create and initialize the Control Blocks.
    581   1.1    dante          */
    582   1.1    dante 	i = adv_create_ccbs(sc, sc->sc_control->ccbs, ADV_MAX_CCB);
    583   1.1    dante 	if (i == 0) {
    584   1.1    dante 		printf("%s: unable to create control blocks\n",
    585   1.1    dante 		       sc->sc_dev.dv_xname);
    586   1.1    dante 		return; /* (ENOMEM) */ ;
    587   1.1    dante 	} else if (i != ADV_MAX_CCB) {
    588   1.1    dante 		printf("%s: WARNING: only %d of %d control blocks created\n",
    589   1.1    dante 		       sc->sc_dev.dv_xname, i, ADV_MAX_CCB);
    590   1.1    dante 	}
    591   1.1    dante 	config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
    592   1.1    dante }
    593   1.1    dante 
    594   1.1    dante 
    595   1.1    dante static void
    596   1.1    dante advminphys(bp)
    597   1.1    dante 	struct buf     *bp;
    598   1.1    dante {
    599   1.1    dante 
    600   1.1    dante 	if (bp->b_bcount > ((ASC_MAX_SG_LIST - 1) * PAGE_SIZE))
    601   1.1    dante 		bp->b_bcount = ((ASC_MAX_SG_LIST - 1) * PAGE_SIZE);
    602   1.1    dante 	minphys(bp);
    603   1.1    dante }
    604   1.1    dante 
    605   1.1    dante 
    606   1.1    dante /*
    607   1.1    dante  * start a scsi operation given the command and the data address.  Also needs
    608   1.1    dante  * the unit, target and lu.
    609   1.1    dante  */
    610   1.1    dante static int
    611   1.1    dante adv_scsi_cmd(xs)
    612   1.1    dante 	struct scsipi_xfer *xs;
    613   1.1    dante {
    614   1.1    dante 	struct scsipi_link *sc_link = xs->sc_link;
    615   1.1    dante 	ASC_SOFTC      *sc = sc_link->adapter_softc;
    616   1.1    dante 	bus_dma_tag_t   dmat = sc->sc_dmat;
    617   1.1    dante 	ADV_CCB        *ccb;
    618   1.1    dante 	int             s, flags, error, nsegs;
    619   1.1    dante 	int             fromqueue = 1, dontqueue = 0;
    620   1.1    dante 
    621   1.1    dante 
    622   1.1    dante 	s = splbio();		/* protect the queue */
    623   1.1    dante 
    624   1.1    dante 	/*
    625   1.1    dante          * If we're running the queue from adv_done(), we've been
    626   1.1    dante          * called with the first queue entry as our argument.
    627   1.1    dante          */
    628   1.9  thorpej 	if (xs == TAILQ_FIRST(&sc->sc_queue)) {
    629   1.9  thorpej 		TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
    630   1.1    dante 		fromqueue = 1;
    631   1.1    dante 	} else {
    632   1.1    dante 
    633   1.1    dante 		/* Polled requests can't be queued for later. */
    634   1.1    dante 		dontqueue = xs->flags & SCSI_POLL;
    635   1.1    dante 
    636   1.1    dante 		/*
    637   1.1    dante                  * If there are jobs in the queue, run them first.
    638   1.1    dante                  */
    639   1.9  thorpej 		if (TAILQ_FIRST(&sc->sc_queue) != NULL) {
    640   1.1    dante 			/*
    641   1.1    dante                          * If we can't queue, we have to abort, since
    642   1.1    dante                          * we have to preserve order.
    643   1.1    dante                          */
    644   1.1    dante 			if (dontqueue) {
    645   1.1    dante 				splx(s);
    646   1.1    dante 				xs->error = XS_DRIVER_STUFFUP;
    647   1.1    dante 				return (TRY_AGAIN_LATER);
    648   1.1    dante 			}
    649   1.1    dante 			/*
    650   1.1    dante                          * Swap with the first queue entry.
    651   1.1    dante                          */
    652   1.9  thorpej 			TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q);
    653   1.9  thorpej 			xs = TAILQ_FIRST(&sc->sc_queue);
    654   1.9  thorpej 			TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
    655   1.1    dante 			fromqueue = 1;
    656   1.1    dante 		}
    657   1.1    dante 	}
    658   1.1    dante 
    659   1.1    dante 
    660   1.1    dante 	/*
    661   1.1    dante          * get a ccb to use. If the transfer
    662   1.1    dante          * is from a buf (possibly from interrupt time)
    663   1.1    dante          * then we can't allow it to sleep
    664   1.1    dante          */
    665   1.1    dante 
    666   1.1    dante 	flags = xs->flags;
    667   1.1    dante 	if ((ccb = adv_get_ccb(sc, flags)) == NULL) {
    668   1.1    dante 		/*
    669   1.1    dante                  * If we can't queue, we lose.
    670   1.1    dante                  */
    671   1.1    dante 		if (dontqueue) {
    672   1.1    dante 			splx(s);
    673   1.1    dante 			xs->error = XS_DRIVER_STUFFUP;
    674   1.1    dante 			return (TRY_AGAIN_LATER);
    675   1.1    dante 		}
    676   1.1    dante 		/*
    677   1.1    dante                  * Stuff ourselves into the queue, in front
    678   1.1    dante                  * if we came off in the first place.
    679   1.1    dante                  */
    680   1.9  thorpej 		if (fromqueue)
    681   1.9  thorpej 			TAILQ_INSERT_HEAD(&sc->sc_queue, xs, adapter_q);
    682   1.9  thorpej 		else
    683   1.9  thorpej 			TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q);
    684   1.1    dante 		splx(s);
    685   1.1    dante 		return (SUCCESSFULLY_QUEUED);
    686   1.1    dante 	}
    687   1.1    dante 	splx(s);		/* done playing with the queue */
    688   1.1    dante 
    689   1.1    dante 	ccb->xs = xs;
    690   1.1    dante 	ccb->timeout = xs->timeout;
    691   1.1    dante 
    692   1.1    dante 	/*
    693   1.1    dante          * Build up the request
    694   1.1    dante          */
    695   1.1    dante 	memset(&ccb->scsiq, 0, sizeof(ASC_SCSI_Q));
    696   1.1    dante 
    697  1.10    dante 	ccb->scsiq.q2.ccb_ptr = sc->sc_dmamap_control->dm_segs[0].ds_addr +
    698  1.10    dante 		    ADV_CCB_OFF(ccb);
    699   1.1    dante 
    700   1.1    dante 	ccb->scsiq.cdbptr = &xs->cmd->opcode;
    701   1.1    dante 	ccb->scsiq.q2.cdb_len = xs->cmdlen;
    702   1.1    dante 	ccb->scsiq.q1.target_id = ASC_TID_TO_TARGET_ID(sc_link->scsipi_scsi.target);
    703   1.1    dante 	ccb->scsiq.q1.target_lun = sc_link->scsipi_scsi.lun;
    704   1.1    dante 	ccb->scsiq.q2.target_ix = ASC_TIDLUN_TO_IX(sc_link->scsipi_scsi.target,
    705   1.1    dante 						   sc_link->scsipi_scsi.lun);
    706   1.1    dante 	ccb->scsiq.q1.sense_addr = sc->sc_dmamap_control->dm_segs[0].ds_addr +
    707   1.1    dante 		ADV_CCB_OFF(ccb) + offsetof(struct adv_ccb, scsi_sense);
    708   1.1    dante 	ccb->scsiq.q1.sense_len = sizeof(struct scsipi_sense_data);
    709   1.1    dante 
    710   1.1    dante 	/*
    711   1.1    dante          * If  there  are  any  outstanding  requests  for  the  current target,
    712   1.1    dante          * then  every  255th request  send an  ORDERED request.  This heuristic
    713   1.1    dante          * tries  to  retain  the  benefit  of request  sorting while preventing
    714   1.1    dante          * request starvation. 255 is the max number of tags or pending commands
    715   1.1    dante          * a device may have outstanding.
    716   1.1    dante          */
    717   1.1    dante 	sc->reqcnt[sc_link->scsipi_scsi.target]++;
    718   1.1    dante 	if ((sc->reqcnt[sc_link->scsipi_scsi.target] > 0) &&
    719   1.1    dante 	    (sc->reqcnt[sc_link->scsipi_scsi.target] % 255) == 0) {
    720   1.1    dante 		ccb->scsiq.q2.tag_code = M2_QTAG_MSG_ORDERED;
    721   1.1    dante 	} else {
    722   1.1    dante 		ccb->scsiq.q2.tag_code = M2_QTAG_MSG_SIMPLE;
    723   1.1    dante 	}
    724   1.1    dante 
    725   1.1    dante 
    726   1.1    dante 	if (xs->datalen) {
    727   1.1    dante 		/*
    728   1.1    dante                  * Map the DMA transfer.
    729   1.1    dante                  */
    730   1.1    dante #ifdef TFS
    731   1.1    dante 		if (flags & SCSI_DATA_UIO) {
    732   1.1    dante 			error = bus_dmamap_load_uio(dmat,
    733   1.1    dante 				  ccb->dmamap_xfer, (struct uio *) xs->data,
    734   1.1    dante 						    (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
    735   1.1    dante 		} else
    736   1.1    dante #endif				/* TFS */
    737   1.1    dante 		{
    738   1.1    dante 			error = bus_dmamap_load(dmat,
    739   1.1    dante 			      ccb->dmamap_xfer, xs->data, xs->datalen, NULL,
    740   1.1    dante 						(flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
    741   1.1    dante 		}
    742   1.1    dante 
    743   1.1    dante 		if (error) {
    744   1.1    dante 			if (error == EFBIG) {
    745   1.1    dante 				printf("%s: adv_scsi_cmd, more than %d dma"
    746   1.1    dante 				       " segments\n",
    747   1.1    dante 				       sc->sc_dev.dv_xname, ASC_MAX_SG_LIST);
    748   1.1    dante 			} else {
    749   1.1    dante 				printf("%s: adv_scsi_cmd, error %d loading"
    750   1.1    dante 				       " dma map\n",
    751   1.1    dante 				       sc->sc_dev.dv_xname, error);
    752   1.1    dante 			}
    753   1.1    dante 
    754   1.1    dante 			xs->error = XS_DRIVER_STUFFUP;
    755   1.1    dante 			adv_free_ccb(sc, ccb);
    756   1.1    dante 			return (COMPLETE);
    757   1.1    dante 		}
    758   1.1    dante 		bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
    759   1.1    dante 				ccb->dmamap_xfer->dm_mapsize,
    760   1.1    dante 			      (flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD :
    761   1.1    dante 				BUS_DMASYNC_PREWRITE);
    762   1.1    dante 
    763   1.1    dante 
    764   1.1    dante 		memset(&ccb->sghead, 0, sizeof(ASC_SG_HEAD));
    765   1.1    dante 
    766   1.1    dante 		for (nsegs = 0; nsegs < ccb->dmamap_xfer->dm_nsegs; nsegs++) {
    767   1.1    dante 
    768   1.1    dante 			ccb->sghead.sg_list[nsegs].addr =
    769   1.1    dante 				ccb->dmamap_xfer->dm_segs[nsegs].ds_addr;
    770   1.1    dante 			ccb->sghead.sg_list[nsegs].bytes =
    771   1.1    dante 				ccb->dmamap_xfer->dm_segs[nsegs].ds_len;
    772   1.1    dante 		}
    773   1.1    dante 
    774   1.1    dante 		ccb->sghead.entry_cnt = ccb->scsiq.q1.sg_queue_cnt =
    775   1.1    dante 			ccb->dmamap_xfer->dm_nsegs;
    776   1.1    dante 
    777   1.1    dante 		ccb->scsiq.q1.cntl |= ASC_QC_SG_HEAD;
    778   1.1    dante 		ccb->scsiq.sg_head = &ccb->sghead;
    779   1.1    dante 		ccb->scsiq.q1.data_addr = 0;
    780   1.1    dante 		ccb->scsiq.q1.data_cnt = 0;
    781   1.1    dante 	} else {
    782   1.1    dante 		/*
    783   1.1    dante                  * No data xfer, use non S/G values.
    784   1.1    dante                  */
    785   1.1    dante 		ccb->scsiq.q1.data_addr = 0;
    786   1.1    dante 		ccb->scsiq.q1.data_cnt = 0;
    787   1.1    dante 	}
    788   1.1    dante 
    789   1.6    dante #ifdef ASC_DEBUG
    790   1.6    dante 	printf("id = %d, lun = %d, cmd = %d, ccb = 0x%lX \n",
    791   1.6    dante 			sc_link->scsipi_scsi.target,
    792   1.6    dante 			sc_link->scsipi_scsi.lun, xs->cmd->opcode,
    793   1.6    dante 			(unsigned long)ccb);
    794   1.6    dante #endif
    795   1.1    dante 	s = splbio();
    796   1.1    dante 	adv_queue_ccb(sc, ccb);
    797   1.1    dante 	splx(s);
    798   1.1    dante 
    799   1.1    dante 	/*
    800   1.1    dante          * Usually return SUCCESSFULLY QUEUED
    801   1.1    dante          */
    802   1.1    dante 	if ((flags & SCSI_POLL) == 0)
    803   1.1    dante 		return (SUCCESSFULLY_QUEUED);
    804   1.1    dante 
    805   1.1    dante 	/*
    806   1.1    dante          * If we can't use interrupts, poll on completion
    807   1.1    dante          */
    808   1.1    dante 	if (adv_poll(sc, xs, ccb->timeout)) {
    809   1.1    dante 		adv_timeout(ccb);
    810   1.1    dante 		if (adv_poll(sc, xs, ccb->timeout))
    811   1.1    dante 			adv_timeout(ccb);
    812   1.1    dante 	}
    813   1.1    dante 	return (COMPLETE);
    814   1.1    dante }
    815   1.1    dante 
    816   1.1    dante 
    817   1.1    dante int
    818   1.1    dante adv_intr(arg)
    819   1.1    dante 	void           *arg;
    820   1.1    dante {
    821   1.1    dante 	ASC_SOFTC      *sc = arg;
    822   1.1    dante 	struct scsipi_xfer *xs;
    823   1.1    dante 
    824   1.6    dante #ifdef ASC_DEBUG
    825   1.6    dante 	int int_pend = FALSE;
    826   1.6    dante 
    827   1.6    dante 	if(ASC_IS_INT_PENDING(sc->sc_iot, sc->sc_ioh))
    828   1.6    dante 	{
    829   1.6    dante 		int_pend = TRUE;
    830   1.6    dante 		printf("ISR - ");
    831   1.6    dante 	}
    832   1.6    dante #endif
    833   1.4    dante 	AscISR(sc);
    834   1.6    dante #ifdef ASC_DEBUG
    835   1.6    dante 	if(int_pend)
    836   1.6    dante 		printf("\n");
    837   1.6    dante #endif
    838   1.1    dante 
    839   1.1    dante 	/*
    840   1.1    dante          * If there are queue entries in the software queue, try to
    841   1.1    dante          * run the first one.  We should be more or less guaranteed
    842   1.1    dante          * to succeed, since we just freed a CCB.
    843   1.1    dante          *
    844   1.1    dante          * NOTE: adv_scsi_cmd() relies on our calling it with
    845   1.1    dante          * the first entry in the queue.
    846   1.1    dante          */
    847   1.9  thorpej 	if ((xs = TAILQ_FIRST(&sc->sc_queue)) != NULL)
    848   1.1    dante 		(void) adv_scsi_cmd(xs);
    849   1.1    dante 
    850   1.1    dante 	return (1);
    851   1.1    dante }
    852   1.1    dante 
    853   1.1    dante 
    854   1.1    dante /*
    855   1.1    dante  * Poll a particular unit, looking for a particular xs
    856   1.1    dante  */
    857   1.1    dante static int
    858   1.1    dante adv_poll(sc, xs, count)
    859   1.1    dante 	ASC_SOFTC      *sc;
    860   1.1    dante 	struct scsipi_xfer *xs;
    861   1.1    dante 	int             count;
    862   1.1    dante {
    863   1.1    dante 
    864   1.1    dante 	/* timeouts are in msec, so we loop in 1000 usec cycles */
    865   1.1    dante 	while (count) {
    866   1.1    dante 		adv_intr(sc);
    867   1.1    dante 		if (xs->flags & ITSDONE)
    868   1.1    dante 			return (0);
    869   1.1    dante 		delay(1000);	/* only happens in boot so ok */
    870   1.1    dante 		count--;
    871   1.1    dante 	}
    872   1.1    dante 	return (1);
    873   1.1    dante }
    874   1.1    dante 
    875   1.1    dante 
    876   1.1    dante static void
    877   1.1    dante adv_timeout(arg)
    878   1.1    dante 	void           *arg;
    879   1.1    dante {
    880   1.1    dante 	ADV_CCB        *ccb = arg;
    881   1.1    dante 	struct scsipi_xfer *xs = ccb->xs;
    882   1.1    dante 	struct scsipi_link *sc_link = xs->sc_link;
    883   1.1    dante 	ASC_SOFTC      *sc = sc_link->adapter_softc;
    884   1.1    dante 	int             s;
    885   1.1    dante 
    886   1.1    dante 	scsi_print_addr(sc_link);
    887   1.1    dante 	printf("timed out");
    888   1.1    dante 
    889   1.1    dante 	s = splbio();
    890   1.1    dante 
    891   1.1    dante 	/*
    892   1.1    dante          * If it has been through before, then a previous abort has failed,
    893   1.1    dante          * don't try abort again, reset the bus instead.
    894   1.1    dante          */
    895   1.1    dante 	if (ccb->flags & CCB_ABORT) {
    896   1.1    dante 		/* abort timed out */
    897   1.1    dante 		printf(" AGAIN. Resetting Bus\n");
    898   1.1    dante 		/* Lets try resetting the bus! */
    899   1.1    dante 		if (AscResetBus(sc) == ASC_ERROR) {
    900   1.1    dante 			ccb->timeout = sc->scsi_reset_wait;
    901   1.1    dante 			adv_queue_ccb(sc, ccb);
    902   1.1    dante 		}
    903   1.1    dante 	} else {
    904   1.1    dante 		/* abort the operation that has timed out */
    905   1.1    dante 		printf("\n");
    906  1.10    dante 		AscAbortCCB(sc, ccb);
    907   1.1    dante 		ccb->xs->error = XS_TIMEOUT;
    908   1.1    dante 		ccb->timeout = ADV_ABORT_TIMEOUT;
    909   1.1    dante 		ccb->flags |= CCB_ABORT;
    910   1.1    dante 		adv_queue_ccb(sc, ccb);
    911   1.1    dante 	}
    912   1.1    dante 
    913   1.1    dante 	splx(s);
    914   1.1    dante }
    915   1.1    dante 
    916   1.1    dante 
    917   1.1    dante static void
    918   1.1    dante adv_watchdog(arg)
    919   1.1    dante 	void           *arg;
    920   1.1    dante {
    921   1.1    dante 	ADV_CCB        *ccb = arg;
    922   1.1    dante 	struct scsipi_xfer *xs = ccb->xs;
    923   1.1    dante 	struct scsipi_link *sc_link = xs->sc_link;
    924   1.1    dante 	ASC_SOFTC      *sc = sc_link->adapter_softc;
    925   1.1    dante 	int             s;
    926   1.1    dante 
    927   1.1    dante 	s = splbio();
    928   1.1    dante 
    929   1.1    dante 	ccb->flags &= ~CCB_WATCHDOG;
    930   1.1    dante 	adv_start_ccbs(sc);
    931   1.1    dante 
    932   1.1    dante 	splx(s);
    933   1.1    dante }
    934   1.1    dante 
    935   1.1    dante 
    936   1.1    dante /******************************************************************************/
    937  1.10    dante /*                      NARROW boards Interrupt callbacks                     */
    938   1.1    dante /******************************************************************************/
    939   1.1    dante 
    940   1.1    dante 
    941   1.1    dante /*
    942   1.1    dante  * adv_narrow_isr_callback() - Second Level Interrupt Handler called by AscISR()
    943   1.1    dante  *
    944   1.1    dante  * Interrupt callback function for the Narrow SCSI Asc Library.
    945   1.1    dante  */
    946   1.1    dante static void
    947   1.1    dante adv_narrow_isr_callback(sc, qdonep)
    948   1.1    dante 	ASC_SOFTC      *sc;
    949   1.1    dante 	ASC_QDONE_INFO *qdonep;
    950   1.1    dante {
    951   1.1    dante 	bus_dma_tag_t   dmat = sc->sc_dmat;
    952  1.10    dante 	ADV_CCB        *ccb;
    953  1.10    dante 	struct scsipi_xfer *xs;
    954   1.1    dante 	struct scsipi_sense_data *s1, *s2;
    955   1.1    dante 
    956  1.10    dante 
    957  1.10    dante 	ccb = adv_ccb_phys_kv(sc, qdonep->d2.ccb_ptr);
    958  1.10    dante 	xs = ccb->xs;
    959   1.1    dante 
    960   1.6    dante #ifdef ASC_DEBUG
    961   1.6    dante 	printf(" - ccb=0x%lx, id=%d, lun=%d, cmd=%d, ",
    962   1.6    dante 			(unsigned long)ccb,
    963   1.6    dante 			xs->sc_link->scsipi_scsi.target,
    964   1.6    dante 			xs->sc_link->scsipi_scsi.lun, xs->cmd->opcode);
    965   1.6    dante #endif
    966   1.1    dante 	untimeout(adv_timeout, ccb);
    967   1.1    dante 
    968   1.1    dante 	/*
    969   1.1    dante          * If we were a data transfer, unload the map that described
    970   1.1    dante          * the data buffer.
    971   1.1    dante          */
    972   1.1    dante 	if (xs->datalen) {
    973   1.1    dante 		bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
    974   1.1    dante 				ccb->dmamap_xfer->dm_mapsize,
    975   1.1    dante 			 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD :
    976   1.1    dante 				BUS_DMASYNC_POSTWRITE);
    977   1.1    dante 		bus_dmamap_unload(dmat, ccb->dmamap_xfer);
    978   1.1    dante 	}
    979   1.1    dante 	if ((ccb->flags & CCB_ALLOC) == 0) {
    980   1.1    dante 		printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname);
    981   1.1    dante 		Debugger();
    982   1.1    dante 		return;
    983   1.1    dante 	}
    984   1.1    dante 	/*
    985   1.1    dante          * 'qdonep' contains the command's ending status.
    986   1.1    dante          */
    987   1.6    dante #ifdef ASC_DEBUG
    988   1.6    dante 	printf("d_s=%d, h_s=%d", qdonep->d3.done_stat, qdonep->d3.host_stat);
    989   1.6    dante #endif
    990   1.1    dante 	switch (qdonep->d3.done_stat) {
    991   1.1    dante 	case ASC_QD_NO_ERROR:
    992   1.1    dante 		switch (qdonep->d3.host_stat) {
    993   1.1    dante 		case ASC_QHSTA_NO_ERROR:
    994   1.1    dante 			xs->error = XS_NOERROR;
    995   1.1    dante 			xs->resid = 0;
    996   1.1    dante 			break;
    997   1.1    dante 
    998   1.1    dante 		default:
    999   1.1    dante 			/* QHSTA error occurred */
   1000   1.1    dante 			xs->error = XS_DRIVER_STUFFUP;
   1001   1.1    dante 			break;
   1002   1.1    dante 		}
   1003   1.1    dante 
   1004   1.1    dante 		/*
   1005   1.1    dante                  * If an INQUIRY command completed successfully, then call
   1006   1.1    dante                  * the AscInquiryHandling() function to patch bugged boards.
   1007   1.1    dante                  */
   1008   1.1    dante 		if ((xs->cmd->opcode == SCSICMD_Inquiry) &&
   1009   1.1    dante 		    (xs->sc_link->scsipi_scsi.lun == 0) &&
   1010   1.1    dante 		    (xs->datalen - qdonep->remain_bytes) >= 8) {
   1011   1.1    dante 			AscInquiryHandling(sc,
   1012   1.1    dante 				      xs->sc_link->scsipi_scsi.target & 0x7,
   1013   1.1    dante 					   (ASC_SCSI_INQUIRY *) xs->data);
   1014   1.1    dante 		}
   1015   1.1    dante 		break;
   1016   1.1    dante 
   1017   1.1    dante 	case ASC_QD_WITH_ERROR:
   1018   1.1    dante 		switch (qdonep->d3.host_stat) {
   1019   1.1    dante 		case ASC_QHSTA_NO_ERROR:
   1020   1.1    dante 			if (qdonep->d3.scsi_stat == SS_CHK_CONDITION) {
   1021   1.1    dante 				s1 = &ccb->scsi_sense;
   1022   1.1    dante 				s2 = &xs->sense.scsi_sense;
   1023   1.1    dante 				*s2 = *s1;
   1024   1.1    dante 				xs->error = XS_SENSE;
   1025   1.4    dante 			} else {
   1026   1.1    dante 				xs->error = XS_DRIVER_STUFFUP;
   1027   1.4    dante 			}
   1028   1.1    dante 			break;
   1029   1.1    dante 
   1030   1.1    dante 		default:
   1031   1.1    dante 			/* QHSTA error occurred */
   1032   1.1    dante 			xs->error = XS_DRIVER_STUFFUP;
   1033   1.1    dante 			break;
   1034   1.1    dante 		}
   1035   1.1    dante 		break;
   1036   1.1    dante 
   1037   1.1    dante 	case ASC_QD_ABORTED_BY_HOST:
   1038   1.1    dante 	default:
   1039   1.1    dante 		xs->error = XS_DRIVER_STUFFUP;
   1040   1.1    dante 		break;
   1041   1.1    dante 	}
   1042   1.1    dante 
   1043   1.1    dante 
   1044   1.1    dante 	adv_free_ccb(sc, ccb);
   1045   1.1    dante 	xs->flags |= ITSDONE;
   1046   1.1    dante 	scsipi_done(xs);
   1047   1.1    dante }
   1048